Abstract: A display device includes a display area, a test pad, a plurality of first test transistors, and at least one outline. The display area includes pixels coupled to data lines and scan lines. The test pad receives a test signal. The first test transistors are coupled between the data lines of the display area and the test pad. The at least one outline is coupled between one of the first test transistors and the test pad. The at least one outline is located in a non-display area outside the display area.

Abstract: A display device includes a pixel array including touch blocks; a plurality of test pads in a bezel area outside the pixel array for performing a pixel test and a touch block test; a plurality of pixel test lines and a plurality of touch block test lines connected to the test pads within the pixel array; a switching unit between the test pads and the pixel test lines and the touch block test lines and applying a test signal to any one of the pixel test lines and the touch block test lines; a pixel test switching pad in the bezel area and providing a control signal for testing pixel operation in the pixel array to the switching unit; and a touch block test switching pad in the bezel area and providing a control signal for testing the touch blocks within the pixel array to the switching unit.

Abstract: A display device includes a pixel array including touch blocks; a plurality of test pads in a bezel area outside the pixel array for performing a pixel test and a touch block test; a plurality of pixel test lines and a plurality of touch block test lines connected to the test pads within the pixel array; a switching unit between the test pads and the pixel test lines and the touch block test lines and applying a test signal to any one of the pixel test lines and the touch block test lines; a pixel test switching pad in the bezel area and providing a control signal for testing pixel operation in the pixel array to the switching unit; and a touch block test switching pad in the bezel area and providing a control signal for testing the touch blocks within the pixel array to the switching unit.

Abstract: A display device in which a pixel defect is less likely to be perceived is provided. The display device includes a display portion where pixels are arranged in a matrix, and a sensor portion including a photoelectric conversion element. First, the display portion is divided into a first region and a second region. Next, first light is emitted from the pixel included in the first region, and the luminance of the first light is detected by the photoelectric conversion element. Moreover, second light is emitted from the pixel included in the second region, and the luminance of the second light is detected by the photoelectric conversion element. Then, the luminance of the first light is compared to the luminance of the second light, and on the basis of the comparison result, one of the first region and the second region is divided into a third region and a fourth region. By repeating these operations, a defective pixel is detected.

Abstract: A manufacturing method of an electronic device and an electronic device are provided. The manufacturing method includes the following steps: providing a substrate; forming a plurality of signal lines and a testing circuit on the substrate, wherein the testing circuit includes a plurality of output channels electrically connected to at least a portion of the plurality of signal lines; performing a testing process; and optionally isolating the testing circuit from the at least a portion of the plurality of signal lines. The testing process includes: providing a signal; processing a plurality of testing signals by processing the signal via the testing circuit; and transmitting the plurality of testing signals to the at least a portion of the plurality of signal lines via the plurality of output channels. The plurality of output channels are less than the plurality of signal lines in quantity.

Abstract: An inspection circuit is properly protected in a display device, in which a driver IC is not on a terminal area. A liquid crystal display device includes a TFT substrate including a display area, in which video signal lines are formed, and a terminal area. A counter substrate overlaps with the display area of the TFT substrate. The counter substrate and the TFT substrate are adhered by a seal material, and the display area is formed in an area surrounded by the seal material. The flexible wiring circuit substrate connects to the terminal area. The driver IC, which supplies video signals to the video signal lines, is not installed in the terminal area. An inspection circuit is formed between the display area and the terminal area, and the inspection circuit overlaps with the counter substrate in a plan view.

Abstract: A display device includes a pixel array including touch blocks; a plurality of test pads in a bezel area outside the pixel array for performing a pixel test and a touch block test; a plurality of pixel test lines and a plurality of touch block test lines connected to the test pads within the pixel array; a switching unit between the test pads and the pixel test lines and the touch block test lines and applying a test signal to any one of the pixel test lines and the touch block test lines; a pixel test switching pad in the bezel area and providing a control signal for testing pixel operation in the pixel array to the switching unit; and a touch block test switching pad in the bezel area and providing a control signal for testing the touch blocks within the pixel array to the switching unit.

Abstract: A display device includes a pixel circuit on a substrate, a data line configured to transmit a data signal for the pixel circuit on the substrate, and a monitoring circuit. The pixel circuit includes a driving transistor configured to control an amount of electric current supplied to a light-emitting element, and a first switching transistor disposed between the light-emitting element and the driving transistor. The first switching transistor switches between supplying and not supplying the light-emitting element with electric current from the driving transistor. The monitoring circuit monitors a signal at a monitoring point located between the driving transistor and the first switching transistor in the pixel circuit.

Abstract: The present invention provides a display panel including a substrate, first pads, second pads, third pads, an integrated circuit chip, and a flexible printed circuit board. The substrate includes a display region and a non-display region. The first pads are disposed in the non-display region and include display signal pads used for transmitting display signals. The second pads are disposed in the non-display region, at least a portion of the second pads are disposed along a first direction, and the second pads are disposed closer to an edge of the substrate than the first pads. The third pads are disposed in the non-display region and along the first direction, and the third pads are electrically connected to the corresponding second pads. The integrated circuit chip covers and is electrically connected to the first pads and the second pads. The flexible printed circuit board is electrically connected to the third pads.

Abstract: Systems and methods are for domain name system (DNS) resolutions in heterogeneous network environments including a virtual private cloud (VPC). An administrator of a virtual private cloud (VPC) specifies rules identifying sources for resolving DNS resolution requests. The rules may include routing a request to a source outside the VPC such as to an on-premises DNS resolver through an outbound IP endpoint.

Abstract: According to an aspect, a display device includes: a first substrate having a first side and a second side opposed to the first side; a display region provided with pixels; a first partial peripheral region between the first side and the display region; a second partial peripheral region between the second side and the display region; a plurality of signal lines configured to supply signals to switching elements in the pixels; a plurality of first terminals provided in the first partial peripheral region and configured to be electrically coupled to a driver integrated circuit; a plurality of second terminals provided in the second partial peripheral region and configured to be supplied with signals for inspection; and a first coupling circuit provided between the first terminals and the display region in the first partial peripheral region and configured to switch between coupling and decoupling the signal lines and the second terminals.

Abstract: A display panel includes: a pixel region comprising a plurality of pixels; an open/short test region comprising a plurality of open/short test pads; a dummy stage configured to generate a carry signal in response to a scan start signal; and a plurality of stages configured to sequentially provide a plurality of scan signals to the plurality of pixels in response to the carry signal, wherein the plurality of stages is spaced apart by a first distance from the pixel region, and the dummy stage is spaced apart by a second distance greater than the first distance from the open/short test region.

Abstract: An organic light-emitting diode (OLED) array substrate and an OLED display device are provided. The OLED array substrate includes a plurality of driving circuits of a plurality of sub-pixels using a mirror symmetrical structure, and a plurality of reset signal lines and a plurality of power signal lines extending along a same direction. By sharing each of the reset signal lines and each of a plurality of first vias, and sharing each of the power signal lines and each of a plurality of second vias, about half of lines of power signal lines, reset signal lines, and vias are saved. Therefore, room for increasing pixels per inch (PPI) is provided, facilitating realizing high PPI panel designs.

Abstract: The present inventive concept is related to a display device in which a compensated voltage is applied to a gate line by compensating for a voltage drop of a voltage applied to the gate line.

Abstract: [Problem] To provide an abnormality detection data recording device capable of detecting an abnormality and leaving its history. [Solution] An abnormality detection data recording device includes a first semiconductor integrated circuit device and a second semiconductor integrated circuit device. The first semiconductor integrated circuit device includes an abnormality detection part configured to detect an abnormality of an electronic device in which the abnormality detection data recording device is installed, and a transmission part configured to transmit abnormality detection data indicative of the abnormality detected by the abnormality detection part. The second semiconductor integrated circuit device includes a reception part configured to receive the abnormality detection data by wired communication with the transmission part, and a storage part configured to nonvolatilely store the abnormality detection data received by the reception part.

Abstract: Embodiments relate to functional test methods useful for fabricating products containing Light Emitting Diode (LED) structures. In particular, LED arrays are functionally tested by injecting current via a displacement current coupling device using a field plate comprising of an electrode and insulator placed in close proximity to the LED array. A controlled voltage waveform is then applied to the field plate electrode to excite the LED devices in parallel for high-throughput. A camera records the individual light emission resulting from the electrical excitation to yield a function test of a plurality of LED devices. Changing the voltage conditions can excite the LEDs at differing current density levels to functionally measure external quantum efficiency and other important device functional parameters.

Abstract: This disclosure describes methods, systems and media for analyzing voltage drops in a power delivery network in a simulated design of an electrical circuit. In one embodiment, a system determines, for a victim element (“victim”), a voltage drop caused by each aggressor element (“aggressor”) in a set of aggressors in the design and creates a data structure that includes, for each victim, at least one of: (1) each voltage drop caused by each aggressor in the set of aggressors or (2) a sum of the voltage drops on the victim caused by all of the aggressors in the set of aggressors. The system can then compute a set of simulations based on random inputs to generate a distribution of possible voltage drops for each victim using data in the data structure.

Abstract: A display device and a detection method applied to the display device are provided. The display device includes a display panel, a source control circuit, and a leakage estimation circuit. The display panel includes pixels being arranged in M columns, wherein at least one panel-partition is defined on the display panel. The source control circuit includes M source drivers which respectively provide data voltages to the M columns of pixels. The leakage estimation circuit includes an evaluation circuit, a defect detection circuit, and a mode-switch. The evaluation circuit controls the defect detection circuit to perform a leakage estimation procedure so that a leakage current corresponding to the panel-partition is estimated when the at least one mode-switch is turned on.

Abstract: A display device includes a pixel circuit on a substrate, a data line on the substrate, the data line being configured to transmit a data signal for the pixel circuit, a monitoring line on the substrate, the monitoring line being different from the data line, and a monitoring circuit. The monitoring circuit is configured to monitor a signal at a monitoring point on a path of the data signal with the monitoring line, and supply a correction signal in place of the data signal to the pixel circuit via the monitoring line and the monitoring point in response to detection of transmission failure of the data signal.

Abstract: [Object] An object is to suppress an occurrence of display unevenness in a pause-and-drive operation. [Solution] A display device configured to perform pause-and-drive operation includes an nth stage circuit connected to one end of an nth gate bus line, and an nth transistor connected to the other end of the nth gate bus line. One of a first clock signal group (AGCK1 to AGCK6) is input to the nth stage circuit. One of a second clock signal group (BGCK1 to BGCK6) is input to the nth transistor. In a pause period in which all clock signals of the first clock signal group are fixed at an inactive level, one or more pulses (P3 to P6) are included in the second signal group.

Abstract: A display panel and a display test apparatus and a method of testing the display panel are provided. The display panel includes an array substrate; a test device disposed on the array substrate and configured to receive a test signal from a display test apparatus to test a plurality of pixel units of the display panel; and a connection device disposed on the array substrate and configured to be electrically connectable to the display test apparatus electrically, the test device receives a discharge signal from the display test apparatus to discharge the plurality of pixel units in response to a switch of a connection state between the connection device and the display test apparatus from electrical connection to electrical disconnection.

Abstract: A source driver includes a first output pad, a second output pad, a first charge-sharing path, a second charge-sharing path, a first charge-sharing switch, a second charge-sharing switch and a test circuit. A first terminal and a second terminal of the first charge-sharing switch are respectively coupled to the first output pad and the first charge-sharing path. A first terminal and a second terminal of the second charge-sharing switch are respectively coupled to the second output pad and the second charge-sharing path. The test circuit is coupled to the first charge-sharing path and the second charge-sharing path. The test circuit performs a test for the first output pad and the second output pad via the first charge-sharing path, the second charge-sharing path, the first charge-sharing switch and the second charge-sharing switch in a test period.

Abstract: The present application discloses a detection method for a display panel and a detection apparatus for a display panel. The detection method includes the following steps: storing a picture for detection in a source driver circuit board of a display panel; electrically connecting a power source board generating a power source signal directly to the source driver circuit board.

Abstract: A method of inspecting light emitting elements includes disposing a first electrode and a second electrode on a substrate. A solution including a plurality of light emitting elements is applied on the first electrode and the second electrode. A first voltage is applied across the first electrode and the second electrode so as to cause the plurality of light emitting elements to emit light. The light emitted from the plurality of light emitting elements is photographed and first image data is generated therefrom. A density of the plurality of light emitting elements is determined using the first image data.

Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.

Abstract: A testing apparatus for testing an integrated circuit package having a plurality of electrical terminals includes a base, a socket, a plurality of conductive pins and a plurality of conductive pillars. The base includes a plurality of electrical contacts. The socket is disposed on the base and includes a bended portion bended away from the base and a plurality of through holes distributed in the socket. The conductive pins are disposed in the through holes respectively and electrically connected to the electrical contacts, wherein each of the conductive pins protrudes from an upper surface of the socket for forming temporary electrical connections with one of the electrical terminals. The conductive pillars are disposed on the base and connected to the bended portion, wherein each of the conductive pillars electrically connects one of the conductive pins and one of the electrical contacts.

Abstract: A short circuit testing method for a capacitive sensing device including a plurality of sense lines and a plurality of drive lines includes: under a short circuit testing mode, coupling at least one first line in the sense lines and drive lines to a reference level; using a sensing circuit corresponding to a specific sense line to read out a testing resultant signal; and, comparing the testing resultant signal with a reference signal to determine whether a short circuit exists.

Abstract: A method and an apparatus for detecting a driving circuit. The method includes: inputting a data signal, a gate line scanning signal, a voltage signal, and a first control signal with a first voltage level into a data input end, a gate scanning input end, a power source end and a voltage sensing end of the driving circuit, respectively; by inputting a second control signal with a second voltage level into a sensing-scanning input end, controlling a pixel storage capacitor to be charged, and measuring a first voltage of an OLED anode end; by inputting the second control signal with a third voltage level to the sensing-scanning input end, controlling the pixel storage capacitor to be discharged, and measuring a second voltage of the OLED anode end; and determining whether the driving circuit has abnormity or not according to the first voltage and the second voltage.

Abstract: Disclosed is a display device that includes an array substrate that includes a display region and a first non-display region, and includes a signal line connected to a pixel in the display region; a first signal transfer line that is at the first non-display region and transfers a test signal, and a second signal transfer line that transfers a test enable signal; a connection pattern connected to the first signal transfer line; a test transistor that is connected between the signal line and the connection pattern, and is connected to the second signal transfer line; and an electrostatic induction element that includes a dummy device in the form of either a dummy pattern and/or a dummy test transistor, the dummy pattern including a dummy connection pattern connected to the first signal transfer line, the dummy test transistor connected to the second signal transfer line.

Abstract: An embodiment of the present disclosure relates to an array substrate, which comprises data lines and gate lines arranged on the array substrate having a pixel region and a peripheral region surrounding the pixel region, and at least two repair lines arranged on the peripheral region of the array substrate. The at least two repair lines intersect with one of the data lines and the gate lines. Each of the repair lines has at least one repair voltage lead. The array substrate according to the present disclosure can increase the number of data lines or gate lines that can be repaired, improve a utilization ratio of the repair lines, and can be used for repairing a display panel with large area.

Abstract: A gate driver on array (GOA) display panel and a GOA display apparatus are disclosed. The display panel has a scan driving circuit, a data driving circuit, a thin-film transistor array, a plurality of scanning lines, a plurality of data lines, and a sub-pixel array. Starting from the first row of the sub-pixels, two of the scanning lines that are connected to two adjacent odd-numbered rows of the sub-pixels are both connected to a first clock signal control terminal; two of the scanning lines that are connected to two adjacent even-numbered rows of the sub-pixels are both connected to a second clock signal control terminal.

Abstract: An organic light emitting display device including pixels positioned in regions defined by scan lines and light emission control lines extending in a first direction, and data lines extending in a second direction different from the first direction, the pixels being configured to control an amount of current flowing from a first power source to a second power source by way of organic light emitting diodes (OLEDs) in response to data signals, organic light emitting display device includes a scan driver configured to sequentially supply scan signals to the scan lines and light emission control signals to the light emission control lines during an inspection period, and a data driver configured to supply inspection data signals to the data lines in synchronization with the scan signals during the inspection period.

Abstract: A display motherboard and a method of cutting the same are provided, which relate to a display technology to form a display panel of narrow bezel.

Abstract: Systems and methods are described to enable adaptive handling of domain resolution requests originating from a virtual private cloud (VPC) networking environment. An administrator of the VPC can provide a set of rules specific to the VPC that designates how requests for a domain name should be handled. The rules may specify, for example, that a request for a given domain name should be routed to a particular domain name server, which may include a private domain name server, should be dropped, or should be routed according to a default behavior (e.g., a public domain name system). Resolution requests originating in the VPC can be associated with a VPC identifier. When an adaptive resolution system receives the request, it can retrieve rules associated with the VPC identifier, and apply the rules to determine further routing for the request.

Abstract: A display device includes a display panel, a first inspection line, a second inspection line, and an inspection circuit controlling a connection between the first inspection line and a first pixel group and a connection between the second inspection line and the second pixel group. The inspection circuit includes a switching part including a first switching part that controls the connection between the first inspection line and the first pixel group and a second switching part that controls the connection between the second inspection line and the second pixel group and a dummy circuit including a dummy transistor that is electrically connected to the switching part and including a first dummy electrode, a second dummy electrode that is connected to the first dummy electrode, and a dummy control electrode.

Abstract: Disclosed are a system and a method for analyzing a result of clustering massive data. An open-source map/reduce framework named Hadoop is used to calculate a silhouette coefficient corresponding to a significance verification index capable of evaluating a result of clustering massive data. To implement the system and the method for analyzing a result of clustering massive data, clustered data is divided into blocks. For all of the blocks, input splits are generated. Then, the generated input splits are assigned to multiple computers. Each computer stores only data of blocks included in an input split assigned in a memory, and calculates a silhouette coefficient for each record. Each computer provides only the calculated silhouette coefficient to an index coefficient calculation apparatus, and enables the index coefficient calculation apparatus to calculate a silhouette coefficient for a cluster. Therefore, the result of clustering the massive data can be rapidly and objectively analyzed.

Abstract: Disclosed is a source driver including a sensing circuit capable of sensing whether a short occurred between a data output line and a power line. The source driver may include: an output circuit configured to output a preset voltage to a display panel in a checking mode; and a sensing circuit configured to sense whether data output lines connecting the output circuit and the display panel are shorted, using the preset voltage, and output a sensing result signal.

Abstract: A display panel includes: a display including pixel columns electrically connected to data lines; a non-display area adjacent the display; a test circuit configured to receive a lighting test signal passing through at least a portion of the non-display area and to transfer the lighting test signal to the data lines in response to a test control signal; and a switch configured to receive a data signal from an external component and to transfer the data signal to the data lines in response to a switching signal.

Abstract: An electrostatic discharge (ESD) and testing composite component, an array substrate and a display device are provided. The composite component includes a first signal line, a first thin-film transistor (TFT) and a second TFT which are electrically connected with the first signal line, a second signal line electrically connected with the first TFT, and a third signal line and a fourth signal line which are electrically connected with the second TFT; and the composite component is configured to provide a testing signal for the first signal line at a first stage and configured to provide ESD for the first signal line at a second stage, and the first stage is a testing stage and the second stage is an ESD stage. The composite component occupies small area and acquire a narrow-bezel and/or high-resolution display panel.

Abstract: What is disclosed are structures and methods for testing and repairing emissive display systems. Systems are tested with use of temporary electrodes which allow operation of the system during testing and are removed afterward. Systems are repaired after identification of defective devices with use of redundant switching from defective devices to functional devices provided on repair contact pads.

Abstract: The present disclosure provides a semiconductor chip. The semiconductor chip includes a switching element having a gate electrode, a first pad, and a second pad. The first control pad is electrically connected to the gate electrode and applied with a voltage controlling the switching element to switch on or switch off. The second control pad provides a current path of a control current flowing between the first control pad and the second control pad when the switching element is in a switch-on state. One of the first control pad or the second control pad includes two pad components and a remaining one of the first control pad or the second control pad is disposed between the two pad components of the one of the first control pad or the second control pad.

Abstract: The present invention provides a repair structure of a line defect of an AMOLED display panel and a repair method. The conductive film (410) correspondingly overlaps and covers above the test TFT (310) and is insulated from the test TFT (310), and the repair line (420) is insulated and crossed with all the signal fanout lines (200) and the corresponding test line (330). It is realized that the repair line is directly grafted on the AMOLED display panel detecting circuit, which can utilize the present detecting circuit layout of the AMOLED display panel capable of introducing the repair line for having the repair function and saving the layout space, and has no additional requirement to the control IC, and particularly, can be applicable for the line defect repair of the small size, high resolution AMOLED display panel.

Abstract: A liquid crystal panel, a TFT substrate, and a detection method for TFT substrates are disclosed. The TFT substrate includes a plurality of pixel cells. The secondary pixel area of the first pixel cell in the (2n+1)-th row electrically connects to the capacitor of the second pixel cell in the (2n+2)-th row, and the secondary pixel area of the first pixel cell in the (2n+2)-th row electrically connects to the capacitor of the first pixel cell in the (2n+1)-th row. Different voltage signals are respectively provided to the first pixel cell and the second pixel cell. In this way, the short-circuit between the capacitor and the secondary pixel area within the same pixel cell may be detected, and thus may be repaired in time so as to enhance the product reliability.

Abstract: Systems and methods are described to enable adaptive handling of domain resolution requests originating from a virtual private cloud (VPC) networking environment. An administrator of the VPC can provide a set of rules specific to the VPC that designates how requests for a domain name should be handled. The rules may specify, for example, that a request for a given domain name should be routed to a particular domain name server, which may include a private domain name server, should be dropped, or should be routed according to a default behavior (e.g., a public domain name system). Resolution requests originating in the VPC can be associated with a VPC identifier. When an adaptive resolution system receives the request, it can retrieve rules associated with the VPC identifier, and apply the rules to determine further routing for the request.

Abstract: An electronic paper display device includes a display region, a signal-sending region, data lines, scan lines, selection-line regions, and a repair line. The signal-sending region is located at a side of the display region. The scan lines intersect the data lines to divide the display region into pixel regions. Each of the selection-line regions is located at a side of one of the scan lines. Disposed on two sides of each of the scan lines are respectively one of the pixel regions and one of the selection-line regions. Each of the selection-line regions has selection lines. The selection lines intersect the data lines. The repair line is between the signal-sending region and the display region. The repair line intersects the selection lines. The repair line and the data lines are selectively electrically connected to one of the selection lines.

Abstract: A method and device for detecting a defect of a display panel, the method comprises steps of: connecting at least one electrical test pad on the display panel to a first detecting terminal, and connecting another at least one electrical test pad on the display panel to a second detecting terminal; providing a preset voltage between the first detecting terminal and the second detecting terminal; and, detecting whether magnitudes of currents passing through the first detecting terminal and the second detecting terminal within a predetermined time are less than a preset current threshold, and if not, then determining there is a defect on the display panel. The present disclosure can implement effective detection and interception of a progressive defect or badness in the display panel.

Abstract: The present invention provides a detection circuit of an In Cell type touch display panel and a detection method. By locating a line multiplexer corresponding to the touch sensing electrodes of each column, and selecting and charging at least one parasitic capacitor constructed with the touch sensing electrode and a ground in the touch sensing electrodes of the column with the line multiplexer, and then, measuring the charge electric quantity with the electric quantity measurement unit, and judging whether the touch sensing electrode faults or not according to the value of the charged electric quantity, the detection circuit can accomplish the fault detection to the touch sensing electrode in the array process.

Abstract: The present disclosure provides a gate driver circuit including at least one set of clock signal lines and multiple levels of shift registers arranged in a cascaded manner. Each set of the clock signal lines includes two clock signal lines. The multiple levels of shift registers is divided into at least one set, and each set of the clock signal lines corresponds to a set of the shift registers. One clock signal line in each set of the clock signal lines is connected to a resetting signal input end of a last-level shift register in the set of the shift registers corresponding to the set of the clock signal lines. The present disclosure further provides an array substrate, a display device and a method for driving the gate driver circuit.

Abstract: A display panel includes a substrate, a display area, N data lines, first switches, second switches, third switches, and fourth switches. A first peripheral circuit zone, a second peripheral circuit zone, and a display area are defined on a first surface of the substrate, and located between the first peripheral circuit zone and the second peripheral circuit zone. A display area circuit is located in the display area. Each of the N data lines crosses the display area circuit from the first peripheral circuit zone to the second peripheral circuit zone, and N is a positive integer greater than 1. The first switches are located in the first peripheral circuit zone. The second switches are located in the first peripheral circuit zone. The third switches are located on the first surface. The fourth switches are located in the second peripheral circuit zone.

Abstract: Inside of a region for inspection set outside a display region of an active matrix substrate, lead-out lines (27a to 27f) connected to data lines pass through in a column direction, and a control line for inspection (31) and six signal lines for inspection (32a to 32f) extend in a row direction. TFTs for inspection (51a to 51f) control a conduction state between the lead-out line and the corresponding signal line for inspection in accordance with a signal on the control line for inspection. Inside the region for inspection, three of the six signal lines for inspection are arranged on one side of the control line for inspection, and the remaining three are arranged on other side of the control line for inspection. One of the two adjacent lead-out lines is connected to one of the former signal lines for inspection via the TFT for inspection (51a, 51c, 51e), and the other is connected to one of the latter signal lines for inspection via the TFT for inspection (51b, 51d, 51f).