Abstract: A frequency conversion circuit having at least one transistor with an input terminal and an output terminal. A frequency signal to be converted or a local oscillator (LO) signal is input to the input terminal, and a converted frequency signal is output from the output terminal. A linear feedback circuit allowing at least a radio frequency (RF) signal and the LO signal to feed back is directly connected across the input and output terminals.

Abstract: Gain linearity problems caused by impact ionization in a active MOS device are avoided by connecting an MOS shield device in series with the active MOS device so that the overall supply voltage is split across two devices, keeping both devices in a region of operation well below where impact ionization becomes a significant problem. The gate of the MOS shield device is maintained at a voltage proportional to its drain voltage, thereby keeping the device in the saturation mode and avoiding an abrupt mode change associated with prior art shield circuits.

Abstract: An impedance synthesizer includes an amplifier with selectable gain and a reference capacitor, resistor, or inductor for providing a plurality of synthesized impedance values. The voltage gain of the amplifier is controlled by a programmable multiplying digital-to-analog converter which allows the selection of a myriad of desired synthesized impedances with high precision and accuracy.

Abstract: A clock generator circuit which produces a clock signal which may have an adjustable steady state duty cycle and which has the same frequency as a crystal frequency. The clock generator circuit includes a drive circuit coupled to the crystal which converts the first signal to a clock signal, and a duty cycle control circuit which generates a feedback signal to cause the duty cycle to automatically change to the steady state duty cycle. The clock generator circuit of the present invention may also include an output pad for allowing a measuring instrument to determine the duty cycle.

Abstract: An integrated circuit which includes a detection circuit for detecting the condition of saturation of an output transistor (Q.sub.0) whose collector-emitter path is intended to pass an output current. A threshold circuit (A) of the detection circuit is arranged to perform a switching operation when a representative parameter of the condition of saturation crosses a given threshold. A control transistor (Q) is arranged to supply at least a part of the base current of the output transistor (Q.sub.0) and the threshold circuit (A) performs its switching operation when the value of the current passing through the collector-emitter path of the control transistor exceeds a given level.