Abstract: Switching apparatus for switching on and off one or more microwave tubes. A preferred embodiment of the switching apparatus comprises a solid state magnetron switcher that switches a plurality of magnetrons on and off using a plurality of high voltage (IGBT) switches. The microwave tubes or magnetrons are driven from a single power supply. The technical approach employed in the present invention places all microwave tubes or magnetrons into low level oscillation prior to switching them into full conduction. This maintains minimal voltage across the high voltage switches while allowing only a small percentage (1-2%) of full load current to be drawn.

Abstract: MUX and DEMUX circuits using a photo gate transistor having a pair of thin film electrodes respectively serving as emission and collector electrodes. When photons with at least critical energy are irradiated onto the emission electrode, electrons are emitted from the emission electrode, so that the associated photo gate transistor can carry out a gating operation. The MUX circuit divides a plurality of electrical signals in a time division manner so that the transmission of those signals can be carried out through a single transmission line. The DEMUX circuit recovers an original signal from signals transmitted in a time division manner via a single transmission line. Input signals are received to emission electrodes while being limited in voltage level by input resistor pairs. An optical source irradiates photons to an emission electrode in sync with the application of an input signal. By the irradiation of photons, the emission electrode emits electrons which are transmitted to a collector electrode.

Abstract: The invention provides a demultiplexer which does not require a reset circuit for setting initial values for outputs and can define a bit for each output terminal. Rising edges of delay outputs 8-1 to 11-1 from non-inverted output terminals Q of MS-DFFs (master-slave D-type flipflops) 6-1 to 6-4 are successively delayed in order of the cascade connection. After the outputs from output terminals Q are outputted, delay outputs 8-2 to 11-2 are outputted successively from the inverted output terminals of the MS-DFFs beginning with the inverted output terminal of MS-DFF 6-1 at the top. In a timed relationship with the timings of the delay outputs, MS-DFFs 4-1 to 4-4 and MSM-DFFs 5-1 go 5-4 extract corresponding input signals 12 to 19 from within multiplexed input signal 22. MS-DFFs 4-5 to 4-12 output input signals 12 to 19 at a same timing as demultiplexed outputs demultiplexed to 1:8.