Abstract: A dual submodule is created for a modular multilevel converter, whereby the dual submodule has two interconnected submodules, whereby each submodule has an asymmetrical half-bridge circuit with two parallel bridge branches, which are connected between a first and a second terminal connection of the submodule, whereby each bridge branch is formed from a series circuit of a power semiconductor switch, and a diode, whereby the power semiconductor switch is allocated to an antiparallel free-wheeling diode, and has a capacitor, which is connected in parallel with the asymmetrical half-bridge circuit between the first and the second terminal connections of the module. The submodules are connected to each other via their AC terminals to form the dual submodule. Further, a modular multilevel converter is created, comprising a number of such dual submodules in each of its converter branches.
Type:
Grant
Filed:
February 24, 2017
Date of Patent:
August 31, 2021
Assignee:
GE ENERGY POWER CONVERSION TECHNOLOGY LIMITED
Abstract: Silicon-controlled rectifiers, electrostatic discharge circuits, and methods of fabricating a silicon-controlled rectifier for use in an electrostatic discharge circuit. A device structure for the silicon controlled rectifier includes a first well of a first conductivity type in a semiconductor layer, a second well of a second conductivity type in the semiconductor layer, a cathode coupled with the first well, and an anode coupled with the second well. First and second body contacts are coupled with the first well, and the first and second body contacts each have the first conductivity type. A triggering device may be coupled with the first body contact.
Type:
Grant
Filed:
January 5, 2017
Date of Patent:
July 9, 2019
Assignee:
GLOBALFOUNDRIES Inc.
Inventors:
You Li, Manjunatha Prabu, Mujahid Muhammad, John B. Campi, Jr., Robert J. Gauthier, Jr., Souvick Mitra
Abstract: A method for controlling a first and a second reverse-conducting insulated gate bipolar transistor (RC-IGBT), electrically connected in series, is disclosed. A collector of the first RC-IGBT is electrically connected to a positive pole of a direct current voltage source, and an emitter of the second RC-IGBT is electrically connected to a negative pole of the DC voltage source. Further, an emitter of the first RC-IGBT is electrically connected to a collector of the second RC-IGBT to form an alternating current terminal. A gate voltage is applied to respective gates of the first and second RC-IGBTs, wherein the gate voltage is controlled based on a magnitude and a direction of an output current on the AC terminal and on a command signal alternating between a first and a second value.
Abstract: An exemplary current switching device includes an integrated gate-commutated thyristor with an anode, a cathode, and a gate, wherein a current between the anode and the cathode is interruptible by applying a switch-off voltage to the gate; and a gate unit for generating the switch-off voltage. The gate unit and a connection of the gate unit to the gate establish a gate circuit having a stray impedance. The gate unit is adapted for generating a spiked switch-off voltage with a maximum above a breakdown voltage (VGRMAX) between the cathode and the gate, such that the switch-off voltage at the gate stays below the breakdown voltage (VGRMAX) due to the stray impedance of the gate circuit.
Abstract: A semiconductor device and an operating method for the same are provided. The semiconductor device includes a first doped region, a second doped region, a first doped contact, a second doped contact, a first doped layer, a third doped contact and a first gate structure. The first doped contact and the second doped contact are on the first doped region. The first doped contact and the second doped contact has a first PN junction therebetween. The first doped layer is under the first or second doped contact. The first doped layer and the first or second doped contact has a second PN junction therebetween. The second PN junction is adjoined with the first PN junction.
Type:
Grant
Filed:
July 31, 2013
Date of Patent:
February 10, 2015
Assignee:
Macronix International Co., Ltd.
Inventors:
Ying-Chieh Tsai, Wing-Chor Chan, Jeng Gong
Abstract: A semiconductor device and an operating method for the same are provided. The semiconductor device includes a first doped region, a second doped region, a first doped contact, a second doped contact, a first doped layer, a third doped contact and a first gate structure. The first doped contact and the second doped contact are on the first doped region. The first doped contact and the second doped contact has a first PN junction therebetween. The first doped layer is under the first or second doped contact. The first doped layer and the first or second doped contact has a second PN junction therebetween. The second PN junction is adjoined with the first PN junction.
Type:
Application
Filed:
July 31, 2013
Publication date:
February 5, 2015
Applicant:
MACRONIX INTERNATIONAL CO., LTD.
Inventors:
Ying-Chieh Tsai, Wing-Chor Chan, Jeng Gong
Abstract: A thyristor is disclosed comprising: a first region of a first conductivity type; a second region of a second conductivity type and adjoining the first region; a third region of the first conductivity type and adjoining the second region; a fourth region of the second conductivity type and comprising a first segment and a second segment separate from the first segment, the first segment and second segment each adjoining the third region; a first contact adjoining the first region; a second contact adjoining the first segment; and a trigger contact adjoining the second segment and separate from the second contact. Methods of triggering such a thyristor are also disclosed, as are circuits utilising one or more such thyristors.
Type:
Application
Filed:
May 16, 2014
Publication date:
December 25, 2014
Applicant:
NXP B.V.
Inventors:
Rob Van Dalen, Maarten Jacobus Swanenberg, Inesz Emmerik-Weijland
Abstract: An integrated exciter-igniter architecture is disclosed that integrates compact, direct-mounted exciter electronics with an aerospace designed igniter to reduce overall ignition system complexity. The integrated exciter-igniter unit hermetically seals exciter electronics within a stainless steel enclosure or housing. The stainless enclosure enables the exciter electronics to remain near atmospheric pressure while the unit is exposed to vacuum conditions. The exciter electronics include a DC-DC converter, timing circuitry, custom-designed PCBs, a custom-designed main power transformer, and a high voltage ignition coil. All of which are packaged together in the stainless steel enclosure. The integrated exciter-igniter unit allows for efficient energy delivery to the spark gap and eliminates the need for a high voltage cable to distribute the high voltage, high energy pulses.
Type:
Grant
Filed:
January 27, 2011
Date of Patent:
February 18, 2014
Assignee:
Alphaport, Inc.
Inventors:
Michael Vincent Aulisio, Greg Scott Tollis, Elmer L. Griebeler, Neil D. Rowe
Abstract: One embodiment of the present invention relates to a silicon-controlled-rectifier (SCR). The SCR includes a longitudinal silicon fin extending between an anode and a cathode and including a junction region there between. One or more first transverse fins traverses the longitudinal fin at one or more respective tapping points positioned between the anode and the junction region. Other devices and methods are also disclosed.
Type:
Application
Filed:
March 5, 2012
Publication date:
September 5, 2013
Applicant:
Intel Mobile Communications GmbH
Inventors:
Mayank Shrivastava, Christian Russ, Harald Gossner
Abstract: A cell-based integrated circuit comprises a first supply voltage terminal and a second supply voltage terminal. A standard cell comprising a thyristor circuit comprising a first input inputs the first supply voltage. A second input inputs the second supply voltage. A first output outputs a first output voltage corresponding to the first supply voltage and a second output to output a second output voltage corresponding to the second supply voltage.
Abstract: There is provided a power electronic module that includes a power switch module and a drive circuit operatively coupled to the power switch module. The drive circuit is configured to enable and disable a forward conduction mode operation of the switch module. The drive circuit disables forward conduction mode operation of the power switch module when the power switch module is operating in reverse conduction mode.
Type:
Application
Filed:
August 26, 2011
Publication date:
February 28, 2013
Inventors:
Mari Curbelo Alvaro Jorge, Thomas Zoels
Abstract: In one embodiment, the invention comprises a MOSFET comprising individual MOSFET cells. Each cell comprises a U-shaped well (228) (P type) and two parallel sources (260) (N type) formed within the well. A plurality of source rungs (262) (doped N) connect sources (260) at multiple locations. Regions between two rungs (262) comprise a body (252) (P type). These features are formed on an N-type epitaxial layer (220), which is formed on an N-type substrate (216). A contact (290) extends across and contacts a plurality of source rungs (262) and bodies (252). Gate oxide and a gate contact overlie a leg of a first well and a leg of a second adjacent well, inverting the conductivity responsive to a gate voltage. A MOSFET comprises a plurality of these cells to attain a desired low channel resistance. The cell regions are formed using self-alignment techniques at several states of the fabrication process.
Type:
Grant
Filed:
July 26, 2011
Date of Patent:
February 19, 2013
Assignee:
General Electric Company
Inventors:
Stephen Daley Arthur, Kevin Matocha, Peter Sandvik, Zachary Stum, Peter Losee, James McMahon
Abstract: Device structures, fabrication methods, operating methods, and design structures for a silicon controlled rectifier. The method includes applying a mechanical stress to a region of a silicon controlled rectifier (SCR) at a level sufficient to modulate a trigger current of the SCR. The device and design structures include a SCR with an anode, a cathode, a first region, and a second region of opposite conductivity type to the first region. The first and second regions of the SCR are disposed in a current-carrying path between the anode and cathode of the SCR. A layer is positioned on a top surface of a semiconductor substrate relative to the first region and configured to cause a mechanical stress in the first region of the SCR at a level sufficient to modulate a trigger current of the SCR.
Type:
Application
Filed:
June 24, 2011
Publication date:
December 27, 2012
Applicant:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Renata Camillo-Castillo, Erik M. Dahlstrom, Robert J. Gauthier, JR., Ephrem G. Gebreselasie, Richard A. Phelps, Yun Shi, Andreas D. Stricker
Abstract: A circuit arrangement includes: a reverse conducting IGBT configured to allow for conducting a load current in a forward direction and in a reverse direction, the IGBT having a load current path and a gate electrode; a gate control unit connected to the gate electrode and configured to activate or deactivate the IGBT by charging or, respectively, discharging the gate electrode in accordance with a gate control signal; a gate driver unit configured to detect whether the IGBT conducts current in the forward direction or the reverse direction by sensing a gate current caused by a change of a voltage drop across the load path due to a changing of the reverse conducting IGBT into its reverse conducting state, the gate control unit further configured to deactivate the IGBT or to prevent an activation of the IGBT via its gate electrode when the gate driver unit detects that the IGBT is in its reverse conducting state.
Abstract: A method and a circuit for controlling a thyristor (V1) into conducting state, the thyristor (V1) being in a rectifier, which rectifier supplies DC voltage to a DC voltage circuit. The circuit comprising a trigger capacitor (C2) adapted to be charged from the voltage difference across the thyristor (V1) when the anode-to-cathode voltage of the thyristor is positive, a zener diode (V5) adapted to be triggered with the voltage of the trigger capacitor (C2), when the voltage of the trigger capacitor (C2) exceeds the breakdown voltage of the zener diode (V5), and an auxiliary thyristor (V3) adapted to be triggered with the current from the trigger capacitor (C2) flowing via the zener diode (V5), wherein the cathode of the auxiliary thyristor (V3) is connected to the gate of the thyristor (V1) for triggering the thyristor (V1) with the current from the trigger capacitor (C2) flowing via the auxiliary thyristor (V3) for using the thyristor (V1) in a diode mode.
Abstract: An electronic device includes a wide bandgap thyristor having an anode, a cathode, and a gate terminal, and a wide bandgap bipolar transistor having a base, a collector, and an emitter terminal. The emitter terminal of the bipolar transistor is directly coupled to the anode terminal of the thyristor such that the bipolar transistor and the thyristor are connected in series. The bipolar transistor and the thyristor define a wide bandgap bipolar power switching device that is configured to switch between a nonconducting state and a conducting state that allows current flow between a first main terminal corresponding to the collector terminal of the bipolar transistor and a second main terminal corresponding to the cathode terminal of the thyristor responsive to application of a first control signal to the base terminal of the bipolar transistor and responsive to application of a second control signal to the gate terminal of the thyristor. Related control circuits are also discussed.
Type:
Application
Filed:
May 8, 2009
Publication date:
November 11, 2010
Inventors:
Qingchun Zhang, James Theodore Richmond, Robert J. Callanan
Abstract: A method and apparatus for supplying a voltage in an information handling system. A modulated voltage signal output circuit linked to an amplitude control element. The amplitude control element linked to a voltage output circuit, the output circuit including one or more electrical energy-storage elements to receive an electrical current. The voltage output circuit having one or more electronic switches to alter the current passing to the energy-storage element(s) to provide a modulated voltage output.
Abstract: An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.
Abstract: A cell-based integrated circuit comprises a first supply voltage terminal and a second supply voltage terminal. A standard cell comprising a thyristor circuit comprising a first input inputs the first supply voltage. A second input inputs the second supply voltage. A first output outputs a first output voltage corresponding to the first supply voltage and a second output to output a second output voltage corresponding to the second supply voltage.
Abstract: A method and an apparatus for resetting at least one Silicon Controlled Rectifier (SCR) in an H-bridge. The apparatus comprises a current interruption device for controlling current flow through the H-bridge, and a negative voltage detector for detecting a negative voltage at the H-bridge and driving the current interruption device to control the current flow through the H-bridge.
Abstract: A semiconductor device includes an anode electrode in Schottky contact with an n-type drift layer formed in an SiC substrate and a JTE region formed outside the anode electrode. The JTE region is made up of a first p-type zone formed in an upper portion of the drift layer under an edge of the anode electrode and a second p-type zone formed outside the first p-type zone having a lower surface impurity concentration than the first p-type zone. The second p-type zone is provided 15 ?m or more outwardly away from the edge of the anode electrode. The surface impurity concentration of the first p-type zone ranges from 1.8×1013 to 4×1013 cm?2, and that of the second p-type zone ranges from 1×1013 to 2.5×1013 cm?2.
Abstract: An exemplary embodiment includes a method for balancing thyristor bridge circuits, the method comprising, determining currents of thyristors in a first leg of thyristors of a thyristor bridge circuit, determining a first set of gate firing times for the thyristors in the first leg of thyristors responsive to determining the current of the thyristors in the first gate of thyristors, wherein the first set of gate firing times are operative to balance a current load between the thyristors in the first leg of thyristors, and gating the thyristors in the first leg of thyristors according to the first set of gate firing times.
Abstract: An ultra low power relaxation CMOS oscillator for low frequency clock generation comprises a current source and a pair of capacitors that are alternatingly charged by the current source and discharged by thyristor-based inverters being used as comparators. No separate bias currents are needed.
Type:
Grant
Filed:
December 29, 2006
Date of Patent:
April 28, 2009
Assignee:
Texas Instruments Incorporated
Inventors:
Johannes Gerber, Santiago Iriarte Garcia
Abstract: The highest-power switches now available are based on thyristor-type devices: GTOs (Gate turn-off thyristors), MTOs (MOS controlled turn-off thyristors), IGCTs (Integrated gate commutated thyristors), and the new ETOs (Emitter turn-off thyristors). These devices handle kilovolts and kiloamperes for megawatt inverters/converters. Measurements by the inventors show that conduction losses of MOSFETs and switching losses of IGCTs are drastically decreased by cryo-cooling. IGCTs, ETOs, and MTOs, together with many small, low voltage MOSFETs for gate and emitter turn-off circuitry, are cryo-cooled to attain much higher switching speeds and a reduction in size, weight and cost of high-power (megawatt range) equipment.
Type:
Grant
Filed:
June 13, 2005
Date of Patent:
April 1, 2008
Inventors:
Otward Mueller, Eduard K. Mueller, Michael J. Hennessy
Abstract: A vertical SCR switch to be controlled by a high-frequency signal having at least four main alternated layers. The switch includes a gate terminal and a gate reference terminal connected via integrated capacitors to corresponding areas. In the case of a thyristor, having on its front surface side a main P-type semiconductor area formed in an N-type gate semiconductor area, a first portion of the main area being connected to one of the main areas, a second portion of the main area is connected to one of the control terminals via a first integrated capacitor, and a portion of the gate area being connected to the other of the control terminals via a second integrated capacitor.
Abstract: A method and apparatus are provided for driving an electro-optic converter assembly with an information signal. The method includes the steps of disposing a resistor having a resistance substantially equal to a resistance of the electro-optic converter adjacent the electro-optic converter, coupling the electro-optic converter and resistor together, in series, to form a current loop, driving the electro-optical converter end of the current loop with the information signal and driving the resistor end of the current loop with an opposite polarity of the information signal.
Abstract: A family of emitter turn-off thyristors and their drive circuit comprise a gate turn-on (GTO) thyristor, a first switch, the drain of the first switch being connected to the cathode of the GTO thyristor, and a second switch connected between the gate of the GTO thyristor and the source of the first switch. The first switch consists of many paralleled metal oxide semiconductor field effect transistors (MOSFETs). The anode of the GTO thyristor and the source of the first switch serve as the annode and the cathode, respective, of the emitter turn-off thyristor. The emitter turn-off thyristor has four control electrodes: the gate of the GTO thyristor, the control electrode of the second switch, the gate of the first switch, and the cathode of the GTO thyristor. The drive circuit comprises a current source circuit, a voltage clamp circuit, a current direction detector, and a control circuit. The ETO thyristor further comprises a current sensing and over-current detector circuit.
Type:
Grant
Filed:
March 5, 2003
Date of Patent:
March 23, 2004
Assignee:
Virginia Tech Intellectual Properties, Inc.
Abstract: A compact, solid state, high voltage switch capable of high conduction current with a high rate of current risetime (high di/dt) that can be used to replace thyratrons in existing and new applications. The switch has multiple thyristors packaged in a single enclosure. Each thyristor has its own gate drive circuit that circuit obtains its energy from the energy that is being switched in the main circuit. The gate drives are triggered with a low voltage, low current pulse isolated by a small inexpensive transformer. The gate circuits can also be triggered with an optical signal, eliminating the trigger transformer altogether. This approach makes it easier to connect many thyristors in series to obtain the hold off voltages of greater than 80 kV.
Abstract: The integrated gate dual transistor (IGDT) has two controllable gates (G1, G2), a first gate (G1) being provided on the cathode side and being driven via a low-inductance first gate terminal with a first gate current, and a second gate (G2) being provided on the anode side and being driven via a low-inductance second gate terminal with a second gate current. In the switch-off operation of the IGDT, the rate of rise of the voltage across the IGDT is limited via the two gates.
Type:
Application
Filed:
September 19, 2002
Publication date:
April 10, 2003
Inventors:
Oscar Apeldoorn, Eric Carroll, Peter Streit, Andre Weber
Abstract: A compact, solid state, high voltage switch capable of high conduction current with a high rate of current risetime (high di/dt) that can be used to replace thyratrons in existing and new applications. The switch has multiple thyristors packaged in a single enclosure. Each thyristor has its own gate drive circuit that circuit obtains its energy from the energy that is being switched in the main circuit. The gate drives are triggered with a low voltage, low current pulse isolated by a small inexpensive transformer. The gate circuits can also be triggered with an optical signal, eliminating the trigger transformer altogether. This approach makes it easier to connect many thyristors in series to obtain the hold off voltages of greater than 80 kV.
Abstract: A method and apparatus for generating low-jitter, high-voltage and high-current pulses for driving low impedance loads such as detonator fuses uses a MOSFET driver which, when triggered, discharges a high-voltage pre-charged capacitor into the primary of a toroidal current-multiplying transformer with multiple isolated secondary windings. The secondary outputs are suitable for driving an array of thyristors that discharge a precharged high-voltage capacitor and thus generating the required high-voltage and high-current pulse.
Type:
Grant
Filed:
November 1, 2000
Date of Patent:
October 8, 2002
Assignee:
The United States of America as represented by the United
States Department of Energy
Abstract: A gate-controlled switch includes a gate turn-off thyristor in series with a diode. By using the diode in series with the GTO, the switch significantly increases the turn-off voltage that can be used for the current commutation. The unity turn-off gain and the snubberless turn-off capability are demonstrated.
Type:
Grant
Filed:
November 9, 2000
Date of Patent:
July 30, 2002
Assignee:
Virginia Tech Intellectual Properties, Inc.
Abstract: An apparatus for isolating driver circuits from silicon-controlled rectifier (SCR) circuits in an electric switch. The driver circuits are located on a driver-board, which includes an infrared (IR) emitter. The SCR circuits are located on a SCR switch-board, which includes an IR receiver. An insulating body is positioned between the driver-board and the switch-board. The insulating body encloses a light-pipe to optically link the infrared emitter to the infrared detector. Control signals can be communicated from the driver circuits to the SCR circuits via the IR emitter, the light-pipe, and the IR receiver.
Abstract: A gate terminal plate (1) of a GCT thyristor (90), a connecting substrate (70) of a driving device and a cathode electrode plate (10) are interposed between a set of metal rings (7A) and (7C) fastened to each other with a screw (8). The cathode electrode plate (10) is connected to a cathode post electrode (31) of the GCT thyristor (90). The screw (8) is electrically insulated from the metal ring (7A) and the gate terminal plate (1) through an insulator (9). By this structure, the gate terminal plate (1) and the cathode electrode plate (10) are directly connected to a first metallized layer (5) and a second metallized layer (6) which are provided on two main surfaces of the connecting substrate (70) of the driving device, respectively. Thus, resistance and inductance components in a path for a gate current are reduced and an assembly is simplified.
Abstract: The present invention relates to a normally-on bidirectional switch, including, in parallel between two power terminals of the switch, a first cathode-gate thyristor, the anode of which is connected to a first power terminal, a second anode-gate thyristor, the anode of which is connected to a second power terminal, and a resistor in series with a controllable switch, the midpoint of this series association being connected to the respective gates of the two thyristors. The present invention also provides a monolithic integration of the switch.
Abstract: A gate driving circuit for power semiconductor switch including
a DC voltage source whose positive output terminal is connected to a cathode of a power semiconductor switch, a series circuit of a reactor and a turn-on switching element connected across the positive output terminal of the DC voltage source and a gate of the power semiconductor switch,
a turn-off switching element connected across the gate of the power semiconductor switch and a negative output terminal of the DC voltage source, a freewheel diode connected across the negative output terminal of the DC voltage source and a junction point between the turn-on switching element and the reactor, and a control circuit for controlling the turn-on and turn-off switching elements such that the power semiconductor switch is kept non-conductive by making the first and second switching elements in off-state and in on-state, respectively, upon turning-on the power semiconductor switch, after storing energy in said reactor by changing the first switching e
Abstract: A semiconductor integrated circuit device has an output circuit formed in a CMOS structure and composed of a P-channel MOS transistor that has its gate connected to an input terminal, has its source connected to a power source line, and has its drain connected to an output terminal and an N-channel MOS transistor that has its gate connected to the input terminal, has its source connected to ground, and has its drain connected to the output terminal. A first protection diode is formed in parallel with the source-drain channel of the P-channel MOS transistor. A first NPN-type transistor is so formed that its base is connected to ground and its collector-emitter path is connected in parallel with the source-drain channel of the P-channel MOS transistor. A second protection diode is formed in parallel with the source-drain channel of the N-channel MOS transistor. A thyristor circuit is provided in parallel with the source-drain channel of the N-channel MOS transistor.
Abstract: The present invention relates to a component forming a normally on dual thyristor, which can be turned off by a voltage pulse on the control electrode, including a thyristor, a first depletion MOS transistor, the gate of which is connected to the source, connected between the anode gate and the cathode of the thyristor, and a second enhancement MOS transistor, the gate of which is connected to a control terminal.
Type:
Grant
Filed:
April 15, 1999
Date of Patent:
February 13, 2001
Assignee:
Centre National de la Recherche Scientifique
Inventors:
Jean-Louis Sanchez, Jean Jalade, Jean-Pierre Laur, Henri Foch
Abstract: In a gate driver device, cathode conductor 2, gate conductor 3, and positive and negative conductors 8 and 9 between the principal turn-on and turn-off capacitors and MOSFET switching elements Q11-Q1i and Q21-Q2j are disposed on a wide plate. A thin insulation layer is inserted between conductor 3 and conductors 8 and 9. Numerous chip-type ceramic capacitors C11-C1m and C21-C2n to be used as principal capacitors are arranged in rows in the space between conductor 2 and conductors 8 and 9. The gate voltage of switching elements Q11-Q1i is reduced exponentially by time constant circuit TC, and the leak inductance of transformer Thf is employed to smooth the charging current.
Abstract: The constitution includes a heater 2 used as current receiving element, a thyristor 3 placed in the current travelling route of the heater 2, a series connection circuit of a capacitor 4 and diode 5 for control power source connected parallel to the thyristor 3, a Zener diode 9 as a constant voltage element connected to the gate of the thyristor 3, and a control circuit 6 connected parallel to the capacitor 4, with its control terminal connected to the gate of the thyristor 3, whereby a specified control voltage determined by the Zener voltage of the Zener diode 9 is obtained at the first capacitor 4 by the control of the thyristor 3, so that the transformer for stepping down the supply voltage is not necessary.
Type:
Grant
Filed:
August 8, 1997
Date of Patent:
December 12, 2000
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A solid state relay includes a power semiconductor controlled by a gate electrode. A current detector provides a signal which is a function of the absolute value of the current through the power semiconductor. An evaluation circuit coupled to the current detector receives the current signal. The current detector may include a ferromagnetic core surrounding a conductor coupled to the power semiconductor, a coil wound around the core, and an oscillator generating a carrier signal and a detection circuit, both coupled to the core. The current detector is used to control latching of the relay and to generate status signals if predetermined parameters are exceeded.
Abstract: A drive circuit for driving scanning lines or data lines in an EL or plasma display panel has a pair of power recovery lines each connected to a corresponding one of two thyristors. The first thyristor recovers electric power from the scanning line and the second thyristor supplies the electric power to another scanning line. The lower ON-resistance and lower parasitic capacitance of the thyristors provides an efficient recovery of the electric power while suppressing a latch-up failure of CMOSFETs.
Abstract: A switching device has a control section to transfer a gate control signal which switches plural thyristors from an ON state to an OFF state after a parallel switch is open and an opening degree of the parallel switch is met where no arc discharge is generated at a contact point in the parallel switch.
Abstract: The invention provides a silicon controlled rectifier having an anode and a cathode and including an NPN transistor and a PNP transistor. The NPN transistor has an emitter coupled to the cathode, a base and a collector. The PNP transistor has a base coupled to the NPN collector, an emitter coupled to the anode, a first collector coupled to the NPN base and a second collector coupled to the NPN collector.
Abstract: A power controller device which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the "reset" input of a R-S flip flop, while an "0" crossing detector controls the "set" input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the "reset" and "set" inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations.
Type:
Grant
Filed:
September 4, 1997
Date of Patent:
April 6, 1999
Assignee:
The United States of America as represented by the United States Department of Energy
Abstract: A three-state switch designed to be inserted in an ac supply circuit and associated with a state selection circuit. In a first state, the switch is open and does not allow current to flow. In a second state, the switch allows current of a first polarity to flow. In a third state, the switch allows a current of a second polarity to flow. The switch includes a cathode gate thyristor and an anode gate thyristor connected head-to-tail, the gate of the cathode gate thyristor forming a control terminal and being connected through a resistor to the gate of the anode gate thyristor.
Abstract: An improved turbine engine ignition exciter circuit. Energy stored in an exciter tank capacitor is subsequently switched to the load (igniter plug) through a novel thyristor switching device specifically designed for pulse power applications. The switching device is designed and constructed to include, for example, a highly interdigitated cathode/gate structure. The semiconductor switching device is periodically activated by a trigger circuit which may be comprised of either electromagnetic or optoelectronic triggering circuitry to initiate discharge of energy stored in exciter tank capacitor to mating ignition lead and igniter plug. Likewise, the present invention allows new flexibility in the output PFN (Pulse Forming Network) stage, eliminating need for specialized protective output devices such as saturable output inductors. Due to considerably higher di/dt performance of the device, true high voltage output pulse networks may be utilized without damage to the semiconductor switching device.
Type:
Grant
Filed:
April 1, 1997
Date of Patent:
December 22, 1998
Assignee:
Cooper Industries, Inc.
Inventors:
Theodore Steven Wilmot, John Cuervo Driscoll, Steven John Kempinski, James R. Berliner
Abstract: A gate drive circuit for a silicon controlled rectifier (SCR) connected in an a-c power circuit includes a voltage divider network connected between a d-c voltage source and the SCR for developing a varying voltage on a control node, depending upon whether the anode-to-cathode a-c voltage of the SCR is positive or negative. A first switching transistor, responsive to the control node voltage, controls conduction of a second switching transistor connected between the d-c voltage source and a voltage regulated driver circuit. In this way, a constant drive current is applied to the SCR gate only while the anode-to-cathode voltage of the SCR is positive.
Type:
Grant
Filed:
June 18, 1997
Date of Patent:
December 15, 1998
Assignee:
York International Corporation
Inventors:
Harold R. Schnetzka, Dean K. Norbeck, Donald L. Tollinger
Abstract: An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (I.sub.A) is entirely commutated from the gate electrode (3G) towards the node (13) through the gate driver (4) in a direction reverse to a turn-off control current (I.sub.G) A peak voltage suppressing circuit (5) clamps an anode-cathode voltage (V.sub.A-K) which rises on, to a prescribed voltage value for a prescribed time. This prevents losses caused by a snubber circuit. Commutation of a main current to the gate prevents locally concentrating in the cathode side of the semiconductor switching element, to thereby increase the turn off capability of the semiconductor switching element. Further, this prevents or reduces dissipation of large amount produced by a discharge of the electric charges from a snubber capacitor.
Abstract: An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (IA) is entirely commutated from the gate electrode (3G) towards the node (13) through the gate driver (4) in a direction reverse to a turn-off control current (IG) A peak voltage suppressing circuit (5) clamps an anode-cathode voltage (VA-K) which rises on, to a prescribed voltage value for a prescribed time. This prevents losses caused by a snubber circuit. Commutation of a main current to the gate prevents locally concentrating in the cathode side of the semiconductor switching element, to thereby increase the turn off capability of the semiconductor switching element. Further, this prevents or reduces dissipation of large amount produced by a discharge of the electric charges from a snubber capacitor.