With Compensation For Temperature Fluctuations Patents (Class 327/513)
  • Publication number: 20120293239
    Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 22, 2012
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 8308359
    Abstract: An apparatus including a temperature-sensing circuit. The temperature-sensing circuit can include an amplifier. The amplifier can include a positive input and a negative input. The negative input can be configured to be driven by a temperature-independent signal. A first transistor electrically can be connected to the positive input. The first transistor can be configured to be controlled by a temperature signal. A temperature threshold resistance and a hysteresis resistance can be electrically connected in series to the positive input. A second transistor can be electrically connected in parallel with the hysteresis resistance.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: November 13, 2012
    Assignee: Intellectual Ventures Holding 83 LLC
    Inventor: Darryl G. Walker
  • Patent number: 8305134
    Abstract: A reference current source circuit outputs a constant reference current even if surrounding environments such as temperature and power source voltage change in a power source circuit that operates in a minute current region in an order of nanoamperes. The reference current source circuit includes an nMOS-configured power source circuit, a pMOS-configured power source circuit, and a current subtracter circuit. The nMOS-configured power source circuit includes a current generating nMOSFET, and generates a first current having temperature characteristics of an output current dependent on an electron mobility. The pMOS-configured power source circuit includes a current generating pMOSFET, and generates a second current having temperature characteristics of an output current dependent on a hole mobility. The current subtracter circuit generates a constant reference current by subtracting the second current from the first current.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 6, 2012
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Tetsuya Hirose, Toyoaki Kito, Yuji Osaki
  • Patent number: 8299844
    Abstract: An amplifier system can include an input amplifier configured to receive an analog input signal and provide an amplified signal corresponding to the analog input signal. A tracking loop is configured to employ delta modulation for tracking the amplified signal, the tracking loop providing a corresponding output signal. A biasing circuit is configured to adjust a bias current to maintain stable transconductance over temperature variations, the biasing circuit providing at least one bias signal for biasing at least one of the input amplifier and the tracking loop, whereby the circuitry receiving the at least one bias signal exhibits stable performance over the temperature variations. In another embodiment the biasing circuit can be utilized in other applications.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: October 30, 2012
    Assignee: Case Western Reserve University
    Inventors: Steven L. Garverick, Xinyu Yu
  • Publication number: 20120268185
    Abstract: An adaptive delay device that provides a delay to a signal based on circuit conditions such as temperature, supply voltage values and/or fabrication processes. The adaptive delay device may respond to circuit conditions by charging a capacitive device to a threshold voltage. A comparator may incorporate the adaptive delay device to provide adaptive timing for the comparator functions thereby attaining improved noise performance and/or reduce power consumption.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 25, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ronald KAPUSTA
  • Patent number: 8292503
    Abstract: A semiconductor device including a temperature sensor includes a pull up circuit, a pull down circuit, a first additional current path, and a second additional current path. The pull up circuit is configured to generate a pull up current that contributes to generation of a first output current. The pull down circuit is operably coupled to the pull up circuit at an output node and configured to generate a pull down current that contributes to generation of a second output current. The first additional current path, when enabled, is configured to combine a first additional current with the pull up current to comprise the first output current. The second additional current path, when enabled, is configured to combine a second additional current with the pull down current to comprise the second output current. Respective enablement of the first additional current path and the second additional current path is complementary.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: October 23, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Dong Pan
  • Patent number: 8278994
    Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 2, 2012
    Assignee: Power Integrations, Inc.
    Inventors: David Kung, Leif Lund
  • Patent number: 8269548
    Abstract: General speaking, a resistor of high resistivity has a negative-temperature-coefficient and a resistor of low resistivity has a positive-temperature-coefficient. Utilizing this characteristic, an appropriate proportion between the above resistors can be found to make a combined resistor with an approximate zero-temperature-coefficient. The combined resistor can be used to design a circuit for generating voltage and current with approximate zero-temperature-coefficients.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: September 18, 2012
    Assignee: Princeton Technology Corporation
    Inventor: Chun-Jen Huang
  • Publication number: 20120223764
    Abstract: A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 6, 2012
    Applicant: International Business Machines Corporation
    Inventors: Malcolm Scott Allen-Ware, John Bruce Carter, Elmootazbellah Nabil Elnozahy, Wei Huang
  • Patent number: 8258854
    Abstract: A temperature sensor having one or more mirror circuits output temperature dependent output signals is disclosed in one embodiment. The temperature sensor includes a sampling circuit coupled to receive a clock signal that samples the output signals for a duration of a predetermined number of clock cycles. The temperature sensor additionally includes a phase control circuit that receives the clock signal and generates a control signal that enables subsequent sampling operations. Each subsequent sampling operation has a duration of the predetermined number of clock cycles. The control signal from the phase control circuit further enables input and output terminals of respective circuit components in the mirror circuits to be switched for each subsequent sampling operation.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: September 4, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Dong Pan
  • Publication number: 20120218026
    Abstract: A differential voltage controlled current source generating one or more output currents is based upon a single external resistor. The differential voltage controlled current source may generate an output current that is proportional to a received differential voltage and a bias current with the use of a single external resistor. The technique may be used to generate multiple accurate and process independent current sources. The current sources may be a zero temperature coefficient (ZTC) current, a proportional to absolute temperature (PTAT) current, or an inversely proportional to absolute temperature (NTAT) current. The output of the current sources may be inversely proportional to the resistance of the external resistor.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 30, 2012
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Praveen Varma Nadimpalli, Pradeep Charles Silva
  • Publication number: 20120218027
    Abstract: There is provided an electronic device that includes a heatsink and a set of IGBTs coupled to the heatsink and configured to deliver power to a field exciter and a battery. The electronic device also includes a temperature sensor disposed in the heatsink and a controller. The controller is configured to receive a temperature reading from the temperature sensor and, based on the temperature reading, determine a junction temperature for at least one of the IGBTs of the set of IGBTs. The controller is also configured to de-rate an output power provided by each of the IGBTs based, at least in part, on the junction temperature.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 30, 2012
    Applicant: General Electric Company, a New York Corporation
    Inventor: Dimitrios Ioannidis
  • Publication number: 20120212284
    Abstract: In one embodiment, a temperature compensation circuit includes a bias circuit configured to output a bias current having a current value increasing in proportion to an absolute temperature in a low-temperature region, and having a greater current value than the current value proportional to the absolute temperature in a high-temperature region, and a transistor which is supplied with the bias current. The bias circuit includes first to third transistors, a fourth transistor through which a first current flows, a fifth transistor, a sixth transistor through which a second current flows, and a control circuit having a connection terminal capable of being connected with an external resistor for adjusting a magnitude of the second current. The bias circuit generates a third current by adding the first current to the second current, and outputs the bias current that is the third current or a fourth current depending on the third current.
    Type: Application
    Filed: February 23, 2012
    Publication date: August 23, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Horie, Minoru Nagata
  • Patent number: 8248176
    Abstract: A disclosed current source circuit includes a current mirror circuit having two enhancement-type MOS transistors, a depletion-type MOS transistor configured to be connected to a drain of one of the two enhancement-type MOS transistors and to function as a constant current source, and a resistor configured to have a negative temperature property and be connected to a source of the one of the two enhancement-type MOS transistors.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: August 21, 2012
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Yoichi Takano, Koichi Yamaguchi, Koichi Kuwahara
  • Publication number: 20120187911
    Abstract: An output circuit has a smaller area and restrains outputs from becoming unstable even if a power supply voltage is lower than an operating voltage. A supply terminal of an inverter circuit is provided with switch circuit, and the switch circuit stops the operation of the inverter circuit when the power supply voltage is lower than the operating voltage of the circuit. Further, the output terminal of the inverter circuit is provided with a current source to fix the output to the power supply voltage when the operation of the inverter circuit is stopped.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 26, 2012
    Inventors: Masahiro Mitani, Naohiro Hiraoka, Masakazu Sugiura, Atsushi Igarashi
  • Patent number: 8215830
    Abstract: An apparatus and method is described for measuring a local surface temperature of a semiconductor device under stress. The apparatus includes a substrate, and a reference MOSFET. The reference MOSFET may be disposed closely adjacent to the semiconductor device under stress. A local surface temperature of the semiconductor device under stress may be measured using the reference MOSFET, which is not under stress. The local surface temperature of the semiconductor device under stress may be determined as a function of drain current values of the reference MOSFET measured before applying stress to the semiconductor device and while the semiconductor device is under stress.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: July 10, 2012
    Assignee: Infineon Technologies AG
    Inventor: Rolf-Peter Vollertsen
  • Patent number: 8217698
    Abstract: The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: July 10, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Chung-Kuang Chen, Chun-Hsiung Hung, Han-Sung Chen
  • Patent number: 8217706
    Abstract: A method and circuit for managing thermal performance of an integrated circuit. Temperature sensing circuits and a plurality of power FETs that are coupled together in parallel are manufactured from a semiconductor substrate. Each temperature sensing circuit monitors the temperature of the portion of the semiconductor substrate near or including a corresponding power FET. When the temperature of the semiconductor substrate near one or more of the power FETs reaches a predetermined value, the corresponding temperature sensing circuit reduces a voltage appearing on the gate of the power FET. The reduced voltage increases the on-resistance of the power FET and channels a portion of its current to others of the plurality of power FETs. The power FET continues operating but with a reduced current flow. When the temperature of the semiconductor substrate falls below the predetermined value, the gate voltage of the power FET is increased to its nominal value.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: July 10, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Alan R. Ball, Stephen P. Robb
  • Patent number: 8217708
    Abstract: A temperature sensor performs more precise temperature measurement, even when manufacturing fluctuations are present in semiconductor elements forming a circuit for generating a temperature-dependent current.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: July 10, 2012
    Assignee: Seiko Instruments Inc.
    Inventor: Kiyoshi Yoshikawa
  • Patent number: 8217707
    Abstract: According to one embodiment, a system and method for operating an Integrated Circuit (IC) includes inputting power to the IC in bursts, sensing an IC temperature using a temperature sensor, operating the IC by controlling the power to be outputted by the IC during the burst in dependence on the sensed IC temperature compared to a reference IC temperature using a controller, wherein the IC temperature is obtained at a predetermined moment prior to a start of the burst, and the IC is operated by setting an allowable power to be outputted by the IC prior to the start of the burst.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: July 10, 2012
    Assignee: ST-Ericsson SA
    Inventor: Leonardus C. H. Ruijs
  • Patent number: 8212184
    Abstract: Operation of complex integrated circuits at low temperatures may be enhanced by providing active heating elements within the integrated circuit so as to raise the temperature of at least critical circuit portions at respective operational phases, such as upon power-up. Consequently, enhanced cold temperature performance may be obtained on the basis of existing process elements in order to provide design stability without requiring extensive circuit simulation or redesign of well-established circuit architectures.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: July 3, 2012
    Assignee: GlobalFoundries, Inc.
    Inventors: Anthony Mowry, Casey Scott, Maciej Wiatr, Ralf Richter
  • Patent number: 8212605
    Abstract: A temperature compensation circuit includes a bias circuit configured to output a bias current having a current value increasing in proportion to an absolute temperature in a low-temperature region in which a temperature is lower than a predetermined temperature, and having a greater current value than the current value proportional to the absolute temperature in a high-temperature region in which the temperature is equal to or greater than the predetermined temperature, and a transistor having a control terminal supplied with the bias current.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: July 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Horie, Minoru Nagata
  • Patent number: 8210744
    Abstract: An apparatus for detecting a temperature using transistors includes a plurality of temperature detecting units that become selectively active according to predetermined temperature intervals; and a detection signal output unit that generates detection signals according to the signals transmitted by the plurality of temperature detecting units, and outputs the detection signals.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: July 3, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yoon-Jae Shin, Sang-Jin Byun
  • Patent number: 8212606
    Abstract: An apparatus is provided that includes a drift trimming stage that includes a first current source providing a current with a first temperature dependency and a second current source providing a current with a second temperature dependency. The first and the second current source are coupled at a first node and configured to have equal currents at a first temperature. There is further a third current source providing a current with a third temperature dependency and a fourth current source providing a current with a fourth temperature dependency. The third current source and the fourth current source are coupled at a second node and configured to have equal currents at the first temperature. There is a first resistor coupled between the first node and a third node, a second resistor coupled between the second node and the third node. The first node and the second node are coupled to provide a combined voltage drop across the first resistor and the second resistor for reducing the offset drift.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: July 3, 2012
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Martijn F. Snoeij, Mikhail V. Invanov
  • Publication number: 20120161852
    Abstract: A power switch current estimator for a solid state power switch. The power switch includes a control terminal, an input current power terminal, and an output current power terminal. The power switch is further configured with at least one sense terminal. One or more parasitic elements define an electrical pathway between a power terminal and a corresponding sense terminal. A driver unit that selectively turns the power switch on and off is connected to the control terminal and a sense terminal. A current estimator generates an estimated level of current circulating through the solid state power switch in real time in response to one or more switching events of the power switch. The estimated level of current is based on values of at least one of the parasitic elements such that the estimated level of load current substantially corresponds to an actual level of load current circulating through the solid state power switch.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 28, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Alvaro Jorge Mari Curbelo, Thomas Alois Zoels
  • Publication number: 20120161853
    Abstract: A circuit for temperature compensation is connected to a sensor. The circuit includes an impedance element and a voltage controller. The impedance element has one terminal connected to a second terminal of the sensor, and the other terminal connected to a low voltage source. The voltage controller has an input terminal connected to the second terminal of the sensor to receive a to-be-measured voltage, a reference terminal receiving a reference voltage, and an output terminal is connected to the first terminal of the sensor to adjust a voltage level of the high voltage source. When the sensor output voltage varies due to change of an environment temperature, the voltage controller compares the reference voltage with the varied to-be-measured voltage to adjust the voltage level of the high voltage source, thereby restoring the varied sensor output voltage to a voltage level before being varied.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 28, 2012
    Inventor: Chun-Yu TAI
  • Patent number: 8207782
    Abstract: A circuit to minimize thermally generated offset voltages includes a differential pair of transistors having a first transistor and a second transistor and coupled to a current source, a differential input having a first input coupled to the first transistor and having a second input coupled to the second transistor, a pair of bypass transistors having a first bypass transistor and a second bypass transistor, the first bypass transistor coupled in parallel with the first transistor and the second bypass transistor coupled in parallel with the second transistor, wherein the pair of bypass transistors is coupled to the current source, and control circuitry coupled to the pair of bypass transistors for controlling current through the pair of bypass transistors.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: June 26, 2012
    Assignee: HRL Laboratories, LLC
    Inventor: Albert E. Cosand
  • Publication number: 20120146695
    Abstract: A method and circuitry for adjusting the delay of a variable delay line (VDL) in a delay locked loop (DLL) or other delay element or subcircuit on an integrated circuit is disclosed. Such delay circuitry will inherently have a delay which is a function of temperature. Such temperature-dependent delays are compensated for by adjusting the power supply voltage of the VDL, delay element, or subcircuit. Specifically, a temperature sensing stage is used to sense the temperature of the integrated circuit. Information concerning the sensed temperature is sent to a regulator which derives the local power supply voltage from the master power supply voltage, Vcc, of the integrated circuit. If the temperature sensed is relatively high, the regulator increases the local power supply voltage, thus decreasing the delay and offsetting the increase in delay due to temperature.
    Type: Application
    Filed: February 8, 2012
    Publication date: June 14, 2012
    Applicant: Micron Technology, Inc.
    Inventor: David Zimlich
  • Publication number: 20120139617
    Abstract: The transition frequency of an inverter can vary with the transconductance of its internal transistors as a function of temperature and bias level. To maintain consistent transition frequency across temperatures, and therefore reduce the phase noise variation introduced by the inverter, systems, methods, and circuits are disclosed for biasing the inverter with a temperature varying current such that the transconductance of transistors remains constant across temperatures, while maintaining the lowest possible power consumption to do so. Various embodiments can include using current sources that have proportional-to-absolute-temperature (PTAT) devices.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Inventors: Danilo Gerna, Enrico Sacchi
  • Patent number: 8183914
    Abstract: Structures and methods for providing a temperature independent constant current reference are provided. A constant Gm circuit is disclosed with embodiments including a voltage controlled resistor providing a current into a current mirror, the current mirror sinking a reference current at its output. By providing a feedback loop that controls the voltage controlled resistor, a temperature compensated circuit may be obtained. The temperature dependence of the voltage controlled resistor is positive and the feedback circuitry maintains this resistor at a value that compensates for the negative temperature dependence of the current mirror circuit. The reference current is thus obtained at a predetermined level independent of temperature.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: May 22, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Chien-Hung Chen, Min-Shueh Yuan
  • Publication number: 20120119819
    Abstract: There is provided a current circuit having a selective temperature coefficient. The current circuit may include: a first current generating unit generating a first current having a positive temperature characteristic which increases depending on temperature; a second current generating unit generating a second current having a negative temperature characteristic which decreases depending on temperature; a multiplying unit multiplying and outputting each of the first current and the second current; and a switching unit selectively synthesizing and outputting a plurality of currents outputted from the multiplying unit depending on on/off control signals. Therefore, it is possible to prevent performance from being deteriorated by temperature and easily and efficiently adjust a temperature coefficient through a simple switching logic.
    Type: Application
    Filed: January 19, 2011
    Publication date: May 17, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Chul PYO, Dong Ok HAN, Sung Tae KIM, Soo Woong LEE, Kyung Uk KIM, Sang Gyu PARK
  • Publication number: 20120110352
    Abstract: An apparatus and method for per-node thermal control of processing nodes is disclosed. The apparatus includes a plurality of processing nodes, and further includes a power management unit configured to set a first frequency limit for at least one of the plurality of processing nodes responsive to receiving an indication of a first detected temperature greater than a first temperature threshold, wherein the first detected temperature is associated with the one of the plurality of processing nodes. The power management unit is further configured to set a second frequency limit for each of the plurality of processing nodes responsive to receiving an indication of a second temperature greater than a second temperature threshold.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Inventors: Alexander Branover, Samuel D. Naffziger
  • Patent number: 8159284
    Abstract: A method and circuit for managing thermal performance of an integrated circuit. In accordance with an embodiment, a thermal limit circuit and a semiconductor device are manufactured from a semiconductor material, wherein the thermal limit circuit is configured to operate at a temperature level that is different from a threshold temperature in response to the thermal sensing element sensing a temperature at least equal to the threshold temperature.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: April 17, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Alan R. Ball
  • Patent number: 8152372
    Abstract: Described herein are methods and apparatuses for testing an integrated circuit chip including a thermal diode. According to various embodiments, a method for testing an integrated circuit chip including a thermal diode may comprise performing a test operation on the integrated circuit chip, and during the test operation, detecting a signal representative of a temperature sensed by a thermal diode embedded in the integrated circuit chip. Other embodiments may be described and claimed.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: April 10, 2012
    Assignee: Marvell International Ltd.
    Inventors: Hsui-Peng Peng, Jae-Hong Lee
  • Patent number: 8135559
    Abstract: A method for managing thermal condition of a thermal zone that includes multiple thermally controllable components include determining thermal relationship between the components and reducing temperature of a first component by reducing thermal dissipation of a second component.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: March 13, 2012
    Assignee: Intel Corporation
    Inventors: Guy M. Therien, Robert T. Jackson
  • Patent number: 8130025
    Abstract: A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter voltages generated by the bandgap temperature sensor and to generate a bandgap reference voltage according to the multiple base-emitter voltage signals, the bandgap reference voltage having a voltage level that remains substantially constant relative to environmental temperature variations.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: March 6, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Harold Kutz
  • Patent number: 8130024
    Abstract: A method and circuitry for adjusting the delay of a variable delay line (VDL) in a delay locked loop (DLL) or other delay element or subcircuit on an integrated circuit is disclosed. Such delay circuitry will inherently have a delay which is a function of temperature. In accordance with embodiments of the invention, such temperature-dependent delays are compensated for by adjusting the power supply voltage of the VDL, delay element, or subcircuit. Specifically, a temperature sensing stage is used to sense the temperature of the integrated circuit, and hence the VDL, delay element, or subcircuit. Information concerning the sensed temperature is sent to a regulator which derives the local power supply voltage from the master power supply voltage, Vcc, of the integrated circuit.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: March 6, 2012
    Assignee: Micron Technology, Inc.
    Inventor: David Zimlich
  • Patent number: 8125265
    Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: February 28, 2012
    Assignee: Power Integrations, Inc.
    Inventors: David Kung, Leif Lund
  • Patent number: 8123404
    Abstract: A temperature detector comprises a first current mirror, a second current mirror, a first pulse generator, a second pulse generator, a phase detector and a controller. The current of the first current mirror is in variation with temperature, but the current of the second current mirror is not. If the output pulse of the first pulse generator appears earlier than that of the second pulse generator, the controller enhances the output current of the second current mirror. If the output pulse of the first pulse generator appears later than that of the second pulse generator, the controller decreases the output current of the second current mirror.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: February 28, 2012
    Assignee: Nanya Technology Corp.
    Inventor: Wen Ming Lee
  • Publication number: 20120014182
    Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Inventors: In Soo WANG, Yu Jong Noh, Lee Hyun Kwon, Bon Kwang Koo
  • Publication number: 20120007659
    Abstract: A temperature compensated current source forms an uncompensated source current that is proportional to a reference voltage applied to an impedance, wherein the impedance varies with temperature. A temperature compensation current is formed that is proportional to absolute temperature (IPTAT). The uncompensated source current and the temperature compensation current is combined to form a temperature compensated source current and provided as an output of the current source.
    Type: Application
    Filed: July 30, 2010
    Publication date: January 12, 2012
    Inventor: Paolo Giovanni Cusinato
  • Patent number: 8092083
    Abstract: A system comprises a temperature sensor generate multiple base-emitter voltage signals by sequentially providing various currents to a transistor, and a system controller to determine a differential voltage signal according to the multiple base-emitter voltage signals, the differential voltage signal proportional to an environmental temperature associated with the transistor.
    Type: Grant
    Filed: October 1, 2007
    Date of Patent: January 10, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Garthik Venkataraman, Harold Kutz, Monte Mar
  • Patent number: 8092084
    Abstract: A method for precision thermal measurement and control, especially for bioreactors, as well as the correction of temperature sensitive probes such as pH and dissolved oxygen. Typical control requirements are +/?0.1° C. The thermal measurement circuit converts a sensor output to a high level voltage or current with great accuracy and provides noise immunity and sensor isolation. While digital outputs from sensor converters can have the greatest noise immunity, the noise associated with digital circuitry may contaminate low level sensor signals so in many cases an analog sensor converter is preferred because of low noise generation, especially if the converter is near the sensor. The circuit is low cost, reliable, generates minimal heat is immune to, and does not generate noise, and requires minimal calibration effort.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: January 10, 2012
    Assignee: Finesse Solutions, LLC
    Inventors: Alfred Riddle, Anthony Sproul
  • Patent number: 8076967
    Abstract: A device including a controllable semiconductor, sensor, and controller is provided. The controllable semiconductor is associated with a first operating parameter and a second operating parameter, wherein at least the first operating parameter is controllable. The sensor is in communication with the controllable semiconductor device and acquires data relating to the second operating parameter of the controllable semiconductor device. The controller is in communication with the controllable semiconductor device and the sensor, and the controller is configured to access device data associated with the controllable semiconductor, control the first operating parameter of the controllable semiconductor, and receive data from the first sensor relating to the second operating parameter.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: December 13, 2011
    Assignee: Raytheon Company
    Inventor: Boris S. Jacobson
  • Publication number: 20110298529
    Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.
    Type: Application
    Filed: August 15, 2011
    Publication date: December 8, 2011
    Applicant: Power Integrations, Inc.
    Inventors: David Kung, Leif Lund
  • Patent number: 8072259
    Abstract: N-channel field effect transistor Proportional To Absolute Temperature (N-PTAT) cells are connected to a first supply voltage and P-channel field effect transistor Proportional To Absolute Temperature (P-PTAT) cells are connected to a second supply voltage. A coupling circuit connects at least one of the N-PTAT cells to at least one of the P-PTAT cells. These circuits can be used to provide a voltage reference and/or a supply voltage level detector. Related operating methods are also described.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: December 6, 2011
    Assignee: Integrated Device Technology, inc.
    Inventor: Tacettin Isik
  • Publication number: 20110291741
    Abstract: A semiconductor chip includes a semiconductor body having an upper surface. At least one power semiconductor component is integrated in the semiconductor chip together with other circuitry. Two or more vertically spaced metallization layers are arranged on the surface of the semiconductor body. The top metallization layer includes terminals establishing an electrical connection to load terminals of the power semiconductor component. A current measurement resistor is formed by a portion of the top metallization layer for sensing a load current of the power semiconductor component. A temperature measurement resistor is formed by a portion of at least one of the vertically spaced metallization layers, electrically isolated from current measurement resistor but thermally coupled thereto such that the current measurement resistor and the temperature measurement resistor have the same temperature.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 1, 2011
    Inventors: Alexander Mayer, Guenter Herzele, Andreas Tschmelitsch, Matthias Kogler
  • Publication number: 20110291742
    Abstract: An output buffer with process and temperature compensation comprises an enable terminal, a clock generator, a PMOS threshold voltage detector, an NMOS threshold voltage detector, a first comparator, a second comparator, a first compensation code generator, a second compensation code generator and an output buffer stage, wherein the output buffer stage has an output stage, the output buffer stage means for controlling a drive current generated by the output stage, wherein the output stage has a first voltage output terminal, and the modulated drive current is capable of compensating slew rate of the first voltage output terminal.
    Type: Application
    Filed: July 28, 2010
    Publication date: December 1, 2011
    Inventors: Chua-Chin WANG, Ron-Chi Kuo, Jen-Wei Liu, Ming-Dou Ker
  • Patent number: 8067975
    Abstract: A circuit arrangement (e.g., an integrated circuit) generates a second or higher order compensation voltage to compensate for variations in operation parameters (e.g., temperature and process variations). In one aspect, the compensation voltage is applied to a MOS resistor to compensate for mobility variations of the MOS resistor by maintaining a stable equivalent resistance. The compensated MOS resistor can provide a relatively stable resistance for a variety of analog circuit applications, such as a current reference.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: November 29, 2011
    Assignee: Atmel Corporation
    Inventor: Jimmy Fort
  • Patent number: 8057094
    Abstract: A power semiconductor module with temperature measurement is disclosed. One embodiment provides a conductor having a first end and a second end. The second end is thermally coupled at a substrate. A device including temperature sensor is thermally coupled at the first end and configured to determine a temperature at the second end using the temperature sensor.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: November 15, 2011
    Assignee: Infineon Technologies AG
    Inventor: Piotr Tomasz Luniewski