Abstract: For differential signal transmission (especially in high speed applications), intra-pair skew between paths carrying complementary portions of a differential signal can significantly affect performance. Conventional de-skew circuits employ simple filters (i.e., low-pass filters) to operate as delay elements to account for skew; however, these filters can distort the differential signal, which can also adverse affect performance. Here, an all-pass, adjustable delay element and de-skew circuit are provided to allow for compensation of skew without degrading the differential signal as conventional circuit do and, thus, having better performance characteristics.

Abstract: The device described herein proposes an electronic active filter void of capacitors and inductors. The circuit utilizes only operational amplifiers (OP-Amp) and resistors, hence the name Op-R. Although capable of being constructed of lumped circuit elements this filter is intended for integrated circuit (IC) applications. Filtering of signals can be accommodated from dc through the UHF frequency range depending on the selected op-amp ICs. Low pass, band pass, high pass, as well as band reject frequency responses are achievable. Although the circuits described herein are single input-single output, multiple inputs and outputs present no difficulty, being limited only chip space. Temperature and production spread variations are also considered within the realm of tunability.

Abstract: A multi-channel integrator includes a first switch, a second switch, and a plurality of integration units. First terminals of the first and second switches receive a first reference voltage. Each of the integration units includes an operational amplifier (OP-AMP), a feedback switch, a third switch, a fourth switch, and a feedback capacitor. A second input terminal of the OP-AMP receives a second reference voltage. Two terminals of the feedback switch are respectively coupled to a first input terminal and an output terminal of the OP-AMP. First terminals of the third switch and the fourth switch are respectively coupled to the first input terminal and the output terminal of the OP-AMP. A first terminal of the feedback capacitor is coupled to the second terminals of the first and the third switches. A second terminal of the feedback capacitor is coupled to the second terminals of the second and the fourth switches.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: Circuits, methods and devices for providing low-pass filtering are implemented according to a number of different embodiments. In one such embodiment a Sallen-Key low-pass filter circuit is implemented that comprises a first resistor and a second resistor connected in series, the first resistor being connected between the second resistor and an input of the circuit. The second resistor is directly connected between the first resistor and an output of the circuit.

Abstract: A low pass filter includes a driver unit configured to output a voltage proportional to an input pulse width, a charge/discharge unit configured to charge the output voltage of the driver unit, a comparator unit configured to compare an output voltage of the charge/discharge unit with a reference value to output a square wave signal, and a switching unit configured to switch the charge/discharge unit to an operation state, based on a bandwidth expansion signal.

Abstract: A low-pass filter that filters an input signal input to a filter input terminal to output a filtered output signal to a filter output terminal includes a capacitor, a first field-effect transistor, a first resistor, and a first current source. The capacitor is connected between the filter output terminal and ground. The first field-effect transistor has a gate terminal, a first conduction terminal connected to the filter input terminal, and a second conduction terminal connected to the filter output terminal. The first resistor is connected between the gate and first conduction terminals of the first transistor. The first current source is connected to the first resistor to supply a first current to the first resistor. The first resistor generates a first voltage thereacross based on the supplied first current for electrically biasing the gate terminal of the first transistor.

Abstract: A current filter circuit is provided. The current filter circuit comprises a source transistor comprising a drain, a gate, and a source. The source of the source transistor is coupled to a reference voltage terminal, the gate of the source transistor is coupled to the gate of a mirror transistor, and the drain of the source transistor is coupled to a reference current source. The mirror transistor comprises a drain, a gate, and a source. The source of the mirror transistor is coupled to the reference voltage terminal, the gate is coupled to the gate of the source transistor, and the drain is coupled to a load. The current filter circuit comprises a low pass filter for filtering noise. The current filter circuit also comprises an impedance reduction circuit coupled to the drain of the mirror transistor for reducing bandwidth of the current filter circuit.

Abstract: An integrating amplifier on an IC, which comprises a feedback loop using an external device as an integrating capacitor, has added a second feedback loop that provides an additional current to the input of the amplifier, which current can be used to increase the input range of the charge that can be measured without needing another external capacitor or pad.

Abstract: The present invention is a receiving circuit used for a cellular phone that is reduced in size and can realize low power consumption. In a signal reception circuit that is used in a cellular phone that perform transmission and reception of a plurality of band wireless signals and includes a low-pass filter for removing blockers unnecessary for signal reception, the low-pass filter 104 is composed of a plurality of filters composed of a plurality of different circuit configurations and having a plurality of different pole positions, switching between a filter for blocker removal and a filter configuration with reduced sensitivity degradation is performed by combining a plurality of filters for each signal reception band, and by performing power-off of an unnecessary filter portion in the filter configuration, power consumption is reduced.

Abstract: A diode connected P-type CMOS transistor is operated in the sub-threshold area and, with a bypass capacitor, operates as a low pass audio filter. The equivalent resistance of the CMOS transistor in the sub-threshold range is very high—in the gigaOhm range. With this size resistor, a capacitor in the 1-25 pF range may be used to provide filtering capabilities with break points in the 1-10 Hz frequency range. Such a filter provides an effective low pass filter that attenuates audio frequency signals. The 1-25 pF capacitors use little chip area making the arrangement practical for integrating on an IC with the audio signals. In one embodiment, a digital signal and the audio signals share one pin, where the audio signal appears only when the digital signal is high. In this case, the audio signal filtered out from the digital high signal. The filtered digital signal drives digital circuitry while the audio signal is directed to other audio circuitry.

Abstract: A digital signal detector detects digital signals by only sensing the rising and falling edges of a received digital signal and latches the logic state between the detected edges. Such edges contain very high frequencies that are much higher than the fundamental frequency of the digital signal train. A small high pass filter filters out at least the DC component and the fundamental frequency of the received digital signal. A filtered edge appears as a spike that goes either positive or negative depending on whether the edge is a rising or falling edge. A memory element, such as comprising an RS flip flop, is triggered by the positive and negative spikes. A positive spike triggers the flip flop to output a logical one, and a negative spike triggers the latch to output a logical zero. In this way, the digital signal is recreated without the original digital signal itself being required to pass through the high pass filter.

Abstract: Current generation digital media processors support multi-format video resolutions, SDTV, Progressive Scan and HDTV. Built-in video encoders directly support NTSC and progressive 480P video outputs. These two video formats have different image bandwidth and output gain requirements, but are normally filtered by fixed bandwidth filters. This invention provides adjustable filter bandwidth for improved video filtering and solves the dilemma on filter bandwidth design for multi-format video applications. The invention is applicable to video reconstruction filter applications requiring bandwidth adjustable filters.

Abstract: A power supply circuit for a south bridge chip includes a voltage conversion chip having a first voltage input terminal, a second voltage input terminal, a driving voltage output terminal, and a gate voltage output terminal, a control circuit having a first control terminal, a second control terminal, and an output terminal, and a filter circuit coupled between the control circuit and the south bridge chip. The voltage conversion chip receives a first voltage and a second voltage from a power supply at the first and second voltage input terminals respectively, and outputs driving voltages at the driving voltage output terminal and gate voltage output terminal respectively. The control circuit receives the driving voltages at the first and second control terminals respectively, and outputs a working voltage to the south bridge chip via the filter circuit.

Abstract: A circuit (e.g., a reconstruction filtering circuit) may include a single operational amplifier (op-amp) that is arranged to receive a voltage input and that is arranged to have a biasing of constant gmR, a first device capacitor that is operatively coupled to an output of the single op-amp, a first resistor that is operatively coupled to the first device capacitor, a second device capacitor that is operatively coupled to the first resistor, and a mirror device that is operatively coupled to the second device capacitor, where the mirror device is arranged to provide a feedback loop as a feedback input to the single op-amp and that is arranged to provide a current output.

Abstract: A cutoff frequency adjusting method adjusts a cutoff frequency of a GmC filter circuit which has a capacitor and an Operational Transconductance Amplifier (OTA) circuit with a controllable Gm value. A Gm value of the OTA circuit is detected based on a voltage of the capacitor which is charged by an output of the OTA circuit, and a cutoff frequency of the GmC circuit is set to a desired value by controlling the Gm value of the OTA circuit constant based on the detected Gm value.

Abstract: A biquad gain stage, as well as a Variable Gain Amplifier is disclosed. The biquad gain stage comprises a plurality of transistors as well as conductances, and capacitances, as well as current sources. The resulting variable gain amplifier comprising a plurality of biquad gain stage cascaded in series allows to filter large unwanted blockers and to amplify a small wide-band signal. Both the gain and the filtering are distributed along a signal chain comprising a series of low-noise, high-Q biquad gain stages, each with limited current consumption and low component ratios.

Abstract: A DC current reduction circuit of the present invention that reduces a DC component in an output current of a current output element in which an AC current and a DC current are superimposed includes a low-pass filter for extracting a current component of a frequency lower than a cutoff frequency from the output current and a reduction unit that reduces the extracted current component from the output current. The low-pass filter has a frequency changing unit that changes the cutoff frequency from higher to lower as a continuous function over time.

Abstract: Analog supply for an analog circuit and process for supplying an analog signal to an analog circuit. The analog supply includes a noise filter having a variable resistor, and a control device coupled to adjust the variable resistor. The control device is structured and arranged to set the resistance of the variable resistor to maximize noise filtering and optimize performance of the analog circuit.

Abstract: A PLL circuit has a phase comparator to receive an input signal and a feedback signal, a charge pump controlled by an output of the phase comparator, a lowpass filter part to receive an output of the charge pump, a current controlled oscillator controlled by an output of the lowpass filter part, and a frequency divider to frequency-divide an output of the current controlled oscillator and to output the feedback signal. The lowpass filter part has an amplifier to receive the output of the charge pump and a reference voltage, and a circuit part including capacitors and resistors to receive the output of the charge pump and an output of the amplifier.

Abstract: A calibration circuit calibrates an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance. The calibration circuit outputs a calibration signal carrying information for calibrating the capacitor and includes a calibration loop.

Abstract: Provided is a tuning circuit of a Gm (transconductance)-C (capacitance) filter. The tuning circuit tunes a transconductance using direct current incorporating variations of a capacitance, instead of a clock signal, in a Gm tuning mode, while using the clock signal in a capacitance tuning mode. As such, it is possible to prevent deterioration of a received signal caused by the clock signal.

Abstract: A single-ended low pass filter and its double-ended or balanced version comprising a first coil (Lp1) coupled between a first input (Vin1) and a first output (Vout1) terminal of the filter, a second coil (Lp2) coupled between a second input (Vin2) and a second output (Vout2) terminal of this filter, and a capacitor (C) coupled between the first and second output terminals.

Abstract: Low flicker noise mixer and buffer. This design employs some native metal oxide semiconductor field-effect transistors (MOSFETs) (e.g., having no threshold voltage) within a passive mixer whose gates are driven using clock signals. These native MOSFETs maybe biased at one half of the power supply voltage to provide a lower noise figure. A cooperatively operating buffer employs appropriately places MOSFETs and resistors to ensure the desired gain. Relatively larger valued resistors can be employed to provide for higher voltage gain, and this can sometimes be accompanied with using a higher than typical power supply voltage. Source followers serve as output buffers and also ensure the required output DC voltage level as well. It is also noted that this design can be implemented using n-channel metal oxide semiconductor field-effect transistors (N-MOSFETs) of p-channel metal oxide semiconductor field-effect transistors (P-MOSFETs).

Abstract: A filter system and filtering method includes a subtractor which receives an analog input signal and a reference voltage as a first input, and an analog feedback signal, supplied through a feedback loop, as a second input, and outputs a difference between the analog input signal and the analog feedback signal, and a low pass filter which outputs a digital signal by comparing the output signal of the subtractor and a reference voltage, then integrates duty cycle of the digital signal and calculates a following error amount, and then converts a low pass filtered signal based on the calculated following error amount to an analog signal in order to provide the analog signal to the analog feedback signal, i.e. the second input of the subtractor.

Abstract: Loop filters are provided, in which a first resistor comprises a first terminal coupled to a first node, and a second terminal coupled to a second node; a first capacitor is coupled between the second node and a ground voltage, a second resistor comprises a first terminal coupled to the first node and a second terminal coupled to a third node. An operational amplifier comprises a non-inversion input terminal coupled to the second node, an inversion input terminal coupled to the third node, and an output terminal, and a second capacitor is coupled between the output terminal of the operational amplifier and the third node.

Abstract: A PLL circuit includes a phase detector that compares the phase of an input clock with the phase of a feedback clock so as to generate pull-up and pull-down control signals. A low pass filter pumps a voltage in response to the pull-up and pull-down control signals, and removes a noise component from the pumped voltage so as to output a control voltage. A buffer that controls voltage so as to generate a bias voltage having a smaller swing width than the control voltage. A voltage controlled oscillator receives the bias voltage and oscillates an output clock. A clock divider divides the frequency of the output clock at a predetermined ratio so as to generate the feedback clock.

Abstract: A filter circuit includes a low-pass filter and a calibration circuit calibrating a frequency characteristic of the low-pass filter. The calibration circuit includes a negative feedback circuit and a control circuit.

Abstract: In general, in one aspect, an apparatus includes a phase frequency detector, a charge pump, a voltage controlled oscillator, an integral capacitor to maintain an integral charge and provide an integral voltage, and a mutual-charge canceling sample reset (MCSR) capacitor to maintain a proportional charge and provide a proportional voltage each reference clock cycle. The MCSR includes a first proportional capacitor, a second proportional capacitor in parallel to, and having substantially identical capacitance value as, the first proportional capacitor, a first set of switches to provide direct coupling of the first and second proportional capacitors, and a second set of switches to provide cross coupling of the first and second proportional capacitors. The first and second set of switches alternatively turn on and off every reference clock cycle so that set of switches coupling the first and second proportional capacitors alternates every reference clock cycle.

Abstract: Compound MOS capacitors and phase-locked loop with the compound MOS capacitors are disclosed. In the phase-locked loop, the compound MOS capacitors of the loop filter are HV (high voltage) devices, and the voltage control oscillator is a LV (low voltage) device. The compound MOS capacitor comprises a HV PMOS capacitor having a base coupled to a source terminal of a low voltage source and a HV NMOS capacitor having a base coupled to a ground terminal of the low voltage source. The gates of the HV PMOS capacitor and the HV NMOS capacitor are connected together to receive a control voltage. The capacitance of the compound MOS capacitor is near constant in any control voltage.

Abstract: The invention enables a reversing IQ polarity in a bandpass filter so that the bandpass filter can filter signals with high side or low side injection.

Abstract: A low-pass filtering circuit and method are disclosed. The circuit includes a low-pass filter with a capacitor, and a multiplier configured to multiply the capacitance of the capacitor by feeding-back a high-frequency signal apparent in an output signal of the low-pass filter to the capacitor.

Abstract: A circuit (e.g., a reconstruction filtering circuit) may include a single operational amplifier (op-amp) that is arranged to receive a voltage input and that is arranged to have a biasing of constant gmR, a first device capacitor that is operatively coupled to an output of the single op-amp, a first resistor that is operatively coupled to the first device capacitor, a second device capacitor that is operatively coupled to the first resistor, and a mirror device that is operatively coupled to the second device capacitor, where the mirror device is arranged to provide a feedback loop as a feedback input to the single op-amp and that is arranged to provide a current output.

Abstract: Provided are an apparatus for adjusting frequency characteristic and Q factor of a low pass filter (LPF) and a method thereof. The apparatus includes: a frequency comparing unit for calculating a first square value and a second square value, and comparing a first reference value with the first and the second square values; a frequency adjusting unit for adjusting the frequency characteristic to range the first reference value between the first square value and the second square value; a Q factor comparing unit for calculating a third square value, and comparing a second and a third reference values with the third square value; a control unit for activating the Q factor comparing unit when the frequency characteristic is completely adjusted; and a Q factor adjusting unit for adjusting the Q factor to range the third square value between the second reference value and the third reference value.

Abstract: A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+ gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.

Abstract: An integrated RC filter includes a first resistor that is coupled to a first capacitor through a first node, a signal input of the integrated RC filter being coupled through one of the first resistor and the first capacitor to the first node. To allow for an increase in the RC timeconstant ? of the RC filter without losing signal transparency, an amplifier is included between the signal input and one of the first resistor and the first capacitor having a gain factor substantially larger than unity, the first node being coupled through an attenuator to a signal output, the attenuator having an attenuation factor substantially corresponding to the amplifier's gain factor.

Abstract: An integrated RC filter comprises a first resistor being coupled to a first capacitor through a first node and a signal input of said integrated RC filter is coupled through one of the first resistor and the first capacitor to the first node. To allow for an increase in the RC time constant of the RC filter without losing signal transparency, amplification means are included between said signal input and said one of the first resistor and the first capacitor having a gain factor substantially larger than unity, said first node being coupled through attenuation means to a signal output, said attenuation means having an attenuation factor substantially.

Abstract: Loop filters are provided, in which a first resistor comprises a first terminal coupled to a first node, and a second terminal coupled to a second node; a first capacitor is coupled between the second node and a ground voltage, a second resistor comprises a first terminal coupled to the first node and a second terminal coupled to a third node. An operational amplifier comprises a non-inversion input terminal coupled to the second node, an inversion input terminal coupled to the third node, and an output terminal, and a second capacitor is coupled between the output terminal of the operational amplifier and the third node.

Abstract: A transconductance filtering device with a flexible architecture that can selectively present a different topology and/or order beginning with the same initial structure is disclosed. For example, depending on the communications standard detected, the elementary cells of the filtering circuit required to form the adapted filter are selected and connected in such a manner as to obtain the configuration desired for the filtering means. As an example, the filter may be for use with a wireless communications system forming, in particular, a cellular mobile telephone. The filter is configurable by means of at least two elementary cells of the same structure and of controllable interconnection means each having an open or closed state.

Abstract: A transconductor and filter circuit is described. In one embodiment, a front end module within the transconductor and filter circuit converts a differential input voltage signal into a differential output current and supplies the output current at a differential output. A filter module coupled to the differential output of the front end module receives the differential output current, converts the output current into an intermediary differential voltage, and filters the differential voltage to obtain a filtered differential output voltage signal having low output impedance.

Abstract: A circuit has a first capacitive circuit component, having a first terminal and a second terminal, and an amplifier, having a first input and an output, the first input coupled to the first terminal and the output coupled to the second terminal to generate a potential difference between the first terminal and the second terminal.

Abstract: Disclosed is a filter circuit with an order of three or more, comprising at least one means for amplifying an in-band signal, wherein the frequency response of the filter output has a desirable attenuation characteristic obtainable with the order of the filter circuit. The gain of the amplifying means is variably controlled.

Abstract: A low-pass filter with a high signal-to-noise ratio is provided. A low-pass filter includes a first RC filter circuit, a differential operation circuit subtracting an output signal from a low frequency component of an input signal and outputting a differential signal, a second RC filter circuit, a voltage-current conversion circuit, and a capacitor. The voltage-current conversion circuit includes an operational amplifier, a first resistor, and a feedback circuit generating a feedback voltage in accordance with a voltage applied to the first resistor. If resistance values of first to fourth resistors are R1, R2, R3, R4, a relational expression of R1*R3=R2*R4 is satisfied, and output current i becomes constant regardless of a resistance value of a load resistance. Since only a first resistor is connected between the input and the output of the voltage-current conversion circuit, thermal noise decreases, and a signal-to-noise ratio becomes high.

Abstract: An integrated circuit including a capacitance multiplier having reduced parasitics and injected noise compared to conventional multiplier methods. The integrated circuit includes a reference capacitor and a current mirror arrangement coupled to the reference capacitor. The current mirror arrangement, which includes a current gain factor N, varies the capacitance of the reference capacitor by a factor of N+1, based on the reference capacitor current. The current mirror arrangement includes an operational amplifier operating in conjunction with two mirror transistors to form a current mirror arrangement having little or no series resistance. The current mirror also can include a plurality of resistors configured to reduce the noise from the capacitance multiplier, thus making the capacitance multiplier useful for applications that may require relatively low noise.

Abstract: A low-pass filtering circuit and method are disclosed. The circuit includes a low-pass filter with a capacitor, and a multiplier configured to multiply the capacitance of the capacitor by feeding-back a high-frequency signal apparent in an output signal of the low-pass filter to the capacitor.

Abstract: A filter circuit includes a low-pass filter and a calibration circuit calibrating a frequency characteristic of the low-pass filter. The calibration circuit includes a negative feedback circuit and a control circuit.

Abstract: A loop filter (30) includes a first capacitor (31) provided between an input terminal for a current signal and a reference voltage, a switched capacitor circuit (32) provided between the input terminal and the first capacitor (31) and a second capacitor (33) provided in parallel to the first capacitor (31) and the switched capacitor circuit (32). In the switched capacitor circuit (32), when a third capacitor (321) is connected to the first capacitor (31), a fourth capacitor (322) is connected to the second capacitor (33). In the loop filter (30) having the above-described configuration, a capacitance value of the second capacitor (33) is set to be larger than respective capacitance values of the third and fourth capacitors (321 and 322).

Abstract: Methods and apparatus are provided for varying the bandwidth of a loop filter in a loop circuit (e.g., a phase-locked loop circuit). The loop filter can include first and second resistor circuitries coupled to a capacitor. One of the resistor circuitries can be coupled to an output of the loop circuit in response to selection of a mode of operation. The resistor circuitries can each include a plurality of resistors that can be selectively coupled in series to the capacitor or bypassed. In addition, the output of the loop circuit can be coupled to a second capacitor. Either or both of the capacitors can be programmable.

Abstract: The various embodiments disclose capacitor multiplier circuits that may be integrated into imaging devices, such as for semiconductor Complimentary Metal Oxide Semiconductor (CMOS) image sensors, to create an effective capacitance in response to a low frequency, such as row-wise temporal noise, that may be generated along a row of image sensor pixels. The created effective capacitance from any one of the capacitor multiplier circuits along with a small signal resistance created by a trans-conductance of a current biasing transistor form a low pass filter that will attenuate the low frequency noise.

Abstract: Control system for programmable filters, master-slave calibration system and fully programmable high precision filter for use in such control system, such filters being provided with a filter input and a filter output including a first, first order low pass filter section comprising first and second mutually identical operational transconductance amplifiers (OTAs), having a controllable transconductance Gm from a differential voltage input having first and second differential voltage input terminals to a single current output carrying a single phase current output signals, said first and second OTAs being provided with first and second control inputs, respectively, said filter input being coupled to the first differential voltage input terminal of said first OTA.