Abstract: The interference-compensated sensor for detecting an object located in a detection area in a contactless manner, particularly a rain sensor, is provided with a first and a second measuring channel each having a control device and an output, wherein both measuring channels are substantially identical. The sensor further comprises a main subtractor having an output for outputting the difference of the signals at the outputs of the measuring channels. The sensor is provided with a controller unit having an input that is connected to the output of the main subtractor and with an output for outputting a controller signal, by means of which the two measuring channels can be controlled in such a way that the signal at the output of the main subtractor can be controlled to zero. By means of the magnitude of the signal at the output of the controller, it can be determined if an object is located in the detection area.

Abstract: A semiconductor device includes a control section, a first arm, and a second arm; and has an H-bridge circuit to supply an input current supplied from a power source to an output terminal as a reversible electric current on the basis of a control signal outputted from the control section and a reverse-connection-time backflow prevention circuit to prevent an electric current in a direction opposite to the direction of the input current from being supplied to the H-bridge circuit. The first arm is formed over a first island. The second arm is formed over a second island. The control section and the reverse-connection-time backflow prevention circuit are formed over a third island.

Abstract: A circuit may include a controller, at least one bridge circuit, and a plurality of switches. The plurality of switches may be connected parallel to each other, each may have a switch output connected to the bridge circuit. The bridge circuit, upon receiving a current from the plurality of switches, may generate an output based on a reference voltage. The controller may generate a plurality of control signals, based on a voltage transition range, to selectively turn on the plurality of the switches in more than one combination, to supply a current to the output.

Abstract: A circuit for simulating an electrical load at a terminal of a test circuit having at least one first switch and at least one second switch includes a third switch connected to the first switch of the test circuit via a first external connection point. A fourth switch is connected to the second switch of the test circuit via a second external connection point. The first switch and the second switch are connected via a shared, first internal connection point to the terminal of the test circuit and the third switch and the fourth switch are connected via a shared, second internal connection point such that that the first switch, the second switch, the third switch and the fourth switch form an H-bridge circuit. A voltage source is configured to provide the first and second external connection points with a supply voltage. A controllable voltage source is connected in a transverse bridge branch between the terminal and the second internal connection point. An inductance is active in the transverse bridge branch.

Abstract: In one aspect, a current driver, includes an operational amplifier that includes a first input port configured to receive a reference signal and a second input port configured to receive a variable signal. The variable signal is a function of an output current of the current driver. The reference signal corresponds to a selected maximum output current of the current driver. The current driver also includes a feedback transistor comprising a gate coupled to the output of the operational amplifier and a summing junction coupled to a drain of the feedback transistor and configured to receive a signal from the drain to enable clamping of the output current of the current driver to the maximum output current when the variable signal exceeds the reference signal. The summing junction is coupled to a set of transistors configured to provide the output current of the current driver.

Abstract: The drive circuit is for turning on and off a switching element having an open/close control terminal, an input terminal and an output terminal by moving electrical charge in the open/close control terminal in accordance with an on-manipulation command and an off-manipulation command received from outside. The drive circuit includes an active gate control means for changing a moving speed of the electrical charge midway between when movement of the electrical charge is started and when the movement is completed, and a determination means for making at least one of a determination on a change timing to change the moving speed and a determination on whether or not a change of the moving speed by the active gate control means should be made.

Abstract: The invention provides a switching system. The switching system comprises an H bridge, a current router, and a control circuit. The H bridge comprises a first switch and a second switch coupled to a first output node and a third switch and a fourth switch coupled to a second output node, wherein a load is coupled between the first output node and the second output node. The current router comprises a first shunt switch and a second shunt switch coupled between the first output node and the second output node. The control circuit generates a first control signal to control the first switch and the fourth switch, generates a second control signal to control the second switch and the third switch, generates a third control signal to control the first shunt switch, and generates a fourth control signal to control the second shunt switch.

Abstract: The invention provides a switching system. The switching system comprises an H bridge, a current router, and a control circuit. The H bridge comprises a first switch and a second switch coupled to a first output node and a third switch and a fourth switch coupled to a second output node, wherein a load is coupled between the first output node and the second output node. The current router comprises a first shunt switch and a second shunt switch coupled between the first output node and the second output node. The control circuit generates a first control signal to control the first switch and the fourth switch, generates a second control signal to control the second switch and the third switch, generates a third control signal to control the first shunt switch, and generates a fourth control signal to control the second shunt switch.

Abstract: A PWM mode for turning on and off two output transistors by an output of a high impedance circuit and a constant voltage mode for controlling voltages at two output terminals by an output of an op amp are provided. Then, the two modes are switched by a switching signal.

Abstract: A half bridge converter includes a transformer with a high side switch coupled between a first input terminal and a primary winding of the transformer. A low side switch is coupled between a second input terminal and the primary winding. A first control circuit is coupled to the first input terminal and the primary winding to control the high side switch in response to a rate of voltage change with respect to time across the high side switch while the high side switch is off. A second control circuit coupled to the primary winding and the second input terminal to control the low side switch in response to a rate of voltage change with respect to time across the low side switch while the low side switch is off.

Abstract: The invention relates to a driver circuit used to transmit a digital signal from a source device to a destination device. The driver circuit provides a controlled switching time to improve digital signal quality, while reducing electromagnetic interference. In the circuit, a pair of first switches of a first plurality are coupled in parallel between a first current node and respective ones of first and second output terminals. A plurality of pairs of second switches of a second plurality are coupled in parallel between a respective second current node and the first and second output terminals. Timing circuitry applies input signals to the pair of first switches and successive input signals to the pairs of second switches so as to develop a staggered voltage across a load coupled between the first and second output terminals.

Abstract: Malfunction attributable to an induced electromotive force such as a back electromotive force or a regenerative braking force of an inductive load in a load driving device is prevented. When an on-state current flows in an output transistor, a second transistor applies a supply voltage applied to a source of the output transistor to a back gate of the first transistor. On the other hand, when a negative current flows in the output transistor in a direction opposite to that of the on-state current, the second transistor applies a supply voltage applied to a drain of the output transistor to the back gate of the first transistor.

Abstract: An input power circuit for a battery-powered device, such as a toy or consumer electronic device, includes a polarity correction circuit portion. The device includes a first input terminal and a second input terminal, a first output terminal and a second output terminal, and a diode with a forward voltage drop of about 0.5 volts or less. In embodiments, the polarity correction circuit portion is configured to provide a positive voltage polarity at the first output terminal and a negative voltage polarity at the second output terminal for any polarity of power at the first input terminal and the second input terminal. The polarity correction circuit portion can include a diode bridge, and the diode may include a Schottky diode or a germanium diode.

Abstract: A circuit for use in a half bridge converter includes a high side switch coupled between a positive input terminal and a first terminal of a primary transformer winding. A low side switch is coupled between a negative input terminal and the first terminal. A first control circuit is coupled to the high side switch to sense a slope of a voltage across the high side switch while the high side switch is off to control the high side switch in response to the sensed slope across the high side switch. A second control circuit is coupled to the low side switch to sense a slope of a voltage across the low side switch while the low side switch is off to control the low side switch in response to the sensed slope of the voltage across the low side switch.

Abstract: An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit.

Abstract: A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off.

Abstract: A drive circuit for an IGBT includes an H-bridge circuit using first to fourth switch elements. When a control unit receives a command for changing the IGBT from an on state to an off state, it switches states of the first to fourth switch elements from a first state in which the first and fourth switch elements are in an on state and the second and third switch elements are in an off state to a second state in which the first and fourth switch elements are in the off state and the second and third switch elements are in the on state. This structure of the drive circuit can apply a reverse bias to the IGBT from a single power supply.

Abstract: The invention relates to an apparatus and method for driving high-side switching devices in an H-Bridge circuit. The apparatus includes first and second N-Channel high-side switching devices. Each of the high-side switching devices is associated with, and is selectively driven by, a driver circuit. Each of the driver circuits is associated with, and is powered from, a bootstrap capacitor. The apparatus further includes a cross-couple circuit that is arranged to charge each of the bootstrap capacitors based, at least in part, on whether the low-side switching device that is associated with the other bootstrap capacitor is open or closed.

Abstract: Data transmitter embodiments are provided which are particularly useful as interface devices for accurate and reliable transmittal of data from high-speed data system devices such as analog-to-digital converters. Transmitter embodiments have been found to provide excellent fidelity of data transfer at high data rates (e.g., 4 gigabits/second) while consuming only a portion of the power of many conventional transmitters and requiring only a portion of the layout area of these transmitters. Transmitter embodiments provide effective control of transmitter parameters such as matched impedances, data symmetry, common-mode level, data eye and current drain.

Abstract: A cost-effective device for influencing the transmission of electrical energy of an alternating voltage line with a plurality of phases has phase modules, which each have an alternating voltage terminal for connecting to a phase of the alternating voltage line and two connecting terminals. A phase module branch extends between each connecting terminal and each alternating voltage terminal. The phase module branch is formed of a series connection of sub-modules, each having a power semiconductor circuit and an energy accumulator connected in parallel to the power semiconductor circuit. The connecting terminals are connected to one another. The power semiconductor circuit is equipped with power semiconductors that can be switched off and are connected to each other in a half bridge.

Abstract: Disclosed is a control circuit for controlling a controllable power semiconductor switch, and to a power semiconductor module. The control circuit comprises at least two circuit sets, each having a power driver. The power driver of each of the circuit sets is provided with power via impedance components having an impedance other than zero.

Abstract: An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with VG=0 in a conventional H bridge circuit.

Abstract: Conventional diode rectifiers usually suffer from a higher conduction loss. The present invention discloses a gate-controlled rectifier, which comprises a line voltage polarity detection circuit, a constant voltage source, a driving circuit and a gate-controlled transistor. The line voltage polarity detection circuit detects the polarity of the line voltage and controls the driving circuit to turn on or turn off the gate-controlled transistor. The gate-controlled transistor may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with a gate, a source and a drain or an Insulated Gate Bipolar Transistor (IGBT) with a gate, an emitter and a collector. The constant voltage source is provided or induced by external circuits and referred to the source of the MOSFET or the emitter of the IGBT. Thanks to a lower conduction loss, this gate-controlled rectifier can be applied to rectification circuits to increase the rectification efficiency.

Abstract: A voltage control circuit is disclosed. A power factor corrector may utilize the control circuit to provide power factor correction for an AC induction motor. An AC induction motor system may combine the power factor correct with an AC induction motor.

Abstract: A power switch assembly for a capacitive load 10 which includes a common electrode 14 and first and second discrete electrodes 16, 18, includes a node n1 coupled to a voltage source Vcc for receiving power there from, a first switching device connected between the node n1 and ground, a second switching device connected between the node n1 and ground, and a dividing circuit connected between the node and ground. The dividing circuit includes an output terminal connected to the common electrode 14 of the capacitive load. The first switching device is coupled to the first electrode 16 of the capacitive load configured to control movement of the capacitive load 10 in a first direction. The second switching device is coupled to the second electrode 18 of the capacitive load configured to control movement of the capacitive load 10 in a second direction reverse to the first direction.

Abstract: A drive control apparatus controls a drive of an inductive load having a current flowing therethrough. The drive control apparatus includes a drive control device for controlling a variation of the current flowing through the inductive load within a certain period by Pulse Width Modulation control so as to come close to a reference current value, and a reference value control device for controlling a fluctuation period of the reference current value and making the fluctuation period of the reference current value longer than that of the current flowing through the inductive load by the Pulse Width Modulation control.

Abstract: A full bridge that produces an alternating output signal can be driven by operating switching elements of the full bridge in each period in a switching sequence that determines the order of the activation and deactivation of the switching elements. The switching elements are switched in at least two different switching sequences, a first switching sequence is repeated n times before a second switching sequence is carried out, with n>1, or the switching elements are switched in at least three different switching sequences.

Abstract: Various apparatuses, methods and systems for switched mode electronic circuits with reduced EMI are disclosed herein. For example, some embodiments of the present invention provide apparatuses including a power supply, an output, and a composite switch connected between the power supply and the output. The composite switch includes a plurality of transistors connected in parallel, a switch closing delay line having a plurality of switch closing outputs each connected to a control input of one of the plurality of transistors, and a switch opening delay line having a plurality of switch opening outputs each connected to one of the plurality of switch closing outputs. The switch closing delay line and switch opening delay line are connected in an order that opens the plurality of transistors in a staggered order in time and closes the plurality of transistors in a reverse staggered order in time.

Abstract: An integrated circuit includes a first switched capacitor element and a second switched capacitor element, which are coupled to form a bridge circuit, the first switched capacitor element being located in a first branch of the bridge circuit and the second switched capacitor element being located in a second branch of the bridge circuit. A detector circuit is coupled to the first branch and to the second branch of the bridge circuit. Switching signals of the first switched capacitor element and of the second switched capacitor element are generated on the basis of an input clock signal of the integrated circuit.

Abstract: A method for controlling a vertical type MOSFET in a bridge circuit is provided to reduce diode power loss and improve a reverse recovery characteristic. The method includes controlling a forward voltage of a built-in diode of the vertical type MOSFET to be a first forward voltage by setting a gate voltage of the vertical MOSFET to a first gate voltage, so that the vertical type MOSFET is switched into a first off mode; and controlling the forward voltage of the built-in diode of the vertical type MOSFET to be a second forward voltage by setting the gate voltage of the vertical MOSFET to a second gate voltage, so that the vertical type MOSFET is switched into a second off mode.

Abstract: A high current end power stage comprises at least four power transistors, two electrical supply lines and a safety fuse. The at least four power transistors have each a diode which is blocked during normal operation of the respective power transistor. The two electrical supply lines couple the at least four power transistors with a supply potential and a reference potential such that two of the at least four power transistors are connected electrically between the supply potential and the reference potential. The safety fuse is connected in series to the at least four power transistors in at least one of the two electrical supply lines. The at least one safety fuse can be triggered by a current which flows through the diode of the at least four power transistors, said diode being then arranged in the direction of conduction, when the supply potential and reference potential are exchanged.

Abstract: A transmitter of the invention, according to a first aspect, has first and second driving circuits with reverse-current prevention elements connected between output terminals and power supply terminals, and a control circuit which controls the outputs of the first and second driving circuits, the control circuit controlling the first and second driving circuits, during a transition from a first state in which the first and second driving circuits output a first or a second logic level to a second state in which the first and second driving circuits output an intermediate level between the first and second logic levels, to induce a third state in which a through current flows in the first and second driving circuits via the reverse-current prevention elements.

Abstract: A method for measuring an on resistance in an H-bridge including first and second transistors connected to a first output terminal, third and fourth transistors connected to a second output terminal, and a measurement switch connected to the first and second output terminals. The first and third transistors are connected to a first power supply terminal. The second and fourth transistors are connected to a second power supply terminal. The method includes supplying the first transistor with measurement current during a first period, measuring a first voltage at the first power supply terminal via the third transistor using the second output terminal during the first period, measuring a second voltage at the first output terminal via the measurement switch using the second output terminal during the first period, and determining the on resistance of the first transistor based on the measurement current, first voltage, and second voltage.

Abstract: A method for controlling a driving circuit. A first switch unit comprises a first switch and a second switch and a second switch unit comprises a third switch and a fourth switch. The first and second switch units are alternately turned on, and each switch is coupled to a blocking element in parallel. The first and second switches of the first switch unit are turned on simultaneously, and the first switch is then turned off. The second switch is turned off when the third and fourth switches are simultaneously turned on.

Abstract: A switching drive circuit for soft switching is disclosed. It includes an input circuit to receive an input signal. A first delay circuit generates a first delay time in response to the enable of the input signal. A second delay circuit generates a second delay time in response to the disable of the input signal. A switching signal generator generates switching signals. The pulse width of the high-side switching signal is generated in proportion to the pulse width of the input signal. The high-side switching signal enabled after the first delay time once the input signal is enabled. The low-side switching signal disabled in response to the enable of the input signal. The low-side switching signal is enabled after the second delay time once the high-side switching signal is disabled.

Abstract: An apparatus includes an integrated circuit that includes low side power supply circuitry that provides an output voltage for H-bridge circuitry. The low side power supply circuitry includes one transistor that provides one current to the output of the low side power supply circuitry in response to the output voltage of the low side power supply circuitry dropping below a quiescent level. The low side power supply circuitry also includes a second transistor that controls the conduction state of a third transistor, based at least in part, upon the first transistor providing the first current to the output of the low side power supply circuitry. The third transistor provides a second current to the output of the low side power supply circuitry.

Abstract: A gate driving circuit has a variable current carrying path that switches a current carrying path among a driving target device, a DC power source and a reactor to operate in plural operation modes including at least a hold mode, a preparation mode, and an execution mode. The variable current carrying path includes a backflow path for causing a reactor current flowing through the reactor to flow back to the DC power source when a gate voltage of the driving target device deviates from a preset allowable voltage range. A drive control part sets the operation mode of the variable current carrying path to the hold mode and holds the ON state or the OFF state of the driving target device, and further switches the operation mode in sequence of the preparation mode and the execution mode, and realizes turn-on or turn-off of the driving target device.

Abstract: The invention relates to a circuit configuration (1) for controlling the operation of a half-bridge (13) by pulse-width modulation, especially in a synchronous rectifier mode. Said circuit configuration comprises a first terminal connection (23, 25) for electrically connecting the circuit configuration (1) to an insulated gate terminal of a bridge valve (15, 17) of the half-bridge (13), a second terminal connection (20, 22) for electrically connecting the circuit configuration (1) to an additional terminal of the bridge valve (15, 17), a lead (16, 18) electrically connecting the first terminal connection (23, 25) to the second terminal connection (20, 22), and an electric valve (43, 45) that can be switched on and off by pulse-width modulated signals. Said electric valve (43, 45) is disposed in the lead (16, 18) so that a flow of current through the lead (16, 18) can be released and blocked.

Abstract: An apparatus includes an integrated circuit that includes low side power supply circuitry that provides an output voltage for H-bridge circuitry. The low side power supply circuitry includes one transistor that provides one current to the output of the low side power supply circuitry in response to the output voltage of the low side power supply circuitry dropping below a quiescent level. The low side power supply circuitry also includes a second transistor that controls the conduction state of a third transistor, based at least in part, upon the first transistor providing the first current to the output of the low side power supply circuitry. The third transistor provides a second current to the output of the low side power supply circuitry.

Abstract: A method and related apparatus drives a first semiconductor switching element, the load path of which is connected in series with a load path of a second semiconductor switching element in a half-bridge circuit and which is driven in the on state or in the off state according to switching signals transmitted via a transmission channel. The method includes detection of a load current through the half-bridge circuit, and repetition of the previous switching signal if the load current exceeds a predetermined maximum threshold value.

Abstract: A pulse width modulation scheme allows the creation of a unipolar pulse width modulated output signal. Two switching circuits (104, 204), preferably different legs of an inverter circuit, can operate to not only modulate an input voltage but also to reverse the polarity of the PWM output signal. Both switching circuits can be configured to accomplish both features, thus the switching load is spread out across all four switches.

Abstract: A full-wave rectifier, two resistors forming a voltage divider across the rectifier outputs and a capacitor in parallel with one of the resistors, provide an output across the capacitor that approximates the RMS equivalent of an input signal to the rectifier. The capacitance value may be selected to attenuate certain AC components without significantly affecting the accuracy of the RMS approximation. The shape of the input-signal-may be rectangular, trapezoidal, sinusoidal, triangular, random, constant DC, or a combination thereof, without affecting conversion accuracy. A DC voltage charge is maintained on the capacitor, which has been charged via the voltage divider, to a proportionally scaled equivalent of the RMS voltage of the input signal, through switched, non-symmetrical charge/discharge paths of the rectifier and the resistors.

Abstract: A transconductance circuit (16) and method for protecting an H-bridge power circuit (10) that provides power to a load that includes an inductive component (14) connected between one side of the inductive component (14) and a gate (25) of a low side transistor (24) of the H-bridge (10). The transconductance circuit (16) operates to pull current from the inductive component (14) to ground (30) when the inductive load (14) sources current to a body diode of the high side transistor (20). The transconductance circuit (16) creates a regulated voltage to the gate (25) of the low side transistor (24) to cause the low side transistor (24) to conduct the current away in a regulated manner from the inductor (14) and the high side transistor (20) to ground (30).

Abstract: An H-bridge driver has a drive signal generating circuit for generating a square-wave signal as a drive signal. The H-bridge driver also has a waveform shaping circuit for blunting the waveform of the drive signal at the rising and trailing edges thereof. The waveform shaping circuit has a first circuit for generating, in a rising period of the square-wave signal fed thereto, a first current having a positive peak at the center of the rising period, a second circuit for generating, in a trailing period of the square-wave signal fed thereto, a second current having a negative peak at the center of the trailing period, and a capacitor to which the first and second currents are fed. The waveform shaping circuit outputs the voltage across the capacitor as its output voltage.

Abstract: An inductive load driving circuit includes a switching transistor and a guardring. The switching transistor is connected between an output terminal and a power supply potential point. The guardring is an N-type semiconductor region provided for the switching transistor and connected to the power supply potential point.

Abstract: An H-type bridge circuit includes four transistors, two resistors, and a write head. A write current supplied from a current supply circuit including a first of the transistors and resistors flows through the write head and is received in a current receiving circuit including a second of the resistors and a fourth of the transistors, and another write current supplied from a current supply circuit including the second of the transistors and the second resistor flows through the write head and is received in a current receiving circuit including the first of the resistors and the third of the transistors. Impedance of the write head matches an output impedance of the current supply circuit and matches an input impedance of the current receiving circuit.

Abstract: An inductive load driver circuit including a first switch that switches between a conductive state and a non-conductive state selectively applies a first power supply potential to a first side of the inductive load in response to a control signal. A second switch that switches between a non-conductive state and a conductive state selectively applies a second power supply potential to a second side of the inductive load in response to the control signal. The control signal places a control node of the second switch at a lower potential than the second side of the inductive load while the second switch is in the conductive state. In operation, a steady state current in a first direction is driven through the inductive load. The nodes of the inductive load are placed in a high impedance state, after which a steady state current is driven in a second direction through the inductive load.

Abstract: A high-frequency resonant sine wave DC to AC inverter suitable for use in a personal computer (PC) power supply includes a full-bridge inverter, a resonant circuit, a phase shift modulation circuit, and a resonant gate driver. The resonant gate driver provides sinusoidal gate drive signals to the full-bridge inverter enabling highly efficient operation on the inverter.

Abstract: A sensing device includes a Wheatstone bridge and a source of a stimulation configured to apply the stimulation across two electrodes of the Wheatstone bridge. The device also includes a timing sensitive circuit configured to detect timing of a signal appearing across one of the other electrodes of the bridge as a result of the stimulation being applied. The timing provides a way to read the sensor. The device can be powered remotely and data so read can be transmitted using the remote power. The timing sensitive circuit includes a comparator. The comparator provides a high logic signal for a time related to the reactance of one leg of the Wheatstone bridge, and that provides a reading of a differential sensor having elements in each leg of the bridge.

Abstract: A resonant gate driver circuit suitable for driving MOS-gated power switches in high-frequency applications recovers gate drive energy stored in the gate capacitance of the power switches, resulting in substantially lossless operation. The resonant gate driver circuit provides bi-polar gate control signals that are compatible with PWM operation.