Abstract: Integrated circuit (IC) packages with multiple clock sources are disclosed. A disclosed IC package includes a first die having a first clock source and a first clock tree and a second die having a second clock source and a second clock tree. The first clock source and the second clock source may be coupled to the second clock tree and the first clock tree, respectively, through a plurality of interconnects to form a clock tree network on the IC package. The clock tree network may be operable to be driven by either the first clock source or the second clock source.

Abstract: Apparatuses, multi-chip modules, capacitive chips, and methods of providing capacitance to a power supply voltage in a multi-chip module are disclosed. In an example multi-chip module, a signal distribution component may be configured to provide a power supply voltage. A capacitive chip may be coupled to the signal distribution component and include a plurality of capacitive units. The capacitive chip may be configured to provide a capacitance to the power supply voltage. The plurality of capacitive units may be formed from memory cell capacitors.

Abstract: According to one embodiment, a semiconductor device includes chips and a first selection circuit. Each of the chips has at least first and second vias for transmitting at least first and second address signals, these chips are stacked to be electrically connected via the first and second vias. The first selection circuit is provided in each chip, includes a logic circuit that selects a chip based on at least the first and second address signals, and supplies a result of operating the first and second address signals to the subsequent chip.

Abstract: A serial data transmission system, includes a transmitting terminal for transmitting a data, a receiving terminal for receiving the data transmitted by the transmitting terminal, a first connecting capacitor connected between the transmitting terminal and the receiving terminal, and a second connecting capacitor connected between the transmitting terminal and the receiving terminal, wherein the transmitting terminal comprises a transmitting terminal driver unit and an amplitude detection unit connected with the transmitting terminal driver unit, the transmitting terminal driver unit outputs a pair of differential signals, the amplitude detection unit detects an amplitude variation of the differential signals output by the transmitting terminal driver unit, and outputs an indication signal indicating whether the transmitting terminal and the receiving terminal are properly connected with each other. A serial data transmission method is further provided.

Abstract: Devices and circuits for wiring configurations of a bus system and power supply wires in a memory chip with improved power efficiencies. For example, the effective resistance on the power supply wires can be reduced by utilizing non-active bus wires as additional power wires connected in parallel with the other supply wires. Further, these non-active bus wires can reduce or prevent parasitic couplings and cross-talk effects between neighboring sensitive wires, thereby improving the performance of the chip.

Abstract: A multi-fingered device can be calibrated for performance. The multi-fingered device can include a first finger configured to remain active and a second finger that is initially deactivated concurrent with the first finger being active. A measure of degradation for the multi-fingered device within an IC can be determined. The measure of degradation can be compared with a degradation threshold. Responsive to determining that the measure of degradation meets the degradation threshold, a finger of the multi-fingered device can be activated.

Abstract: An AC-coupled interface circuit on a semiconductor integrated circuit apparatus performing a bidirectional data transfer via a differential transmission line includes a differential driver, a differential receiver and a potential setting section. The differential driver includes a pair of output terminals connected to a pair of signal lines. The differential receiver includes a pair of input terminals connected to the pair of signal lines. In a data transmission operation, the differential driver converts transmit data to a differential signal to output the differential signal. In a data reception operation, the differential receiver receives a differential signal transferred to the pair of signal lines and converts the differential signal to receive data. The potential setting section sets a potential of the pair of signal lines to a predetermined stable potential before the differential signal is transferred to the pair of signal lines.

Abstract: Systems and methods for operating of one or more devices before, during, and/or after a power-save mode are provided. The system may include a transmitter device that configures the differential signal lines to low-impedance and a predetermined low-voltage during the power-save mode (such as connecting the differential signal lines to ground). The system may also include a receiver device that senses a wake-up signal, determines the type of wake-up signal, and wakes-up according to the type of wake-up signal.

Abstract: A fuse circuit of a semiconductor integrated apparatus includes first and second fuse blocks. The first fuse block includes a first up fuse block where a first plurality of fuses are arranged and a first down fuse block where a second plurality of fuses are arranged. The second plurality of fuses comprises fewer fuses than the first plurality of fuses. The second fuse block includes a second up fuse block where a third plurality of fuses are arranged, the third plurality of fuses comprising the same number of fuses as the second plurality of fuses, and a second down fuse block that includes a fourth plurality of fuses, the fourth plurality of fuses comprising the same number of fuses as the first plurality of fuses. The first up fuse block is opposite the second up fuse block and the first down fuse block is opposite the second down fuse block.

Abstract: A clock distribution approach includes distributing a clock signal from a clock tree to a first set of circuit elements characterized by a first circuit characteristic; and distributing a clock signal from a sub-tree of the clock tree to a second set of circuit elements characterized by a second circuit characteristic different from the first circuit characteristic.

Abstract: A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are provided. The incorporation of the flexible film interposer achieves densely packaged semiconductor devices, without the need for a redistribution layer (RDL).

Abstract: A transceiver circuit includes driver circuits, receiver circuits, and suspend-mode buffers that are arranged to withstand an over-voltage conditions that would otherwise damage those circuits. An over-voltage sense circuit is arranged to detect the over-voltage condition on a data line in the transceiver. Cascode devices are placed in critical points of the various circuits, while voltages are coupled to other critical points such that none of the transistor devices that are coupled to the data lines are damaged by the over-voltage condition. Selector circuits are arranged to couple the highest detected voltages to various transistor wells to prevent forward biasing parasitic diodes in the transistors. Series switching circuits are arranged to break critical conduction paths during the over-voltage condition. The over-voltage protection scheme is suitable for use in integrated USB transceivers.

Abstract: A process and circuitry for drawing current from a power source to produce a first operation, such as a Boolean operation, and reusing the current to generate a further operation. In other words, the current from the first operation may be used to perform a second or subsequent operation. This process is referred generally herein as current recycling.