Plural Demodulation Patents (Class 329/316)
  • Patent number: 5541552
    Abstract: A demodulating apparatus for receiving and demodulating a signal transmitted by use of a plurality of carriers having different frequencies employs a demodulator for frequency-analyzing a specific time waveform defined by data in one modulation symbol duration and guard times accompanying the data to provide a demodulated waveform. A correlation detector determines a correlation value between the received signal and a signal spaced apart from the received signal by a period corresponding to one modulation symbol duration. An integrating circuit integrates the correlation detected signal, and a peak-position discriminator determines a peak-position of an integrated value supplied thereto from the integrating circuit. Correction of timing and frequency offsets in the demodulation processing is carried out on the basis of the peak-position information discriminated by the peak-position discriminator.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: July 30, 1996
    Assignee: Sony Corporation
    Inventors: Mitsuhiro Suzuki, Makoto Natori
  • Patent number: 5461347
    Abstract: A novel communication apparatus comprising a transmitter capable of geometrically modulating an existing modulated electromagnetic signal, a method for geometrically modulating a frequency modulated signal, and a receiver for decoding the modulated signal waveform without damaging the underlying harmonic content of the carrier wave and decoding the underlying modulated electromagnetic signal.
    Type: Grant
    Filed: January 24, 1994
    Date of Patent: October 24, 1995
    Assignee: Quantum Optics Corporation
    Inventor: John P. Cairns
  • Patent number: 5446421
    Abstract: A data transmission system includes a source of a data signal and a modulator, responsive to the data signal, producing a first modulated signal representing the data signal and a second modulated signal representing a signal 180 out-of-phase with the data signal. The first and second modulated signals are transported via a transmission channel. A first demodulator demodulates the transported first modulated signal and a second demodulator demodulates the transported second modulated signal. A subtractor, responsive to the first and second demodulators, produces a signal representative of the data signal.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: August 29, 1995
    Assignee: Thomson Consumer Electronics, Inc.
    Inventor: David L. Kechkaylo
  • Patent number: 5283531
    Abstract: A demodulation apparatus incorporating an adaptive equalizer, capable of realizing a highly reliable communication, lower power consumption, and a compact size. In the demodulation apparatus, an output of one of two demodulators, at least one of which including an equalizer, is selected according to a presence or absence of multipath which is determined from a non-coincidence of bit codes, eye apertures, bit error ratea, or a matched filter output, while the operation of the other demodulator is stopped for reduction of power consumption, by stopping a supply of power or clock signals to the other demodulator. In a case using a frequency offset detection unit and a frequency offset memory, one of these is selected according to a convergence or divergence of an error signal from an equalizer, while the operation of the other one is stopped for reduction of power consumption.
    Type: Grant
    Filed: May 24, 1993
    Date of Patent: February 1, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata, Koji Ogura, Katsumi Sakakibara
  • Patent number: 5214391
    Abstract: A demodulation apparatus incorporating an adaptive equalizer, capable of realizing a highly reliable communication, lower power consumption, and a compact size. In the demodulation apparatus, an output of one of two demodulators, at least one of which including an equalizer, is selected according to a presence or absence of multipath which is determined from a non-coincidence of bit codes, eye apertures, bit error rates, or a matched filter output, while the operation of the other demodulator is stopped for reduction of power consumption, by stopping a supply of power or clock signals to the other demodulator. In a case using a frequency offset detection unit and a frequency offset memory, one of these is selected according to a convergence or divergence of an error signal from an equalizer, while the operation of the other one is stopped for reduction of power consumption.
    Type: Grant
    Filed: June 29, 1992
    Date of Patent: May 25, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata, Koji Ogura, Katsumi Sakakibara
  • Patent number: 5179360
    Abstract: Upon transmission, when the digital transmission mode is set, an analog audio signal is A/D converted, the digital audio signal is coded, a first carrier is modulated by the coded signal and multiplied by a first multiplier, and the multiplied signal is sent to an orthogonal modulating and D/A converting circuit. When the analog transmission mode is set, a second carrier is modulated by the digital audio signal and multiplied by a second multiplier, and the multiplied signal is sent to the orthogonal modulating and D/A converting circuit. A signal of a frequency which is equal in both of the digital transmission mode and the analog transmission mode is given to the orthogonal modulating and D/A converting circuit. Upon reception, when the digital transmission mode is set, an output of an A/D converting and orthogonal demodulating circuit is frequency divided by a first frequency divider and demodulated and decoded.
    Type: Grant
    Filed: March 20, 1992
    Date of Patent: January 12, 1993
    Assignee: Sony Corporation
    Inventor: Mitsuhiro Suzuki
  • Patent number: 5159282
    Abstract: A demodulation apparatus incorporating an adaptive equalizer, capable of realizing a highly reliable communication, lower power consumption, and a compact size. In the demodulation apparatus, an output of one of two demodulators, at least one of which including an equalizer, is selected according to a presence or absence of multipath which is determined from a non-coincidence of bit codes, eye apertures, bit error rates, or a matched filter output, while the operation of the other demodulator is stopped for reduction of power consumption, by stopping a supply of power or clock signals to the other demodulator. In a case using a frequency offset detection unit and a frequency offset memory, one of these is selected according to a convergence or divergence of an error signal from an equalizer, while the operation of the other one is stopped for reduction of power consumption.
    Type: Grant
    Filed: December 6, 1990
    Date of Patent: October 27, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata, Koji Ogura, Katsumi Sakakibara
  • Patent number: 5119199
    Abstract: An imput for receiving FM modulated video signals is connected to a first demodulator circuit, the output of which is connected to the first input of an adder. The input is also connected to a transversal filter, the output of which feeds a Hilbert transform circuit that has its output connected to a second demodulator circuit. The output of the second demodulator is connected to a second input of the adder, the adder providing an FM demodulated video signal with reduced moire and improved signal-to-noise ratio. In a second embodiment, the Hilbert transform circuit is formed by delay circuits and a subtraction circuit connected to subtract the output of the delay circuits from the input thereto. An adder is connected to add the output of the delay circuits to the input thereto. First and second demodulation circuits receive the outputs from the subtractor and adder, respectively, and the outputs of the first and second demodulation circuits are mixed to produce the FM demodulated video signal.
    Type: Grant
    Filed: May 24, 1990
    Date of Patent: June 2, 1992
    Assignee: Sony Corporation
    Inventor: Etsurou Sakamoto
  • Patent number: 5095363
    Abstract: A method of demodulating multi-standard TV signals consists of providing a plurality of signals at a frequency which is a multiple of a reference frequency whose value is a common submultiple of the frequencies of the multi-standard signals. Thereafter, the signal to be demodulated is multiplied by one of said plural signals having a frequency which differs therefrom by a value equal to the reference frequency; by filtering the result of the multiplication, a signal is obtained at the reference frequency but corresponding in amplitude to the one to be demodulated.
    Type: Grant
    Filed: July 9, 1990
    Date of Patent: March 10, 1992
    Assignee: SGS-Thomson Microelectronics S.r.L.
    Inventors: Maurizio Zuffada, Fabrizio Sacchi, Gianfranco Vai, Giorgio Betti, Silvano Gornati
  • Patent number: 4992747
    Abstract: A signal receiving system for receiving messages from each of several unequal amplitude FM carriers occupying the same portion of the frequency band. The signal receiving system receives power division multiplexed signals, each of which being allocated a portion of the total average power of an assigned FM band.
    Type: Grant
    Filed: May 15, 1989
    Date of Patent: February 12, 1991
    Inventor: Glen A. Myers
  • Patent number: 4910468
    Abstract: In a digital demodulation system (FIGS. 2, 3, 4, 7, 8) in a dual polarization radio system, having a first demodulator (4) and a first A/D converter (14) for a main signal, a second demodulator (5) and a second A/D converter (15c) for an interference signal (cross polarization signal), a transversal filter (18) for providing a compensation signal for cancelling an interference component in the main signal depending upon the demodulated interference component; the second A/D converter (15c) for providing the interference component in digital form is operated with a clock signal (102) regenerated in the main signal branch (4, 14) so that system operates correctly even when the main signal and cross polarization signal are in an asynchronous condition.
    Type: Grant
    Filed: February 15, 1989
    Date of Patent: March 20, 1990
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroyuki Ohtsuka, Hideaki Matsue, Tadashi Shirato, Takehiro Murase
  • Patent number: 4908581
    Abstract: An FM signal obtained by modulating a carrier f.sub.c with a signal f.sub.s is demodulated by a frequency demodulator to obtain a demodulated signal which contains a lower sideband component as an undesired moire component. A moire component generator generates an mf.sub.c -nf.sub.s component (m and n: natural numbers) from the demodulated signal or generates an nf.sub.1 -(n-m)f.sub.c component (f.sub.1 : first lower sideband component of the FM signal) from the FM signal. A subtractor subtracts an output of the moire component generator from the demodulated signal so as to thereby eliminate the undesired moire component. Furthermore, to eliminate a cross-modulation moire due to crosstalk of a low-frequency signal f.sub.L, the moire component generator generates a 2f.sub.L component from the FM signal.
    Type: Grant
    Filed: July 21, 1988
    Date of Patent: March 13, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masahiro Honjo
  • Patent number: 4870684
    Abstract: A PLL circuit comprises a variable frequency divider (7) for frequency-dividing a signal having a reference frequency f.sub.1 with a frequency dividing ratio n.sub.1 or n.sub.2, a fixed frequency divider (8) for further frequency-dividing an output of the variable frequency divider with a frequency dividing ratio n.sub.0, to generate a first output signal and a second output signal which is out of phase by 90.degree. from the first output signal, multiplier (10) for multiplying an input signal by the second output signal, a comparator (11) for comparing an output of the multiplier with a predetermined reference voltage, and a D-type flip-flop (12) receiving as a D input an output of the comparator and receiving as a clock input the first output signal, an output of the D-type flip-flop (12) being applied to the variable frequency divider (7). When the second output signal leads the input signal by 90.degree.
    Type: Grant
    Filed: November 15, 1988
    Date of Patent: September 26, 1989
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masashi Arai, Ryuichi Ogawa
  • Patent number: 4866449
    Abstract: A multichannel processor for signals modulated onto a common IF frequency includes first and second analog-to-digital converters (ADC) for first and second channels, respectively. Each ADC receives a 4XIF frequency clock for producing digital samples, which are applied to a pair of gates for alternately coupling the digital signal to two signal paths. Each signal path alternately negates and does not negate the signals passing therethrough, thereby generating baseband I and Q signals for that channel. Since each channel has a separate ADC, there may be amplitude and temporal error between the channels. One of the channels is selected as a reference, and uses a pair of interpolators to produce samples representing the I and Q signal values at a common time between clock pulses. The other channels include controllable interpolators which are adjusted so that their I, Q common times correspond to that of the reference channel.
    Type: Grant
    Filed: November 3, 1988
    Date of Patent: September 12, 1989
    Assignee: General Electric Company
    Inventor: Brian P. Gaffney
  • Patent number: 4864637
    Abstract: An improved FMX sterophonic broadcast receiver provided with countermeasures against transient noises, which includes a level detection circuit for detecting level of a detected stereo difference signal, and a level control circuit for controlling level of an expanded stereo difference signal according to an output signal of the level detection circuit. By the above arrangement of the present invention, since it is so arranged to cause the level control circuit to function when the degree of modulation becomes large so as to control the level of the stereo difference signal to be low, a level difference is produced between the stereo sum signal and the stereo difference signal for deterioration of the stereo separation degree upon matrixing at a matrix circuit for reduction of noises accordingly.
    Type: Grant
    Filed: May 16, 1988
    Date of Patent: September 5, 1989
    Assignee: Sanyo Electric Co, Ltd.
    Inventors: Tsutomu Ishikawa, Noboru Usui, Kanji Tanaka, Ryuichi Ogawa, Kazuhisa Ishiguro, Masashi Arai