Abstract: A medical system and method of communicating between a telemetry controller and medical devices is provided. Coupling coefficients between a primary coil of the telemetry controller and secondary coils of the medical devices differ from each other. A primary carrier signal is applied to the primary coil, thereby respectively inducing secondary carrier signals on the secondary coils. An amplitude of the secondary carrier signal is measured on each of the secondary coils. The envelope of each secondary carrier signal is modulated in accordance with data, thereby inducing modulation of the envelope of the primary carrier signal for the implanted medical devices. The secondary carrier signal envelopes are modulated based on the measured amplitudes of the respective secondary carrier signals.

Abstract: Various embodiments relate to a method and apparatus for over sampling a RF carrier signal, the method including receiving, by an ADC, the RF carrier signal, sampling, by the ADC, the RF carrier signal using the selected clock signal which is at least quadruple the RF carrier signal, down sampling, by a RF-DSP, the RF carrier signal by a factor of two to generate I channel data and Q channel data, mixing down, by the RF-DSP, the I channel data and the Q channel data, and outputting, by the RF-DSP, the I channel data and Q channel data to a baseband DSP.

Abstract: Various embodiments relate to a method and apparatus for over sampling a RF carrier signal, the method including receiving, by an ADC, the RF carrier signal, sampling, by the ADC, the RF carrier signal using the selected clock signal which is at least quadruple the RF carrier signal, down sampling, by a RF-DSP, the RF carrier signal by a factor of two to generate I channel data and Q channel data, mixing down, by the RF-DSP, the I channel data and the Q channel data, and outputting, by the RF-DSP, the I channel data and Q channel data to a baseband DSP.

Abstract: Various embodiments relate to a method and apparatus for a method for under sampling a RF carrier signal, the method including receiving, by an analog digital converter, the RF carrier signal, selecting, by a multiplexer, a clock signal which includes a first clock signal and a second clock signal which are phase shifted, receiving, by the ADC, the clock signal which has a frequency less that the frequency of the RF carrier signal, sampling, by the ADC, the RF carrier signal using the selected clock signal and demodulating, by a digital signal processor, the RF carrier signal into I channel data and Q channel data for I/Q demodulation.

Abstract: In one example in accordance with the present disclosure, a computing system is provided. The computing system includes a first bus controller to control X bus lanes, a second bus controller to control Y bus lanes, a 2-to-1 X lane multiplexer, and a Y lane system component, where Y>X>0. X lanes from the first bus controller are coupled to the 2-to-1 X lane multiplexer. X lanes from the second bus controller are coupled to the 2-to-1 X lane multiplexer, and Y-X lanes from the second bus controller are coupled directly to the Y lane system component. In addition, X lanes from the 2-to-1 X lane multiplexer are coupled to the Y lane system component.

Abstract: A system for correction of the phase error in in-phase and quadrature signals may include a first signal and a second signal. The system includes a first circuit and a second circuit, each circuit configured for receiving a square-wave input signal and supplying a respective square-wave output signal. The output signal is delayed with respect to the input signal and each circuit is configured in such a way that the propagation delay of a rising edge and the propagation delay of a falling edge between the input signal and the output signal are configurable. The first circuit is configured for receiving the first signal, and the second circuit is configured for receiving the second signal.

Abstract: The invention relates to a method for adjusting a pulse detection threshold consisting in detecting a pulse when the edge of said pulse envelop crosses the threshold, in allocating (A) a staring value (TH0) to the threshold and in adjusting (B1) the threshold (TH) in such a way that the number of pulses detected on at least one observation window (OWj) satisfies a predetermined criterion in a determined time.

Abstract: Windowed multiuser detection techniques are disclosed. A window of data is established, and certain central bits within the window are selected as reliable, while other side bits are ignored. The selected bits are demodulated. The windowed multiuser detector moves along to the next window in such a manner that the next group of central bit decisions lay contiguous with the previous set, and eventually every bit to be demodulated has at some point been a central bit decision. Most any type of MUD algorithm (e.g., MMSE algorithm MUD or M-algorithm MUD) can be used to compute estimates in the windowed data. Unreliable windowed data are distinguished from reliable data (e.g., weighting or other de-emphasis scheme).

Abstract: The invention relates to a digital phase locked loop (PLL) 12 for demodulating an intermediate frequency signal. The digital phase locked loop 12 comprises two coordinate rotation digital computers 24 and 30 in its phase detector. The robustness the PLL 12 can be improved by means of a gain control circuit 27, a sign detector 20, a carrier monitoring circuit 28 and an adjustable loop filter 32.

Abstract: A SECAM decoder and an FM modulator therefor are disclosed, in which a demodulated color signal is provided to indicate deviations in the frequency of modulated color information from a nominal subcarrier frequency. The demodulator comprises numerator and denominator filters operating on the modulated color information, and a divider providing a ratio result by dividing the numerator filter output by the denominator filter output. The demodulator may include two sets of numerator and denominator filters offset in phase from one another, where one of the two sets is selectively employed in order to mitigate divide-by-zero problems. Also disclosed are methods for demodulating digitized FM color signals in a SECAM decoder.

Abstract: A digital FM demodulator employs a baseband phase lock loop (BBPLL), which is particularly effective for long range reception, for combining and demodulating a pair of signals represented by the mathematical expression A(t)ej&thgr;(t) to result in an approximation of d&thgr;/dt. This approximation is then subjected to an inverse of the linear approximation of the frequency response of the BBPLL that produces a very accurate &thgr;. This is conveniently achieved with a IIR filter whose transfer function happens to be the same as the inverse of the linear approximation of the frequency response of the BBPLL. The derivative is then taken of &thgr; to produce a very accurate d&thgr;/dt, the desired result for the output of an FM demodulator. To aid operation of the BBPLL, the incoming digital intermediate frequency is upsampled by a combination of sample and hold and FIR filtering prior to being processed by the BBPLL.

Abstract: A system and method for carrier recovery independent of a pilot signal uses the frequency and phase information in the upper and lower band edges of a signal to generate a signal for correcting the frequency and phase of the local oscillator. A particular combination of raised-root cosine filters, low-pass filters, multipliers, and adders effectively uses the tails of a received signal in the frequency domain to correct phase errors.

Abstract: A demodulator converts a voltage input to an output voltage. The demodulator has a voltage-controlled oscillator (VCO), a counter, a holding apparatus, and a digital compare apparatus. The VCO generates a signal having a frequency proportional to the analog input voltage. The counter counts each cycle of the signal generated by the VCO and outputs a count signal representative of the cycle count. The holding apparatus holds the count signal and generates a held count signal. The digital compare apparatus compares the count signal and the held count signal and generates the digital output.

Abstract: A method and an apparatus for measuring the instantaneous frequency of FM modulated signals, includes sampling, instantaneous frequency computing, and lowpass filtering. FM modulated signal are sampled at prescribed intervals to provide digitized FM signal. The instantaneous frequency is computed by manipulating the digitized FM signal mathematically using a new mathematical equation proposed in this invention to provide the instantaneous frequency based on digitized FM signal samples. More accurate instantaneous frequency values can be obtained by filtering the computed instantaneous frequency values using a lowpass filter.

Abstract: A frequency-variation type demodulator and demodulating method. A start signal is received by a control signal apparatus. After a delay time, a control signal is output. The control signal, a start frequency, a frequency variation slope and a clock are received by an in-phase and quadrature-phase function generator. A phase value is output via mathematical calculation. According to the phase value, a cosine and sine values are obtain by checking a phase look-up table in a first and a second ROM units, respectively. The cosine value is multiplied by a measured digital data in a first multiplier to obtain an in-phase demodulating signal, and the sine value is multiplied by the measured digital data to obtain a quadrature-phase demodulating signal.

Abstract: A narrow-band digital frequency-modulation (FM) limiter-discriminator (LD) receiver with two independent detectors that combine to remove most of the bit errors caused by FM-clicks in an encoded channel. The output of the LD circuit is presented to a sample-and-hold (S&H) detector and to an integrate and dump (I&D) detector. Because the S&H and I&D detector outputs are offset in time by one-half bit and they are not entirely correlated, an error in one does not necessarily imply an error in the other. Using convolutional coding and Viterbi decoding, with threshold-compensation of the I&D detector output and threshold- or envelope-compensation of the S&H detector output, averaging the two compensated detector signals improves the receiver bit error rate (BER) performance by more than 3 dB over the soft-decision thresholded I&D detector alone, which until now was believed to be optimum in the art.

Abstract: An FM demodulator in accordance with the present invention receives a composite signal from an antenna and corresponding processing circuitry. The composite signal includes a carrier signal having a voice/data signal modulated thereon. The composite signal is processed to separate the voice/data signal from the carrier signal. The voice/data signal is separated into an in-phase (I) signal and a quadrature (Q) signal. The Q signal is differentiated and then divided by the I signal to obtain the voice/data signal. Alternatively, I signal is differentiated and then divided by the Q signal to obtain the voice/data signal.

Abstract: An FM demodulator in accordance with the present invention receives a composite signal from an antenna and corresponding processing circuitry. The composite signal includes a carrier signal having a voice/data signal modulated thereon. The composite signal is processed to separate the voice/data signal from the carrier signal. The voice/data signal is separated into an in-phase (I) signal and a quadrature (Q) signal. The Q signal is differentiated and then divided by the I signal to obtain the voice/data signal. Alternatively, I signal is differentiated and then divided by the Q signal to obtain the voice/data signal.

Abstract: A frequency-variation type demodulator and demodulating method. A start signal is received by a control signal apparatus. After a delay time, a control signal is output. The control signal, a start frequency, a frequency variation slope and a clock are received by an in-phase and quadrature-phase function generator. A phase value is output via mathematical calculation. According to the phase value, a cosine and sine values are obtain by checking a phase look-up table in a first and a second ROM units, respectively. The cosine value is multiplied by a measured digital data in a first multiplier to obtain an in-phase demodulating signal, and the sine value is multiplied by the measured digital data to obtain a quadrature-phase demodulating signal.

Abstract: A variable delay line detector (34, 48, 66)includes a power splitter (36, 50, 68), a mixer (44, 62, 72) and a variable delay line (42,52, 70). Various devices are suitable for the variable delay line (42, 52, 70), such as a non-linear transmission line (NLTL). By providing a variable delay line, the variable delay line detector (34, 48, 66) is adapted to be programmed in real time thus making it suitable in applications where the phase and or frequency of the input signal varies. As such, the variable delay line detector (34, 48, 66) may be used in applications heretofore unknown, such &a an inexpensive demodulator in a frequency hopped spread spectrum system.

Abstract: A radio frequency tag accepts a received signal received by an antenna and demodulates that signal into a digital output using a comparator. The received signal is forwarded to a first comparator input. A threshold voltage generator generates a threshold voltage signal and forwards that signal to a second comparator input. The comparator compares the two inputs and generates a digital output based on the comparison.

Abstract: A digital demodulator for demodulating a digital-Modulated signal into received data using differential detection includes a clock recovery circuit where a phase of the clock is adjustable in steps of a clock corrective width. A variance calculator is further included for calculating a variance of phase differences in the digital-modulated signal. The clock corrective width of the clock recovery circuit is controlled based on the variance and the received signal strength such that the clock corrective width is decreased when it is determined from the variance and the received signal strength that interference occurs.

Abstract: The above object of the present invention can be achieved by an FM demodulator, into which an FM signal is inputted, for demodulating the inputted FM signal and outputting a digital FM demodulated signal.

Abstract: A digital FM demodulation circuit which samples an input analog FM signal and digitally detects the sampled input signal has an arctangent circuit into which a second signal that is delayed from the sampled input signal by a constant time, and a third signal that is different in phase by 90 degrees from the second signal are input, and which outputs a corresponding arctangent value based on a result of a division of the two input signals. The arctangent circuit has: roundoff means for sequentially rounding the division result to one of plural typical values; and a ROM address unit for performing a control in which an arctangent value corresponding to the rounded typical value is selected from a ROM table containing arctangent values of the typical values, and the selected arctangent value is output.

Abstract: Provided is a time counting circuit which can measure the time taken from the rising edge to the falling edge of a pulse signal and the time from the falling edge to the rising edge thereof. The time counting circuit according to the present invention comprises a measuring circuit for measuring the time between either of the rising and falling edges of the pulse signal, and a pulse converting circuit for converting a pulse signal to be measured to a pulse signal having either of the edges in accordance with the rising edge of the pulse signal to be measured and having either of the edges in accordance with the falling edge of the pulse signal to be measured. The time between either of the edges of the pulse signal converted by the pulse converting circuit is measured by the measuring circuit. The time obtained by measurement is the time taken from the rising edge to the falling edge of the pulse signal to be measured or the time taken from the falling edge to the rising edge thereof.

Abstract: A technique for demodulating a message signal from an angle modulated carrier signal. A noncoherent, independent, periodic reference is generated to have a predetermined phase characteristic and which is noncoherent with and independent of the angle modulated carrier signal. The phase of the reference is then compared with the phase of the carrier to determine the message signal on the angle modulated carrier. The phase of the noncoherent, independent, periodic reference is associated with a measured value for the reference. The phase of the angle modulated carrier signal is associated with a voltage value for the angle modulated carrier signal. These values are measured and then compared to determine the message signal on the modulated carrier signal. Time variations of the comparison of values are directly related to the message signal in the case of a PM carrier. Changes in the time variations of the voltage comparison are related to the message signal for a FM carrier.

Abstract: An approach for demodulating a frequency-modulated signal involves processing a frequency-modulated signal with a phase shifter network to provide a demodulated signal that has a relatively constant amplitude around the center frequency of the frequency-modulated signal and that exhibits a relatively linear phase change over an operational frequency range. Embodiments of the invention include a phase shifter network, using N number of cascaded all-pass filters, that receives as an input a limited amplitude signal and outputs a phase-shifted limited amplitude signal that is mixed with the limited amplitude signal. The phase shifter network may also comprise a low-pass bessel filter.

Abstract: A frequency demodulator of the present invention includes: an amplification section for receiving a frequency-modulated signal and amplifying the frequency-modulated signal based on a gain so as to produce a digital signal having a predetermined level and an inverted signal of the digital signal; a digital demodulation section for receiving the digital signal and frequency-demodulating the digital signal; an amplitude detection section for receiving the digital signal and the inverted signal of the digital signal, and detecting maximum amplitude values of the digital signal and the inverted signal for a predetermined period of time so as to produce an amplitude signal in proportion to the maximum values; and a gain controlling section for varying the gain based on the amplitude signal.

Abstract: A circuit is designed with a delay circuit (102) coupled to receive a frequency-modulated data signal (100) at a delay input terminal. The delay circuit produces the data signal (103) after a predetermined delay at a delay output terminal. An exclusive OR circuit (104) has a first input terminal coupled to the delay input terminal and has a second input terminal coupled to the delay output terminal.

Abstract: A method and device for digitally demodulating a frequency modulated signal includes: calculating a phase of a digital complex baseband signal of a received frequency modulated signal, calculating an unwrapped phase of the calculated phase, detecting and eliminating 2.pi. phase jumps in the unwrapped phase to generate a corrected phase, and differentiating the corrected phase.

Abstract: A pulse counting FM demodulator includes a differentiating circuit that differentiates an FM intermediate-frequency signal to produce a differentiated pulse signal. A trigger signal is generated based on the differentiated pulse signal and is used to control the charging and discharging of a capacitor that is included in a monostable multivibrator. The charging and discharging of the capacitor provides an output level inverting operation. A variable current source supplies the capacitor with a charging current that is varied in response to an externally supplied control voltage, and an output circuit provides a demodulated output signal having a level corresponding to the output level inverting operation in the monostable multivibrator.

Abstract: A method for demodulating digital frequency modulation (FM) signals is disclosed. A group of complex-valued discrete-time FM signal samples is initially received. A corresponding first complex product for each of the complex-valued discrete-time FM signal samples is computed, and a corresponding second complex product for each of the first complex values of the complex-valued discrete-time FM signal samples is computed. Subsequently, an inverse tangent of the second complex products are computed to yield an angle for each of the second complex values, wherein each of the angles represents a second-order difference of a phase of the complex-valued discrete-time FM signal samples. Finally, a digital integration is performed to obtain a first-order difference of the phase of the complex-valued discrete-time FM signal samples.

Abstract: A method of extracting an information bearing signal .omega.(n) from a base-band signal in the form of an inverse function with a digital signal processor. The processor includes memory and utilizes a minimum number of instructions stored in the memory. The base-band waveform comprises a plurality of complex-valued samples having respective I and Q components. The method includes the steps of receiving a first sample at an instant n having respective I(n) and Q(n) components and defining an interval for evaluating potential values for the I(n) and Q(n) components. Next, a step of transforming said I(n) and Q(n) components is performed to have respective threshold values residing in the predefined interval. Then, a step of estimating the transformed components with a series of non-inverted polynomial functions is carried out over the predefined interval.

Abstract: An integrated circuit includes a demodulator having delay circuitry and demodulation control circuitry that may be fully formed within a common integrated circuit. The delay circuitry receives an input signal and generates a delayed input signal. The demodulation control circuitry generates a demodulated output based upon the input signal and the delayed input signal that has a level that is proportional to, or a finction of, a period of a respective cycle of the input signal. The demodulation control circuitry includes pulse generation circuitry, pulse delay circuitry, pulse conversion circuitry and sampling circuitry. The pulse generation circuitry generates a signal pulse based upon the input signal and the delayed input signal with a duration that is proportional to at least one period of the input signal. The pulse delay circuitry generates a delayed signal pulse based upon the signal pulse.

Abstract: A demodulation method for tentatively demodulating a modulated input signal by a signal having a fixed frequency to form a tentative complex demodulated signal and then generating a determined complex demodulated signal from the tentative complex demodulated signal. The method includes step (a) of obtaining a determined complex demodulated signal by compensating for the tentative complex demodulated signal based on an optimum phase compensation amount; step (b) of estimating an optimum frequency compensation amount based on a shift in the optimum phase compensation amount during a predetermined cycle; and step (c) of estimating an immediately subsequent optimum phase compensation amount to be used in the steps (a) and (b) performed in repetition, based on the tentative complex demodulated signal, the determined complex demodulated signal, and the optimum frequency compensation amount.

Abstract: An receiver receives, amplifies, filters, and downconverts an RF signal to obtain an FM signal. The FM signal is then limited by a limiter and sampled by an ADC. The FM samples from the ADC are provided to an edge detector which detects transitions in the FM samples. The transitions correspond to zero crossings in the FM signal. The time period between the zero crossings, or the cycle width, is measured with a counter to determine the instantaneous frequency f.sub.c of the FM signal. The demodulated output is proportional to the instantaneous frequency which can be determined from the measured cycle periods as f.sub.c =1/2T.sub.c, f.sub.c .apprxeq.-.alpha.T.sub.c, or f.sub.c .varies.T.sub.c, where T.sub.c is the measured cycle period, and .alpha. is a constant based on the slope of 1/2T.sub.c,avg, where T.sub.c,avg is the average cycle period. The sample rate of the demodulated output can be reduced, through resampling, to minimize power consumption in the subsequent signal processing blocks.

Abstract: A method in which correctable I/Q imbalance errors in a complex receiver can be detected and compensated for digitally without the use of special calibration signals. Differential D.C. offset errors are compensated by averaging the incoming I.sub.d and Q.sub.d digital signals and subtracting from them an expected value of differential D.C. offset, for example, computed from the long term average of the I and Q signals to create I' and Q' signals. Differential gain imbalance errors are corrected by calculating a root means square average of the I' and Q' digital signals and applies to them compensation coefficients K.sub.x and K.sub.y determined from either the RMS average or from a Stochastic Gradient Algorithm. The DSP compensates for the quadrature phase errors by calculating a compensation matrix which is independent of the frequency of the carrier and applies the compensation matrix to the I' and Q' digital signals.

Abstract: A frequency modulated signal demodulator circuit wherein an in-phase component (I) and an orthogonal component (Q) of a frequency modulated signal output from an orthogonal detector circuit are respectively delayed by one sampling time. The result (I.multidot.Qs) of multiplying the in-phase component (I) by a delayed orthogonal component (Qs) is subtracted from the result (Q.multidot.Is) of multiplying the orthogonal component (Q) by the delayed in-phase component (Is), and the subtraction result (d.theta.) is multiplied by an inverse (1/Ts) of the sampling time to derive an instantaneous angular frequency (d.theta./Ts), whereby the frequency modulated signal can be demodulated without any feedback loop which is required by conventional FM demodulator circuits, thus making it possible to avoid a deterioration demodulation characteristics due to the influence of phasing.

Abstract: In a preferred embodiment, an FM demodulator includes an I and Q sampler for generating data samples of I and Q signals of an FM signal. A signal processor derives samples of a modulating waveform of the FM signal from the I and Q data samples, using a Lagrangian interpolation function of the I and Q data samples. Variables include derivatives of the I and Q signals obtained by differentiation of the Lagrangian function. Preferably, the processor further utilizes a correction factor to correct the modulating waveform samples obtained from the Lagrangian-based interpolation, to thereby derive a modulating waveform exhibiting low signal distortion.

Abstract: A communications reduced instruction processor forming a simple programmable digital signal processing architecture (10) for processing analog waveforms. The architecture (10) includes a main DSP core that includes a tightly coupled CORDIC co-processing element (26). The CORDIC co-processing element (26) performs trigonometric operations for converting polar coordinates to rectangular coordinates and rectangular coordinates to polar coordinates. These trigonometric functions include an angle accumulate operation for calculating the magnitude and angle of a vector given in X-Y cartesian coordinates, and a vector rotate operation for calculating a sine and a cosine of a given phase angle.

Abstract: In a digital FM receiver having a demodulator that receives a radio signal and generates therefrom a phase sample whose behavior determines an output of the demodulator, an apparatus for removing a low-frequency interference signal from the phase sample converts the phase sample into a frequency sample which is then high-pass filtered to produce a filtered frequency sample. The filtered frequency sample is then converted into a filtered phase sample, which may be further demodulated in accordance with known techniques. Converting the phase sample into a frequency sample may be performed by a first order difference circuit. Converting the filtered frequency sample into the filtered phase sample may be performed by an integrator.

Abstract: In the digital FM demodulator (330), a hard limiter (333) receives a modulated analog IF signal and limits the voltage of the IF signal to two levels. Next, a direct phase digitizer (336) uses zero-crossings of the limited IF signal to generate N-bit digital words. A phase differential circuit (340) computes the phase shift of the signal from the direct phase digitizer over a predetermined time interval. The dynamic range of the phase differential signal can be increased by replacing the phase differential circuit (340) with a high-resolution phase differential circuit (700). After digital demodulation and filtering and gain control by audio processor (360), the recovered signal is forwarded to a speaker (390) to produce an audio output. Thus, the digital FM demodulator both avoids problems common to analog discriminator circuitry and offers a reduced complexity, size, and power consumption alternative to conventional digital FM demodulators.

Abstract: A DMUX 11 outputs data in a digital FM signal in a circulation to produce signals S1 to S4. An MUX 14 alternately outputs inverted signals of the signals S1 and S3, obtaining a signal Si.sub.(k). An MUX 15 alternately outputs inverted signals of the signals S2 and S4, obtaining a signal Sq.sub.(k). An interpolation circuit 17 inserts data having a value of zero between individual data in the output signal of the MUX 14, and cuts off the high-frequency component of the resultant signal, obtaining a signal Si.sub.(i). A second interpolation circuit 19 inserts data having a value of zero between individual data in the output signal of the MUX 15, and cuts off the high-frequency component of the resultant signal, obtaining a signal Sq.sub.(i). An arithmetic operation circuit 2 computes SI.sub.(i-1) .multidot.SQ.sub.(i) -SI.sub.(i) .multidot.Sq.sub.(i-1), and integrates it to obtain a digital demodulated signal.

Abstract: Disclosed is an apparatus for digitizing an electromagnetic input signal having frequency components within at least first and second segregated frequency bands, particularly useful in a wireless communications system. The apparatus includes a filtering circuit arrangement for passing only frequency components of the input signal substantially within the first and second frequency bands, to provide a filtered signal having a spectrum with spectral components below a predetermined power level within a frequency gap between the first and second frequency bands. An analog to digital (A/D) converter samples the filtered signal at a sampling rate sufficient to provide a digitized output signal with a frequency spectrum corresponding to that of the filtered signal and also with a replica of spectral components of one of the frequency bands appearing within the frequency gap.

Abstract: A device for digital demodulation of the video and audio elements of a television signal has a digital preprocessing stage for conditioning a complex digital signal for digital demodulation of a television signal at intermediate frequency, a first complex mixing device shifting the video sub-carrier to the frequency 0, a common mixing device used on the input side for the demodulation of the audio signals, and the audio signal processing is not split until after this mixing device. Therefore, fully digital signal processing is possible for television signals from the intermediate frequency, with limited filter complexity.

Abstract: Method and apparatus for improving an estimate of a message being carried by a frequency modulated dominant carrier in the presence of co-channel interference from a subdominant carrier. An envelope detector provides an envelope signal E(t). A frequency demodulator provides a demodulated frequency signal F(t). In one embodiment, a comparator compares the envelope signal to a threshold voltage V.sub.T. A switch is operated when the envelope signal is less than V.sub.T. The signal F applied to the switch is held by a holding circuit while the switch is open. Interpolation and lowpass filtering improve the quality of the output signal. In another embodiment of the invention, the frequency demodulated signal F is summed with an unfiltered signal to provide a first summed signal. The first summed signal is summed with an unfiltered signal to provide a second summed signal which is an estimate of the message on a co-channel subdominant carrier.

Abstract: A frequency-shift keying (FSK) demodulator demodulates a binary signal encoded in an FSK signal. The present invention employs a bandpass filter to filter out noise and pass the frequencies used in the modulation. A comparitor converts the received signal into a square wave. A divider reduces the frequency of the square wave signal by a dividing factor. A counter counts the number of square wave transitions in a predetermined time period. A decision device receives the dividing factor from the divider, and uses this factor to adjust the count measured. The adjusted count is compared to counts pertaining to modulated frequencies to select a frequency. A bit value associated with the selected frequency is output for the time period being demodulated.

Abstract: Digital FM demodulator and method in which zero-crossings of a frequency modulated input signal are detected, a binary pulse is provided for each of the zero-crossings, and the binary pulse stream is filtered digitally to provide enhanced resolution of the incremental phase (frequency) of the input signal over a period which is asynchronous with the input signal. In the disclosed embodiments, the digital filtering is done with comb decimation filters, with a higher order filter being employed where greater resolution is desired.

Abstract: An information signal processing apparatus according to the present invention is arranged to receive as an input a frequency-modulated information signal having a predetermined frequency band, form a sample pulse signal by sampling the input frequency-modulated information signal in accordance with a clock signal having a first frequency which is selected so that a frequency which is 1/n times (n is a positive integer) a frequency of half the first frequency is positioned in a frequency band lower than the frequency band of the input frequency-modulated information signal and so that a frequency which is (n+1) times (n is a positive integer) the frequency of half the first frequency is positioned in a frequency band higher than the frequency band of the input frequency-modulated information signal, and demodulate the frequency-modulated information signal by performing computing processing of the formed sample pulse signal in accordance with the clock signal having the first frequency.

Abstract: To demodulate an analog signal having information modulated by a carrier, the analog signal is chopped by a chopper, the chopped signal is digitized by a sigma-delta analog-to-digital converter to produce a series of digital samples at a sampling frequency, the digital samples are filtered in a digital decimating filter to produce data words, and the data words are modulated by an intermediate frequency signal to produce a detected information signal. The various frequency signals are generated by a phase-lock loop so that the intermediate frequency is the difference between the carrier frequency and the chopping frequency, and both the chopping frequency and the intermediate frequency are sub-multiples of the sampling frequency.