Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

Abstract: An amplifier. In some embodiments, the amplifier includes a resonant circuit having a resonant frequency, a pump input, a signal input, and a signal output. The resonant circuit may include a Josephson junction connected to the pump input, the Josephson junction being a superconducting-normal-superconducting junction having two superconducting terminals and being configured to adjust the resonant frequency of the resonant circuit based on a signal received at the pump input.

Abstract: A method of generating an output signal based on a single flux quantum (SFQ) pulse includes receiving the SFQ pulse and splitting it into a first path and a second path. The split SFQ pulse of the second path is stored in a latch. A second splitting of the split SFQ pulse of the first path is provided to provide a first output signal and a second output signal of the first path. The second output signal is delayed by a delay Josephson transmission line (JTL). An output of the delay JTL is provided as a clock input to the latch. The first output of the first path is recombined with an output of the latch to provide an output signal.

Abstract: In an embodiment, a quantum circuit (circuit) includes a first qubit and a second qubit. In an embodiment, a quantum circuit includes a tunable microwave resonator, wherein a first applied magnetic flux is configured to tune the microwave resonator to a first frequency, the first frequency configured to activate an interaction between the first qubit and the second qubit, and wherein a second applied magnetic flux is configured to tune the microwave resonator to a second frequency, the second frequency configured to minimize an interaction between the first qubit and the second qubit.

Abstract: Apparatus and associated methods relate to high accuracy timestamp support by controlling a first phase relationship between an outbound signal transmitted by a transmitting circuit and a local reference clock signal, measuring a second phase difference between a received data signal and the local reference signal, and measuring a third phase difference between a received time of day (RXTOD) signal and the local reference signal. In an illustrative example, a state machine circuit may be operated to control the first phase relationship, a phase measuring circuit may be configured to measure the second phase difference and the third phase difference. By comparing results obtained from phase control and phase measurement, the time of day (TOD) of each transmitted/received bit can be calculated at 1-bit level accuracy and achieve 1-bit level accuracy in the timestamp.

Abstract: A lock-in amplifier includes a clock signal generator configured to generate a first demodulation clock signal and a second demodulation clock signal having a phase difference of 90 degrees and a same demodulation frequency; and a detector configured to, based on an input signal, the first demodulation clock signal, and the second demodulation clock signal, provide an offset voltage corresponding to an offset of the lock-in amplifier in a first operation mode, and provide a first output voltage and a second output voltage, each of which correspond to a demodulation frequency component of the input signal in a second operation mode.

Abstract: Superconducting interface circuits and methods convert between non-return-to-zero (NRZ) encoded voltage signals and reciprocal quantum logic (RQL) compliant signals of opposite-polarity single flux quantum (SFQ) pulse pairs, and vice-versa, so as to provide high-speed NRZ input to, and output from, RQL computing circuitry.

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: A Lange coupler having a first plurality of lines on a first level and a second plurality of lines on a second level. At least one line on the first level is cross-coupled to a respective line on the second level via electromagnetic waves traveling through the first and second plurality of lines. The first and second plurality of lines may be made of metal, and the first level may be higher than the second level. A substrate may be provided into which the first and second plurality of lines are etched so as to define an on-chip Lange coupler.

Abstract: A plasma generating apparatus includes a linear electrode for generating a high voltage by resonance caused when the linear electrode is supplied with an AC signal current, an grounded electrode for defining an internal space spaced from the linear electrode around the linear electrode, and a control device for controlling the power feed to the linear electrode. The control device has a field probe for measuring the electric field in the internal space, and a bandpass filter for filtering the measurement signal into a predetermined frequency band to output an AC signal, a variable phase shifter for shifting the phase of the AC signal so that the AC signal is synchronized with the resonance signal in the internal space when the AC signal is supplied to the linear electrode as a current, and an amplifier for amplifying the AC signal of which the phase is shifted.

Abstract: A method (500) of demodulation, the method comprising the steps of receiving (510) a radio frequency signal, converting (520) the received radio frequency signal to a baseband signal, performing (530) symbol timing recovery on the baseband signal, and demodulating (540) the baseband signal. The baseband signal comprises alternating symbols spaced therebetween at an alternating first interval length and a second interval length, where the first interval length and second interval length are dissimilar. Communication units and a method of modulation are also described.

Abstract: A method for searching a digital transmission having unknown carrier and symbol frequencies in a modulated reception signal, includes performing successive trials of several carrier and symbol frequencies, using decreasing values of the symbol frequency, demodulating the reception signal with the tried carrier frequency, filtering the demodulated signal in a band having a width corresponding to the currently tried symbol frequency, and producing samples of the filtered signal. For each currently tried symbol frequency, forming a complex indicator having a real component and an imaginary component established from the successive samples of the filtered signal such that they have cyclostationary properties and that one of the components tends to cancel when the other component tends towards a relative maximum, building the spectrum of the variation of the complex indicator, searching for a singular spike in the spectrum, and determining the real symbol frequency from the frequency of the spike.

Abstract: In a receiver circuit, an analog signal processor frequency-converts an input high frequency signal into a baseband signal, and performs low pass filtering at a cutoff frequency below a desired-wave band. An ADC converts an output of the analog signal processor into a digital signal. A digital signal processor compensates an output of the ADC for a signal component in the desired-wave band which has been attenuated by the filtering operation of the analog signal processor.

Abstract: A quadrature demodulation circuit includes: first to fourth mixers to receive a modulation signal; a phase shifter to supply to the first and third mixers a first local frequency signal, to supply to the second mixer a second local frequency signal having a designated phase difference relative to the first local frequency signal, and to supply to the fourth mixer a third local frequency signal that is an inverse in phase to the second local frequency signal; a first adder to add a signal output from the first mixer and a signal output from the second mixer and to output a first demodulation signal; and a second adder to add a signal output from the third mixer and a signal output from the fourth mixer and to output a second demodulation signal.

Abstract: Disclosed is a logarithmic detector comprising: an amplifier element; means for setting a frequency of operation of the detector; and a controller, wherein an input signal to the amplifier element is arranged to cause an oscillation in the amplifier element, and the controller is operable to sense a pre-determined threshold, indicative of oscillation and, in response to sensing said threshold, to interrupt the oscillation of the amplifier such that the frequency of said interruption is proportional to the logarithm of the power of the input signal.

Abstract: Some embodiments discussed relate to an apparatus and method for processing signals, comprising receiving an input signal and forming a stream of digital samples of the input signal by sampling at a sampling frequency and mixing the stream of digital samples using a mixer sequence having a sine sequence and a cosine sequence based on the sampling frequency to generate an input sequence, each of the sine sequence and the cosine sequence including a plurality of components in an arrangement such that at least one of the components has a zero value and the remaining components has a non-zero value, and filtering the input sequence using a plurality of polyphase filter parts, each corresponding to the non-zero components of the sine sequence and the cosine sequence, and selectively combining the outputs of the polyphase filter parts to generate an in-phase sequence and a quadrature sequence.

Abstract: A digital demodulator includes a resonator having a resonance frequency same as a carrier frequency to store a charge corresponding to a digital signal modulated by phase shift keying, a capacitor to store the charge of the resonator, an amplifier including an input node and an output node between which the capacitor is connected to convert a stored charge of the capacitor into a voltage signal, and a controller configured to accumulate in the resonator the charge induced by the frequency signal modulated by phase shift keying in a first control mode and configured to transfer the charge of the resonator to the capacitor in a second control mode, to output the voltage signal corresponding to the stored charge of the capacitor from the output node of the amplifier.

Abstract: A detector system for performing at least one of transmitting and receiving electromagnetic radiation at a low-terahertz frequency. The detection of electromagnetic radiation at low-terahertz frequencies can be useful in the detection of various chemicals. Preferably a detector includes a microresonant structure that is caused to resonate by electromagnetic radiation at a low-terahertz frequency. The resonance is detected by detecting an altered path of a charged particle beam.

Abstract: Because of the natural ability to reject clock jitter, the SRC circuits include an internal oscillator to provide an operating clock signal. The internal oscillator can be operated independently of any external frequency control signal, including input and output frame clocks. The internal oscillator can be implemented as a relatively low-cost fixed frequency oscillator. The use of a relatively low precision, inexpensive internal oscillator in an SRC circuit reduces the overall cost of SRC circuits while providing acceptable performance. Accordingly, reducing costs of SRC circuits also has a positive cost/benefit affect on the digital signal processing systems that use SRC circuits.

Abstract: An electronic receiver for decoding data encoded into electromagnetic radiation (e.g., light) is described. The light is received at an ultra-small resonant structure. The resonant structure generates an electric field in response to the incident light and light received from a local oscillator. An electron beam passing near the resonant structure is altered on at least one characteristic as a result of the electric field. Data is encoded into the light by a characteristic that is seen in the electric field during resonance and therefore in the electron beam as it passes the electric field. Alterations in the electron beam are thus correlated to data values encoded into the light.

Abstract: Carrier phase detector for calculation of a feedback signal (D) for a carrier phase loop in a receiver, which loop detects a phase error (??) between a phase (?in) of a received signal (Ein), which comprises a sequence of received data symbols, and a nominal phase (?nom) of a nominal data symbol (Enom), with the carrier phase detector in each case calculating the feedback signal (D) as a function of the real part and of the imaginary part of a received data symbol (Ein) , with a received data symbol (Ein) whose phase is in a boundary phase area being weighted gradually to a lesser extent during the calculation of the feedback signal (D), with the boundary phase area in each case being arranged symmetrically with respect to a mid-phase (?mid) which is located in the centre between the two nominal phases (?nom) of equidistant nominal data symbols (Enom), and having a phase extent which is determined by a boundary phase (?g).

Abstract: Carrier frequency detection for an N-ary modulated signal is achieved by digitizing the N-ary modulated signal, frequency shifting the digitized N-ary modulated signal to prevent aliasing, raising the frequency-shifted signal to the Nth power, transforming the raised signal to frequency domain data and determining an initial maximum frequency peak, iteratively fine shifting the frequency of the N-ary modulated signal around the initial maximum frequency peak and repeating the raising, transforming and determining steps to obtain a plurality of maximum frequency peaks, and calculating the carrier frequency from the maximum frequency peaks and the total related frequency shift.

Abstract: An electronic receiver array for decoding data encoded into electromagnetic radiation (e.g., light) is described. The light is received at an ultra-small resonant structure. The resonant structure generates an electric field in response to the incident light and light received from a local oscillator. An electron beam passing near the resonant structure is altered on at least one characteristic as a result of the electric field. Data is encoded into the light by a characteristic that is seen in the electric field during resonance and therefore in the electron beam as it passes the electric field. Alterations in the electron beam are thus correlated to data values encoded into the light.

Abstract: An apparatus for recovering a carrier is disclosed, for recovering a carrier correctly even though ghost exists in a signal received in a television, which includes a signal converter outputting baseband I, Q signals by multiplying digitized passband I, Q signals by a complex carrier according to a phase error; first and second filters removing data components of the baseband I, Q signals; a divider dividing a signal outputted from the second filter by a signal outputted from the first filter; a multiplier multiplying a signal outputted from the divider by the baseband I signal delayed for a predetermined time period; and an oscillator generating a complex carrier according to a signal outputted from the multiplier.

Abstract: An apparatus and method of improving impedance matching between a RF signal and a multi-segmented electrode in a plasma reactor powered by the RF signal. The apparatus and method phase shifts the RF signal driving one or more electrode segment of the multi-segmented electrode, amplifies the RF signal, and matches an impedance of the RF signal with an impedance of the electrode segment, where the RF signal is modulated prior to matching of the impedance of the RF signal. The apparatus and method directionally couples an output of the matching of the impedance of the RF signal and the electrode segment, and adjusts the output of the matching of the impedance of the RF signal such that a directionally coupled output signal and a reference signal representing the RF signal at the output of the master RF oscillator produces a demodulated signal of minimal amplitude.

Abstract: A sensor array employs a parameter to induce a time-varying phase angle ? on an optical signal that comprises a phase generated carrier. The phase angle ? is calculated through employment of only four samples, where all the four samples are based on the optical signal.

Abstract: A circuit for demodulating a modulated carrier includes a sampler receiving the modulated carrier signal and generating a digital carrier signal represented by a sequence of sample values in accordance with a clock signal at a first sampling frequency. A complex mixer frequency shifts the digital carrier signal by a frequency equal to one fourth the sampling frequency to generate a frequency shifted data signal with a sampling rate at the first sampling frequency. A decimation circuit generates four decimated signals from the frequency shifted signal, each at a decimated sampling rate. A resampling circuit generates a data signal at the decimated sampling rate and at a phase independent of the clock signal.

Abstract: A carrier reproduction circuit which can perform stable carrier reproduction even when reception takes place with low C/N values is provided. The reception phase of the demodulated known-pattern reception signal is detected with a frame synchronizing timing circuit (4), and based on the detected reception phase, either the phase difference table of absolute phase having one convergence point or the phase difference table of the phase rotated from the absolute phase by 180°, which are included in a carrier reproduction phase difference detecting circuit (8), is selected, and from the selected phase difference table the output based on the phase difference between the phase obtained from the signal point position of the reception signal and the phase convergence point is obtained, and thus carrier reproduction is implemented by undergoing the reproduced carrier frequency control via an AFC circuit (10) so that the phase obtained from the signal point position coincides with the phase convergence point.

Abstract: A digital communication system and method is provided for increasing bit-rates while maintaining the reliability of transmitted digital information and avoiding increased power demands. The communication system includes a transmitter that modulates one or more bits onto a carrier signal to generate and transmit a first transmission signal during the first part of a pulse time TB, receives an additional bit, and based on the value of the additional bit, either transmits the first transmission signal again during the second part of the pulse time TB or transmits a second transmission signal during the second part of the pulse time TB.

Abstract: In the present invention, the amplitude subtracting type of phase detector of the timing recovery section outputs a difference &ggr;i of a synthesized amplitude deviation at ½ of a symbol time. The averaging section computes an average value of this difference &ggr;i and outputs a phase control signal Vi corresponding to the average value to the phase controller. The phase controller controls a timing phase of the sampling clock according to this phase control signal Vi. Dichotomizer generates a recovered symbol clock by dichotomizing the sampling clock that has been timing phase controlled. Removal of DC offset from and demodulation of the sampled baseband signal is executed in parallel to the above processing using the recovered symbol clock with the Nyquist data extracting section, the offset detector, the offset correcting section, and the data determining section.

Abstract: A demodulation device having a demodulating circuit that conducts the primary demodulation of received modulation wave, and a carrier recovery circuit that regenerates a carrier from demodulation signal by the demodulating circuit and conducts the secondary demodulation of baseband signal using the carrier.

Abstract: To demodulate a quadrature input signal (Si) (for example, frequency shift) a demodulation unit (DEM) is used, comprising a PLL (P) having a complex mixer (M) and a controlled oscillator (V). Normally, a limiter has to be used to keep the loop gain independent of the amplitude of the quadrature input signal. In the PLL, a divider (DEL) is coupled between the mixer (M) and the oscillator (V) to divide the two mixed components (Sm1, Sm2) of the quadrature signal supplied by the mixer.

Abstract: A simple carrier recovery circuit capable of accurately detecting and synchronizing an incoming carrier frequency without the use of a phase locked loop (PLL) is provided. Instead of a PLL, the carrier recovery circuit includes an injection locked oscillator. The injection locked oscillator includes an input for connection to the received modulated signal. The gain of an inverter stage of a amplifier in the injection locked oscillator is modulated by the received modulated signal using an injection transistor connected between the power source and the output of the inverter stage. The gate of the injection transistor receives a signal corresponding to the received modulated signal.

Abstract: A complex multiplier 5 complex-multiplies base band signals x and y obtained from a receive signal by local oscillation signals c and s, to output complex detection signals p and q. A phase difference detecting portion 7 outputs the amount of the detected phase difference corresponding to the phase difference between the phase of the receive signal and the phase of the local oscillation signals. A loop filter 8 emphasizes its DC component. A local oscillation portion 6 outputs local oscillation signals having a frequency corresponding to the amount of the detected phase difference. A region judging portion 9 judges which of regions on a complex plane is one to which the base band signals belong, and outputs a region signal. A most frequent region judging portion 10 judges which of the regions is one in which the base band signals are concentrated most frequently upon input of the region signal a predetermined number of times.

Abstract: A digital optical receiver and clock recovery circuit for use in detecting and retiming optical data transmitted at rates up to and exceeding 40 Gb/s. The receiver is made, in part, of superconducting Josephson junctions. The receiver includes an optical signal detector, an SFQ (single flux quantum) transition detector for converting the signal from the photodetector into a stream of single flux quantum signals, and a clock recovery circuit. The clock recovery circuit includes a superconducting ring oscillator in which an SFQ pulse rotates and provides a clock signal at an output of the oscillator. When a pulse from the stream of single flux quantum pulses arrives from the transition detector, two pulses are generated in the ring oscillator. One of the pulses eliminates the rotating SFQ pulse and the second pulse replaces the rotating SFQ pulse, thereby recovering the phase of the clock signal in one bit.

Abstract: An arrangement to realize the functions of a radio card system in which power is transmitted to perform data communication. According to such arrangement, a delay line and a clock regenerating circuit such as PLL circuit which are previously necessary for demodulation by PSK are not necessary, and thus functions of data communication are realized by minimum hardware construction, size, cost and power consumption. Further, in a data communication system in which electric power transmission using a signal of a frequency fp and digital data communication using a carrier wave of a frequency fs are performed by radio, fs and fp are in the relationship of fs=fp/N (where N is an integer) and a phase shift P when the phase of the carrier wave is modulated by PSK is (M.times.360.degree.)/N (where M, N are integers and P is preferably not equal to 180.degree.).

Abstract: A digital implementation for a carrier detector. The detector determines if the carrier frequency at any instant is within a predetermined frequency band. The detector further determines if the detected frequency remains within the predetermined frequency band for a predetermined period of time. The detector also provides an indication that there has not been any loss of carrier for another predetermined period of time.

Abstract: An apparatus and method is presented to provide wide dynamic range measurements of the input phase to an interferometer using a phase generated carrier especially useful utilizing time multiplexing to demodulate a series of interferometers. A modulation drive output is provided by the invention and maintained under operation at the optimum amplitude by an internal feedback loop. The resulting highly stable system can be fabricated from an analog to digital converter, a digital signal processor, and a digital to analog converter making low cost open loop demodulators a reality.

Abstract: A phase detector responsive to a first signal having a carrier frequency and a second signal close to the carrier frequency, including a carrier suppression circuit which produces a carrier suppressed signal from the first and second signals, and a mixer responsive to the carrier suppressed signal and the carrier frequency to produce an output signal corresponding to the phase difference between the first and second signals.

Abstract: A receiver configured to measure phase change (.DELTA..phi.) in a signal transmitted from a microwave signal source, such as a cell site for cellular telephones, the transmitted signal including a carrier signal (F.sub.1) added to a modulation signal (F.sub.MOD), the receiver providing the phase change measurement (.DELTA..phi.) without further reference to the modulation signal (F.sub.MOD). Utilizing (.DELTA..phi.), distance from the transmitter can be calculated. The receiver includes one or more mixers for receiving the transmitted signal from the cell site and downconverting relative to an intermediate frequency signal (F.sub.IF) to produce an IF mixed signal including a sum IF mixed signal (F.sub.IF +F.sub.MOD) and a difference IF mixed signal (F.sub.IF -F.sub.MOD). The receiver then further includes components to demodulate the IF mixed signal to provide the modulated signal (F.sub.MOD) and the phase change measurement (.DELTA..phi.) with tracking of the intermediate frequency signal (F.sub.IF).

Abstract: A demodulator for radio data communications is provided, which is capable of an optimum demodulation operation in response to the environmental condition under which communications are made independent of the preamble length. A phase angle calculator calculates a phase angle of the input signal. A frequency offset calculator calculates an offset of a carrier frequency of the input signal. A PLL generates a compensated phase angle of the input signal to compensate the frequency offset. A first detector detects the input signal using the uncompensated phase angle to generate a first detected signal. A second detector detects the input signal using the compensated phase angle to generate a second detected signal. A first phase distortion calculator calculates a phase distortion of the first detected signal. A second phase distortion calculator calculates a phase distortion of the second detected signal.

Abstract: A clock recovery circuit based upon an early-late gate approach is applied to high speed serial communication links using NRZ data. The circuit has no systematic phase offset and therefore requires no external phase adjustment circuits or mechanisms. The circuit is used in high speed integrated receivers for applications including fiber optics, disk-drive read/write electronics, mobile communications and high rate- twisted pair data transmission in multimedia systems. Quadrature samples are obtained and held which follow the shape of the NRZ data transition as a function of phase offset. The data signal is passed through the limiter giving rise to a sawtooth shaped phase error signal. A derivative of the error function is taken to provide a frequency error signal to provide for frequency detection and assistance in frequency acquisition of the phase lock loop circuit generating the recovered clock signal from a variably controlled oscillator.

Abstract: A device and a method correct deviation when transferring an information-carrying signal between a transmitter and a receiver. The transmitter can transmit with a plurality of frequencies generated by a voltage-controlled oscillator used for phase demodulation. The receiver demodulates the modulated information-carrying signal. A detector measures the deviation of the modulated information-carrying signal via the information-carrying signal demodulated in the receiver. The frequencies of the demodulated information-carrying signal can be adjusted so that the correct deviation is obtained, and a correct phase demodulation can be carried out.

Abstract: A highly efficient linear amplifier and/or modulator and demodulator comprising first and second feedback loops is provided. Each loop processes a component of the input signal and the component signals are recombined at, for example, a summing junction 18. The feedback signals for each loop are dependent upon the output signal and are in phase quadrature. The input signal is separated into I and Q signals, which are also in phase quadrature, by a component separator 10.

Abstract: In a receiver, a frequency offset estimating circuit inputs a received signal and a decision value from a decision circuit, and estimates a frequency offset. A CIR estimating circuit inputs the estimated frequency offset, the received signal and the decision value, and estimates CIR. A complex conjugate circuit calculates a complex conjugate of the CIR. A multiplication circuit multiplies the complex conjugate and the received signal. Receiving the multiplied value, the decision circuit outputs a decision value.

Abstract: In a demodulation device for demodulating a phase-modulated wave, a baseband signal producing circuit produces a baseband signal having particular information which is dependent on the phase-modulated wave. Responsive to the baseband signal, a phase information producing circuit produces a phase difference signal. A reception logic circuit detects the baseband signal to produce an alarm signal when the particular information is not detected from the baseband signal. In response to the alarm signal, a reset signal producing circuit produces a reset signal. With reference to presence and absence of the reset signal, a selector selects, as a control signal, one of the phase difference signal and a cancelling signal which is supplied to the selector. In accordance with the control signal, a wave producing circuit produces a reproduced and a phase-shifted carrier wave which are used to make the baseband signal producing circuit produce the baseband signal.

Abstract: A cancellation circuit is provided where one demodulator circuit provides a demodulated output having interference voltage owing to interference between carrier signals, between a carrier signal and noise, or a combination of both. Cancellation of interference is particularly directed to narrowband applications. Because the interference is within the band of the desired signal, it cannot be filtered without materially harming the quality of the message. A separation circuit is provided for removing the interference voltage component from the message signal. Outputs are provided to a second demodulator for creating a phase-shifted near replica signal of the dominant carrier signal without an interference voltage component. The separation circuit includes an isolation circuit. Further described are applications of the cancellation circuit, including demultiplexing a power-multiplexed signal, demodulation of two or more carrier signals, and removal of interference from modulated and unmodulated carrier signals.

Abstract: A carrier synchronization device determines and compensates for differences in synchronization between a local carrier and a received modulated signal to be demodulated by the local carder. The device includes an apparatus determining an error signal .epsilon.(t) representative of synchronization errors. This error signal may be filtered, with different loop bandwidths, either by a first low-pass filter (Hf.sub.1 or by a second low-pass filter (Hf.sub.2) in order to generate a control signal u(t) for control of a local oscillator. A lock mode detector compares the control signal with a delayed replica of this control signal and selects one of the filters depending on whether the device operates in the lock-in mode or in the capturing mode. The lock mode detector is programmed to switch automatically from one mode to the other. The device can be used for the synchronization of symbol-block format OFDM signals.

Abstract: In a phase detector, an input signal (Si) is multiplied in a multiplier by two reference signals intersecting at right angles with each other. Signals obtained by multiplication are passed through filters and subjected to quadrature demodulation. An I signal and a Q signal obtained by quadrature demodulation are input to non-linear compression circuits and compressed by logarithmic conversion. Based on the compressed I and Q signals, a phase detection circuit detects the phase of the input signal (Si).