A Feedback To Input Of A Prior Stage Patents (Class 330/100)
  • Patent number: 11196387
    Abstract: An amplifier circuit with in-band gain degradation compensation is shown. The amplifier circuit has an input-stage amplifier, at least one intermediate-stage amplifier, and an output-stage amplifier cascaded between an input port and an output port of the amplifier circuit. A compensation capacitor is coupled between the output port of the amplifier circuit and an output port of the input-stage amplifier. A high-order damping circuit is coupled to an output port of the intermediate-stage amplifier.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: December 7, 2021
    Assignee: MEDIATEK INC.
    Inventor: Sung-Han Wen
  • Patent number: 10574212
    Abstract: A circuit for low-noise reference signal generation comprising a filter unit and a functional unit. The filter unit comprises a transistor and an energy storage component. The transistor comprises a first node, a second node, a control node and a body node. The first node is configured to receive an input signal. The second node is configured to output a filtered signal. The control node is configured to receive a control signal for controlling the transistor to turn on or off. The body node is configured to couple to the input signal, the output signal or a signal which is similar to the input signal or the output signal. The energy storage component is coupled to the second node of the transistor. The functional unit is coupled to the second node of the transistor and the energy storage component. The functional unit has high input impedance.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: February 25, 2020
    Assignee: MEDIATEK INC.
    Inventors: Sung-Han Wen, Chuan-Hung Hsiao
  • Patent number: 10116277
    Abstract: A radio frequency (RF) power amplifier includes an amplifying stage that includes an amplifying module, an input module and a feedback module. The amplifying module receives an RF to-be-amplified signal, and performs power amplification on the RF to-be-amplified signal to generate an RF output signal. The input module receives an RF input signal. The feedback module receives the RF output signal, cooperates with the input module to provide the RF to-be-amplified signal based on the RF input and output signals, and cooperates with the amplifying module to forma positive feedback loop that provides a loop gain which is less than one.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: October 30, 2018
    Assignee: NATIONAL CHI NAN UNIVERSITY
    Inventors: Yo-Sheng Lin, Van-Kien Nguyen
  • Patent number: 9993386
    Abstract: An instrumentation absolute value differential amplifier is used as part of an electroencephalogram, electromyogram or electrocardiogram to quantify the excitation state of a user, processing and transmitting this information as a control signal for a user feedback device. In one possible arrangement, this feedback device includes a wireless sex toy which responds to the sent control information, acting as a mind controlled sex toy. This provides a simple, intuitive, aesthetically appealing interface for creating a unique sexual experience. The use of an instrumentation absolute value differential amplifier is sufficient to monitor the desired signals while reducing the number of parts required and allowing for less precise tolerances than traditional biological monitoring circuits, thus decreasing the cost of production.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: June 12, 2018
    Inventor: Louis G. Racette
  • Patent number: 9948257
    Abstract: Phantom-powered inline preamplifiers capable of variable impedance loading are disclosed with unique adjustable interfaces. By enabling a user to adjust impedance loading from an actively-powered audio preamplifier which takes a microphone electrical signal or another sound source signal as an input, this unique audio preamplifier design with various adjustable impedance loading interface configurations can change sound characteristics according to the user's preference in a recording, production, or live concert environment. In addition, a high pass filter incorporated in a preamplifier with the variable impedance loading feature allows the user to further customize sound characteristics in the recording environment. This novel inline preamplifier, which may be standalone or integrated into a microphone casing, is powered via a microphone cable from a component (e.g. another preamplifier) providing the phantom power.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: April 17, 2018
    Inventor: Rodger Cloud
  • Patent number: 9948251
    Abstract: A low noise amplifier (LNA) system having a constant noise factor (Const-NF) mode and a constant third-order intercept (Const-IP3) mode is disclosed. The LNA system includes an LNA core and a trade-off bias network coupled to the LNA core to selectably bias the LNA core to realize the Const-NF mode and the Const-IP3 mode. The trade-off bias network is made up of selectable Const-NF circuitry and selectable Const-IP3 circuitry. The LNA system further includes a bias switching controller that is configured to enable the selectable Const-NF circuitry and disable the selectable Const-IP3 circuitry to select the Const-NF mode in response to a first condition and to disable the selectable Const-NF circuitry and enable the selectable Const-IP3 circuitry to select the Const-IP3 mode in response to a second condition.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: April 17, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold, Kelvin Kai Tuan Yan
  • Patent number: 9705487
    Abstract: A method for controlling the temperature of a first semiconductor device on an inverter module of a drive configured to drive an electrical machine is disclosed. The method comprises calculating at least one harmonic component of at least one power loss of at least the first semiconductor device; using the at least one harmonic component of the at least one power loss of the at least the first semiconductor device to calculate a temperature of the first semiconductor device; and if the calculated temperature of the first semiconductor device does not meet a predetermined temperature condition, issuing a command to control the operation of the drive such that the temperature of the first semiconductor device is changed to meet the predetermined temperature condition.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: July 11, 2017
    Assignee: NIDEC CONTROL TECHNIQUES LIMITED
    Inventors: Michael Cade, Gareth Christopher James
  • Patent number: 9571051
    Abstract: An instrumentation amplifier (INA) that includes a first amplifier and a second amplifier coupled to the first amplifier. The first amplifier includes a first transistor. The first amplifier is configured to receive a positive phase signal of a differential signal. The second amplifier includes a second transistor and is configured to receive a negative phase signal of the differential signal. The first and second transistors each include a gate, source, and drain. The first transistor drain is connected to the second transistor drain.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: February 14, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Charles Parkhurst, Hector Torres
  • Patent number: 9553548
    Abstract: A circuit and method for regulating an output voltage are provided. The circuit includes a fully differential first stage amplifier, a second stage amplifier, and a power output driver transistor. The first stage amplifier receives a reference voltage and feedback voltage relative to an output voltage of the power output driver transistor. A differential output of the first stage amplifier is received at differential inputs of the second stage amplifier. The second stage amplifier provides a voltage at a control terminal of the power transistor. The output voltage of the power transistor is based on the voltage at the control terminal and a supply voltage coupled to the power output driver transistor.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: January 24, 2017
    Assignee: NXP USA, INC.
    Inventors: Chang Joon Park, Ravi C. Geetla, Octavio A. Gonzalez
  • Patent number: 9543907
    Abstract: Provided is a current-voltage conversion amplifier circuit including: a plurality of light receiving devices generating a current signal proportional to an amount of light by receiving the light; multipliers amplifying the current signal, converting the amplified current signal into a first voltage signal, outputting the amplified current signal, or outputting the converted first voltage signal; multi input amplifiers outputting first and second output voltage pairs through a process for receiving output values of multipliers and an offset voltage and amplifying the received output values and offset voltage; a multiplexing unit selecting and outputting one first and second output voltage pair among the first and second output voltage pairs outputted from multi input amplifiers; and a signal conversion unit converting a difference value between first and second output voltages outputted from the multiplexing unit and outputting the converted digital signal.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: January 10, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-deuk Jeon, Jung Hee Suk, Chun-Gi Lyuh, Yi-Gyeong Kim, Jong Pil Im, Min-Hyung Cho
  • Patent number: 9306508
    Abstract: A reconfigurable integrator/Differentiator circuit includes: a first input terminal; a first output terminal; a first current follower amplifier having a second input terminal, a second inverting output terminal, and a third non-inverting output terminal, wherein the second inverting output terminal provides feed back to the first input terminal and the third non-inverting output terminal is directly connected to the first output terminal; a second current follower amplifier having a third input terminal, a fourth inverting output terminal, and a fifth non-inverting output terminal, wherein the fourth inverting output terminal provides feed back to the first input terminal and the fifth non-inverting output terminal is directly connected to the first output terminal; a single resistor being connected between the first input terminal and the second input terminal, and a single capacitor being connected between the first input terminal and the third input terminal.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: April 5, 2016
    Assignee: King Fahd University of Petroleum and Minerals
    Inventor: Hussain Abdullah Alzaher
  • Patent number: 9024686
    Abstract: An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance, and a feedback circuit is provided. The amplifier circuit includes a plurality of amplifiers each of which negative feedback is provided to and which are connected in series, and a feedback means (feedback circuit) which is connected to an output side of an amplifier near output of the amplifier circuit and an input side of an amplifier near input of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: May 5, 2015
    Assignee: NF Corporation
    Inventor: Shingo Sobukawa
  • Patent number: 8773199
    Abstract: Compensation methods and systems for voltage-feedback amplifiers provide improved dynamic performance (i.e., increased bandwidth and the elimination or alleviation of a slew limitation) at various gains by self-adaptively changing the Miller effect with respect to the gain setting.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: July 8, 2014
    Assignee: Analog Devices, Inc.
    Inventor: Quan Wan
  • Patent number: 8729962
    Abstract: A millimeter wave power amplifier is disclosed. In an exemplary embodiment, a MM wave power amplifier (PA) includes a plurality of amplifier stages coupled together to receive a MM wave input signal and produce an amplified MM wave output signal, and one or more feedback elements coupled across the amplifier stages, each feedback element coupled across an odd number of the amplifier stages to increase an operating bandwidth of the PA.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 20, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Saihua Lin, Yongwang Ding, Cheol-Woong Lee
  • Patent number: 8723604
    Abstract: Compensation methods and systems for voltage-feedback amplifiers provide improved dynamic performance (i.e., increased bandwidth and the elimination or alleviation of a slew limitation) at high gains by direct feedback of an AC signal (i.e., an intermediate voltage) to an amplifier input without being attenuated by feedback resistor network.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: May 13, 2014
    Assignee: Analog Devices, Inc.
    Inventor: Quan Wan
  • Patent number: 8687821
    Abstract: An amplifier is disclosed, wherein the output stage is split between a primary output stage and a secondary stage. To minimize or eliminate any audible plop when the amplifier is switched on, the primary stage is connected, and the second stage is gradually connected using a switch. The gradual connection can be by means of varying the pulse-density of a pulse wave modulation on the switch, from fully open (0% pulse-density) to fully closed (100%). The inverse process can minimize or eliminate plop during switch-off. Separate feedback loops are switchable, from the primary and secondary stages; in a DC-coupled embodiment, the feedback loop from the secondary stage may include DC-offset cancelling circuitry, to both reduce or eliminate the plop and avoid and DC-offset current through the speaker.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: April 1, 2014
    Assignee: NXP B.V.
    Inventor: Han Martijn Schuurmans
  • Patent number: 8610495
    Abstract: Some embodiments of the invention relate a transimpedance amplifier circuit having a negative feedback network that provides additional filtering of an out-of-band transmitted signal is provided herein. In one embodiment, the transimpedance amplifier circuit has a first pole, transimpedance amplifier having a multi-stage operational amplifier with an input terminal and an output terminal. An RC feedback network extends from the output terminal to the input terminal. A negative feedback network, extending from an internal node of the multi-stage operational amplifier to an input terminal of the single pole, transimpedance amplifier provides a negative feedback signal with an amplitude having an opposite polarity as the out-of-band transmitted signal. The negative feedback signal suppresses the out-of-band-transmitted signals within the demodulator circuit, thereby improving linearity of the transimpedance amplifier circuit.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: December 17, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Umut Basaran, Ashkan Naeini
  • Publication number: 20130057341
    Abstract: An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance, and a feedback circuit is provided. The amplifier circuit includes a plurality of amplifiers each of which negative feedback is provided to and which are connected in series, and a feedback means (feedback circuit) which is connected to an output side of an amplifier near output of the amplifier circuit and an input side of an amplifier near input of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 7, 2013
    Applicant: NF CORPORATION
    Inventor: Shingo Sobukawa
  • Patent number: 8341679
    Abstract: A plurality of intelligent device systems for use with a wideband signal distribution network, and methods for transmitting digital information and receiving digital and non-digital information onto and off of an RF carrier through a wideband signal distribution network, are disclosed. The intelligent device systems provide networks of intelligent devices that modulate and demodulate digital video, IP video/data/voice and digital wireless onto, and off of, a wideband signal distribution system, such as an analog carrier system, using existing EIA/TIA 568 standard wiring infrastructure. The methods modulate and demodulate digital video, IP video/data/voice and digital wireless onto, and off of, a wideband distribution system, such as an analog carrier system, and separate IP portions from non-IP portions.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: December 25, 2012
    Assignee: CBV, Inc.
    Inventors: Earl Hennenhoefer, Richard Snyder, Robert Stine
  • Patent number: 8105928
    Abstract: A method of implementing bandgap tuning of a graphene-based switching device includes subjecting a bi-layer graphene to an electric field while simultaneously subjecting the bi-layer graphene to an applied strain that reduces an interlayer spacing between the bi-layer graphene, thereby creating a bandgap in the bi-layer graphene.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Yu-Ming Lin, Jeng-Bang Yau
  • Patent number: 8049566
    Abstract: A receiver includes a feedback low noise amplifier (LNA). The feedback LNA has an LNA gain and includes an LNA input configured to receive a signal from an antenna and an LNA output configured to output an amplified voltage signal. The receiver also includes a resistive element, having a resistance, coupled to the LNA output and configured to convert the amplified voltage signal into a current. The receiver also includes a current commuting mixer coupled to the resistive element and configured to receive the current from the resistive element, where the current output by the resistive element is determined at least in part by the amplified voltage signal and the resistance of the resistive element.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: November 1, 2011
    Assignee: Project FT, Inc.
    Inventor: Farbod Aram
  • Patent number: 7893760
    Abstract: An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: February 22, 2011
    Assignee: Fujitsu Limited
    Inventors: Mariko Sugawara, Yukito Tsunoda
  • Publication number: 20110018627
    Abstract: A nested transimpedance amplifier circuit includes a first-order nested transimpedance amplifier having an input and an output. The first-order nested transimpedance amplifier is configured to be powered by a first voltage. A charge pump module is configured to receive the first voltage and a second voltage. The second voltage is different from the first voltage. The charge pump module generates a third voltage based on the first voltage and the second voltage. A first operational amplifier has an input and an output. The input of the first operational amplifier communicates with the output of the zero-order transimpedance amplifier, and the first operational amplifier is configured to be powered by the third voltage.
    Type: Application
    Filed: August 17, 2010
    Publication date: January 27, 2011
    Inventor: Sehat Sutardja
  • Patent number: 7855602
    Abstract: An amplifier arrangement includes an output amplifier stage (OA) comprising a stage input (SIN), a stage output (SOUT) which is coupled to a signal output (OUT) of the amplifier arrangement, and a capacitive element (CE) which couples the stage output (SOUT) to the stage input (SIN). A driver stage (DR) comprises a driver input (DIN) and a driver output (DOUT) which is coupled to the stage input (SIN). The driver stage (DR) is configured to generate a voltage potential at a driver output (DOUT) depending on an input current at the driver input (DIN) and to provide a charging current to the capacitive element (CE) being higher than the input current.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: December 21, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Carlo Fiocchi, Andrea Pierin
  • Publication number: 20100164618
    Abstract: The invention relates to a feedback network (60) for cascade amplifiers (200), which comprises an active stage (30) to feed signal back to a first internal node (65) at the output of the first amplifier stage (61) of the cascade. The invention further relates to a feedback network (60) which comprises said active feedback stage (30) with said first internal amplifier node (65) connection and a feedback resistor (10) connected from said cascade amplifier output port (out) to its input port (in).
    Type: Application
    Filed: December 29, 2008
    Publication date: July 1, 2010
    Inventor: Esa Tiiliharju
  • Patent number: 7696820
    Abstract: An amplifier circuit includes first, second, and third amplifiers each having an input and an output. The amplifier circuit further includes first and second capacitances and a resistance. The input of the second amplifier communicates with the output of the first amplifier. The first capacitance communicates with the input of the first amplifier and the output of the second amplifier. The input of the third amplifier communicates with the output of the second amplifier. The second capacitance communicates with the output of the third amplifier and the input of the second amplifier. The resistance directly communicates with the output of the third amplifier and the input of the first amplifier.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: April 13, 2010
    Assignee: Marvell International Ltd.
    Inventor: Thart Fah Voo
  • Patent number: 7675364
    Abstract: A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: March 9, 2010
    Assignee: Black Sand Technologies, Inc.
    Inventors: Alan L. Westwick, Susanne A. Paul
  • Patent number: 7652531
    Abstract: The present invention provides a cost-effective and power-effective solution to a high performance amplifier design over conventional Class A and Class B/AB amplifiers. Without increasing cost or losing simplification of conventional Class B/AB amplifier configuration, two kinds of unique local feedback loops, which cover the second and third stages and further offer a feedback shifting feature over frequency range, are disclosed to replace the traditional Miller compensation capacitor to suppress dominant distortion, which is usually generated by the two last stages while maintaining stability of the amplifier, through high frequency end.
    Type: Grant
    Filed: March 2, 2008
    Date of Patent: January 26, 2010
    Inventors: Zhenwu Wang, Dong An, Huixing Jin
  • Patent number: 7616057
    Abstract: A differential transimpedance amplifier circuit comprises a first operational amplifier having a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A second operational amplifier has a second inverting input, a second non-inverting input, a second inverting output and a second non-inverting output. The second inverting output communicates with the first non-inverting input and the second non-inverting output communicates with the first inverting input. A first feedback element communicates with the first non-inverting input and the first inverting output. A second feedback element communicates with the first inverting input and the first non-inverting output. A third feedback element communicates with the second inverting input and the first inverting output. A fourth feedback element communicates with the first non-inverting input and the first non-inverting output.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: November 10, 2009
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7605649
    Abstract: A transimpedance amplifier comprises a first operational amplifier having an input and an output. A second operational amplifier has an input and an output that communicates with the input of the first operational amplifier. A first feedback element has one end that communicates with the input of the first operational amplifier and another end that communicates with the output of the first operational amplifier, wherein the first feedback element comprises a first capacitance. A second feedback element communicates with the input of the first operational amplifier and another end that communicates with the output of the first operational amplifier.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: October 20, 2009
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7551024
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output, and a first operational amplifier (opamp). The opamp includes an input that communicates with said output of said zero-order TIA, a first transistor driven by said input, a second transistor that is driven by a first bias voltage and communicates with said first transistor, a first current source that communicates with said second transistor, and an output at a node between the first transistor and the second transistor.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: June 23, 2009
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7283840
    Abstract: A dual-mode analog baseband circuit is implementable on a single IC with reduced chip area. The baseband portion of the IC includes a single dual-mode complex filter that is reconfigurable to be a filter for Bluetooth signals or for wireless local area network (wireless LAN) format signals, such as 802.11b, and includes a single dual-mode amplifier that is reconfigurable to amplify Bluetooth signals or wireless LAN format signals.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: October 16, 2007
    Assignee: Chrontel, Inc.
    Inventor: Thomas Cho
  • Patent number: 7276965
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistance has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A first feedback capacitance has a first end that communicates with the input of the zero-order TIA and a second end that communicates with the output of the zero-order TIA. A capacitor has one end that communicates with the input of the zero-order TIA.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: October 2, 2007
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7265632
    Abstract: In one embodiment, a current source circuit having a reference resistor produces first, second and third bias currents that vary with manufacturing variances of the current compensation resistor. An input amplification stage includes a transconductance stage biased by the first bias current, a first transimpedance amplifier (TIA) biased by the second bias current, and a first feedback resistor coupled between the first TIA's input and output. The input of the first TIA is coupled to an output of the transconductance stage. An output amplification stage is biased by the third bias current and has an input coupled to an output of the first TIA. A second feedback resistor is coupled between the output of the output amplification stage and the input of the transconductance stage. The reference resistor and first and second feedback resistors are formed using a common manufacturing process.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: September 4, 2007
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Hock Tiong Kwa, Xue Min Ji, Bin Zhang, Pak Kwong Chan
  • Patent number: 7245887
    Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: July 17, 2007
    Assignee: Broadcom Corporation
    Inventor: Shahla Khorram
  • Patent number: 7173486
    Abstract: A nested transimpedance amplifier (TIA) circuit comprises a zero-order TIA having an input and an output. A first transconductance amplifier has an input that communicates with said output of said zero-order TIA and an output. A first feedback resistance has one end that communicates with said input of said zero-order TIA and an opposite end that communicates with said output of said first transconductance amplifier. A first feedback capacitance has a first end that communicates with said input of said zero-order TIA and a second end that communicates with said output of said zero-order TIA. A capacitance has one end that communicates with said input of said zero-order TIA.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: February 6, 2007
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7164318
    Abstract: Continuous variable-gain low-noise amplifier. The amplifier continuously adjusts its gain between well-defined high and low values by using a cascode current-steering circuit to partition signal current between two different nodes of an output loading network. A shunt feedback network connected from an intermediate node of the loading network to the input provides negative feedback that linearizes the amplifier as its gain is decreased. The circuit degrades the noise figure at lower gains by varying the gain without directly dumping the signal current to the power supply. The circuit produces only small changes in input and output impedances and preserves an improved reverse-isolation cascode characteristic as the gain is controlled.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: January 16, 2007
    Assignee: Sequoia Communications
    Inventors: Damian Costa, Joseph Austin, John Groe, Michael Farias
  • Patent number: 7120399
    Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: October 10, 2006
    Assignee: Broadcom Corporation
    Inventor: Shahla Khorram
  • Patent number: 6956431
    Abstract: A pulse width modulation (PWM) amplifier which is capable of reducing unwanted radiation from a PWM output thereof, which can cause EMI, while reducing manufacturing costs thereof. A triangular wave-generating circuit (3) of the PWM amplifier outputs a triangular wave. The triangular wave has a waveform steep or gentle in pulse rising and falling slopes dependent on a value of current flowing through an FET (116) or an FET (117). The value of current is changed by a current flowing through a FET (112). A switching element (32) changes voltage applied to the gate of an FET (110), for control of increase and decrease in the current flowing through the FET (112). This enables the triangular wave to be generated such that it is formed by pulses having different periods. An input signal is subjected to PWM amplification based on the triangular wave generated.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: October 18, 2005
    Assignee: Yamaha Corporation
    Inventor: Toshio Maejima
  • Patent number: 6952159
    Abstract: A coupling apparatus (1) having a mains connection (2) for connection to a low-voltage mains power supply system, and having an appliance connection (3) for connection of any appliance for transmitting and/or receiving an RF signal has a voltage converter (5) and a high-pass filter (6.1, 6.2). The voltage converter converts the mains voltage which is present at the mains connection to a very-low voltage, which is suitable for supplying the appliance connected to the appliance connection. Inductances (4.3 to 4.6) of suitable size are interposed in the appropriate connecting lines as low-pass filters for decoupling the RF signal path from the supply signal path, and for suppressing undesirable, radio-frequency signal components in the supply voltages. RF signals which are transmitted or are to be transmitted via the low-voltage mains power supply system are coupled from the mains connection via the high-pass filter to the appliance connection, and from the appliance connection to the mains connection.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: October 4, 2005
    Assignee: Ascom Powerline Communications AG
    Inventor: Kurt Müller
  • Patent number: 6943623
    Abstract: Amplification circuitry for driving a load in response to an input signal, comprising: a phase locked loop, for producing a pulse width modulated signal for driving the load and input circuitry arranged to control the phase locked loop and vary the pulse width modulated signal in response to the input signal.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: September 13, 2005
    Assignee: Nokia Corporation
    Inventor: Philip Trevelyan
  • Patent number: 6930548
    Abstract: One aspect of the invention is an amplifier (10), comprising an input stage amplifier (20) coupled to an output node (81). The amplifier (10) further comprises a class D output stage (50), which comprises at least two switching elements (P1, N1) and coupled to the output node (81). The amplifier (10) also comprises a control circuit (40) coupled to the output stage (50). The control circuit (40) is operable to produce a tri-state output of the output stage (50) in response to a sensed value proportional to an amount of current that flows to the output node (81).
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: August 16, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Randall J. Stephens, Teddy D. Thomas
  • Patent number: 6873703
    Abstract: A transmission channel for a subscriber line interface circuit comprises a front end, tip/ring current-sensing transimpedance stage, containing relatively low valued tip and ring sense resistors coupled in circuit with tip and ring paths of a telecommunication wireline pair. The front end transimpedance stage transforms differential tip and ring input currents sensed by the tip and ring sense resistors into a single ended voltage, which is coupled to a transconductance amplifier filter/gain stage. The filter/gain stage is configured to provide a programmable output impedance, and converts the voltage from the current-sensing transimpedance stage into an output transmission voltage for application to a selected one of a current-sense, voltage-feed, or voltage-sense, voltage-feed telecommunication circuit.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: March 29, 2005
    Assignee: Intersil Corporation
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6836182
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistor has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A capacitor has one end that communicates with the input of the zero-order TIA. The gain-bandwidth product of the nested TIA is increased. Differential mode TIAs also have increased gain-bandwidth products.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: December 28, 2004
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 6833757
    Abstract: One aspect of the invention is an amplifier (10), comprising an input stage amplifier (20) coupled to an output node (81). The amplifier (10) further comprises a class D output stage (50), which comprises at least two switching elements (P1, N1) and coupled to the output node (81). The amplifier (10) also comprises a control circuit (40) coupled to the output stage (50). The control circuit (40) is operable to produce a tri-state output of the output stage (50) in response to a sensed value proportional to an amount of current that flows to the output node (81).
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: December 21, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Randall J. Stephens, Teddy D. Thomas
  • Patent number: 6801089
    Abstract: Continuous variable-gain low-noise amplifier. The amplifier continuously adjusts its gain between well-defined high and low values by using a cascode current-steering circuit to partition signal current between two different nodes of an output loading network. A shunt feedback network connected from an intermediate node of the loading network to the input provides negative feedback that linearizes the amplifier as its gain is decreased. The circuit degrades the noise figure at lower gains considerably less than conventional circuits by varying the gain without directly dumping the signal current to the power supply. The circuit produces only small changes in input and output impedances and preserves an improved reverse-isolation cascode characteristic as the gain is controlled.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: October 5, 2004
    Assignee: Sequoia Communications
    Inventors: Damian Costa, Joseph Austin, John Groe, Michael Farias
  • Patent number: 6801087
    Abstract: An integrated circuit includes an analog amplifier connected to a terminal pad and has a Miller compensation of a section of the analog amplifier. The Miller compensation circuit is connected to a terminal for reference-ground potential through a capacitive element. An EMC interference radiation that can be coupled in through the terminal pad is attenuated by the capacitive element. The operating points of the internal nodes of the analog amplifier are, thereby, stabilized.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: October 5, 2004
    Assignee: Infineon Technologies AG
    Inventor: Udo Ausserlechner
  • Patent number: 6771711
    Abstract: A digital GMSK filter for use for frequency modulation of a carrier signal in a GMSK transmission system is described. The GMSK filter uses a large number of individual current sources, whose current values are individually weighted. The current sources are driven via a control logic module using a shift register with a thermometer code, such that this results in a total current with a Gaussian characteristic, which is converted across a resistor to a voltage and drives a voltage controlled oscillator (VCO). The filter provides exact implementation of the sample values, virtually without any quantization error, and requires only a small chip area for its implementation.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: August 3, 2004
    Assignee: Infineon Technologies AG
    Inventors: Christian Kranz, Volker Christ
  • Patent number: 6765438
    Abstract: A transconductance power amplifier for amplifying a signal to a capacitive load, including a first N-channel enhancement MOSFET transistor operatively arranged to source current to the capacitive load, wherein the first N-channel MOSFET transistor has a threshold gate to source voltage, a second N-channel enhancement MOSFET transistor operatively arranged to sink current to the capacitive load, an operational amplifier operatively arranged to transmit and amplify an input signal to both of the first and second MOSFET transistors, and, means for biasing the first N-channel enhancement MOSFET transistor such that its gate to source voltage is always at or above its threshold when the load draws near zero current so that very little additional gate charge is required to turn it on more fully.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: July 20, 2004
    Assignee: Bae Systems Information and Electronic Systems Integration, Inc.
    Inventors: Richard Brosh, Scott C. Willis
  • Patent number: 6762644
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistor has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A capacitor has one end that communicates with the input of the zero-order TIA. The gain-bandwidth product of the nested TIA is increased. Differential mode TIAs also have increased gain-bandwidth products.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: July 13, 2004
    Assignee: Marvell International, Ltd.
    Inventor: Sehat Sutardja