Abstract: A communication device includes: a communication module configured to discover a network capable of communication; a processor configured to identify a first frequency band of the network and to output a control signal for changing a pass band of a band pass filter; a multiplexer configured to change the pass band of the band pass filter to correspond to the first frequency band of the network; and a tunable tuner circuit configured to change an impedance thereof according to the control signal.

Abstract: A communication device includes: a communication module configured to discover a network capable of communication; a processor configured to identify a first frequency band of the network and to output a control signal for changing a pass band of a band pass filter; a multiplexer configured to change the pass band of the band pass filter to correspond to the first frequency band of the network; and a tunable tuner circuit configured to change an impedance thereof according to the control signal.

Abstract: A system includes a power supply model component and a disturbance estimating component. The power supply model component receives an estimated disturbance. The disturbance estimating component provides said estimated disturbance from a difference between a sensed output of a power supply and an estimated output from said power supply model component.

Abstract: A transmitter system including: a bidirectional signaling (BDS) network having first and second networks for carrying first and second carrier signals, and having a set of n phase synchronous location pairs (ai, bi); and also including tunable transmitter circuits for driving an antenna array, each tunable transmitter circuit having an output line for carrying an output signal and first and second input lines electrically connected to the first and second networks of the BDS network at locations of a corresponding one of the set of phase synchronous location pairs, and including a multiplier having a first input electrically connected to the first input line of that tunable transmitter circuit; a phase setting circuit electrically connected to the multiplier for controlling the phase of the output signal of that tunable transmitter circuit; and an amplitude setting circuit for controlling the amplitude of the output signal of that tunable transmitter circuit.

Abstract: Disclosed are a semiconductor integrated circuit device and a wireless communication system that are capable of improving reception sensitivity. The wireless communication system includes, for instance, a first duplexer, a second duplexer, a first low-noise amplifier circuit, and a second low-noise amplifier circuit. A transmission band compliant with a communication standard is split into two segments for use, namely, low- and high-frequency transmission bands. A reception band compliant with the communication standard is split into two segments for use, namely, low- and high-frequency reception bands. The first duplexer uses the low-frequency transmission band and low-frequency reception band as passbands. The second duplexer uses the high-frequency transmission band and high-frequency reception band as passbands.

Abstract: Provided are a first filter 63a and a second filter 63b each having a pass band in the range of a frequency band that is obtained by, for example, substantially bisecting a frequency band of f1 to f4. In that case, the regions of the first filter 63a and the second filter 63b partially overlap with each other with the center frequency f5 interposed therebetween. In practice, even if the division is not bisection, a configuration is adopted in which a frequency region of the wider band (the first frequency band 61a) closer to a second frequency band 61b side is covered by the second filter 63b. Accordingly, it is possible to suppress the influence of load fluctuation in a multiband-compatible radio communication device.

Abstract: A control loop circuit for use in a closed-loop control system that controls a system such as a linear motor is presented. The control loop circuit includes a lead-lag compensator that features a lead compensation network configured to reduce output noise without substantially changing the effect of the lead compensation in the control system's frequency response.

Abstract: A radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a temperature sensing module that produces accurate voltage level readings that may be mapped into corresponding temperature values. A processor, among other actions, adjusts gain level settings based upon detected temperature values. One aspect of the present invention further includes repetitively inverting voltage signals across a pair of semiconductor devices being used as temperature sensors to remove a common mode signal to produce an actual temperature-voltage curve. In one embodiment of the invention, the circuitry further includes a pair of amplifiers to facilitate setting a slope of the voltage-temperature curve.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: A radio frequency (RF) switching power amplifier comprises: a switching amplifier 203 to provide an amplified signal within an RF band; and a delta signal modulator (DSM) 207 that is operable; to control the switching amplifier in a feedback configuration, to process an input signal within an intermediate frequency (IF) band where the input signal corresponds to a base band signal and the amplified signal, and to provide an output signal within the RF band to drive the switching amplifier. Certain embodiments allow for or compensate for a floating or variable IF band and multiple RF bands.

Abstract: A dual band filter network for a radio communication apparatus is provided. The network has an antenna (212) for receiving and transmitting signals from a first frequency band and a second frequency band. The network has a first duplex pair (202) including a first transmit filter (204) including a first passband and stopband. The first duplex pair (202) also includes a second receive filter (206). The first filter (204) presents a consistent phase in the second passband due to the wide frequency separation between the first filter (204) and the second filter (206). The network has a second duplex pair (202') with similar characteristics as the first duplex pair (202). The network also has a switching circuitry (210) controlled by a switch control voltage (214) for selecting the appropriate filter circuitry. The network can be provided in a small sized, low cost package that also offers improved insertion loss performance.

Abstract: An enhanced pole quality factor (Q) notch filter section circuit includes an active biquadratic notch filter section and a pole quality factor enhancement amplifier responsive to the output of the biquadratic notch filter section for providing at the input of the biquadratic notch filter section negative feedback in pass and stop bands of frequencies and positive feedback in the transition range of frequencies between the pass and stop bands of frequencies.