And Temperature Compensation Patents (Class 330/266)
  • Patent number: 11095988
    Abstract: An electronic device according to an embodiment may comprise: a speaker, an amplifier connected to the speaker through a first electrical path; and at least one processor electrically connected to the amplifier, wherein the at least one processor is configured to: provide a first audio signal set to a first volume level to the speaker via the amplifier; when the first volume level is less than a predetermined first value, output the first audio signal at the first volume level through the speaker; and when the first volume level is equal to or greater than the first value, control a volume level of the first audio signal on the basis of a temperature value of the speaker, which is estimated from the first audio signal.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: August 17, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Jun Ryu, Ki Won Kim, Sang Hoon Kim, Sang Woo Bae, Yeo Jin Kim, Chang Tae Kim, Sung Bin Hong
  • Patent number: 10780786
    Abstract: A system, method, and computer-readable storage medium to dynamically manage heat in an electric energy storage system, such as a battery pack or ultra-capacitor pack system in a system or device having a variable electrical loads that may impact performance or life, such as in an electric vehicle.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: September 22, 2020
    Inventor: Robert Del Core
  • Patent number: 10469043
    Abstract: An ultrasound probe buffer is provided. The ultrasound probe buffer may include a high impedance amplifier having a common-source core stage with series-series local feedback. The high impedance amplifier may include a first MOSFET and a second MOSFET, wherein a source terminal of the first MOSFET is coupled to a source terminal of the second MOSFET.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: November 5, 2019
    Assignee: Microchip Technology Incorporated
    Inventors: Isaac Ko, Ka Wai Ho, Wan Tim Chan
  • Publication number: 20150084696
    Abstract: An amplification circuit includes a first power supply; a first bipolar transistor whose collector is connected to the first power supply; a first resistor one terminal of which is connected to an emitter of the first bipolar transistor; a second bipolar transistor whose collector is connected to the other terminal of the first resistor; a second power supply; a third bipolar transistor whose collector is connected to the second power supply; a second resistor one terminal of which is connected to an emitter of the third bipolar transistor; and a fourth bipolar transistor whose collector is connected to the other terminal of the second resistor. An emitter of the second bipolar transistor is directly connected to an emitter of the fourth bipolar transistor, thereby becoming an output terminal.
    Type: Application
    Filed: August 25, 2014
    Publication date: March 26, 2015
    Applicant: SONY CORPORATION
    Inventor: Hideaki SHIOBARA
  • Patent number: 8897728
    Abstract: The method for memory effects quantification and comparison in RF transmitters and amplifiers is a method in which a processor performs a spectrum analysis of an RF transmitter or RF amplifier device under test (DUT). The processor then calculates a normalized frequency (fn) according to the relation: f n = f - f c BW . The processor then utilizes the normalized frequency calculation in a spectrum asymmetry index (SAI) computation characterized by the relation: SAI = 1 K ? ? f n = f n , start f n = f n , stop ? ? ? P ? ( f n ) - P ? ( - f n ) ? . Next, utilizing the absolute value of the normalized frequency according to the relation: ? f n ? = ? f - f c BW ? , the processor displays the calculated SAI and causes a display device to display a mirrored spectrum as a function of the absolute value of the normalized frequency around a zero frequency.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: November 25, 2014
    Assignee: King Fahd University of Petroleum and Minerals
    Inventor: Oalid Hammi
  • Patent number: 8717106
    Abstract: The invention provides an amplifier circuit. In one embodiment, the amplifier circuit includes a first class-AB amplifier and a second class-AB amplifier. The first class-AB amplifier amplifies an input signal to generate the first output signal. The second class-AB amplifier amplifies the first output signal to generate a final output signal on an output node. When the power of the input signal is greater than a threshold level, the second class-AB amplifier is in a turned-off state during a turned-on duration period of the first class-AB amplifier, and the first class-AB amplifier is in a turned-off state during a turned-on duration period of the second-class AB amplifier.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: May 6, 2014
    Assignee: Mediatek Inc.
    Inventors: Chi-Yao Yu, Siu-Chuang Ivan Lu, George Chien
  • Patent number: 8665022
    Abstract: The present disclosure describes a distributed amplifier (DA) that includes active device cells within sections that are configured to provide an input gate termination that is conducive for relatively low noise and high linearity operation. A section adjacent to an output of the DA is configured to effectively terminate the impedance of an input transmission line of the DA. Each active device cell includes transistors coupled in a cascode configuration that thermally distributes a junction temperature among the transistors. In this manner, noise generated by a common source transistor of the cascode configuration is minimized. The transistors coupled in the cascode configuration may be fabricated using gallium nitride (GaN) technology to reduce physical size of the DA and to further reduce noise.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: March 4, 2014
    Assignee: RF Micro Devices, Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 7808322
    Abstract: A system comprises a variable gain amplifier (VGA) that amplifies an input signal with a gain that is based on a gain control signal. A power amplifier receives an output of the VGA. Memory switches between at least two of N output power settings each including a predetermined reference value and a predetermined gain offset value. The memory substantially concurrently changes from the predetermined reference value and the predetermined gain offset value of a prior one of the N output power settings to the predetermined reference value and the predetermined gain offset value of a current one of the N output power settings, where N is an integer greater than one. A gain control adjuster adjusts the gain control signal based on an output of the power amplifier and the predetermined reference value and gain offset value of the current one of the N output power settings.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: October 5, 2010
    Assignee: Marvell International Ltd.
    Inventors: Sang Won Son, King Chun Tsai, Yuan-Ju Chao, Lawrence Tse
  • Patent number: 7778351
    Abstract: A CMOS receiver system having a tunable receiver having a tunable gain and a bandwidth system is provided. The tunable receiver includes means for receiving input signals; and a control circuit controlled by a control signal for tuning at least one of the gain and the bandwidth of the tunable receiver, wherein the control signal is indicative of a data rate of the input signals. Furthermore, a method is provided for tuning a CMOS receiver receiving input signals. The method includes the steps of receiving at least one control signal, and controlling one of gain and bandwidth of the CMOS receiver in accordance with the at least one control signal, wherein the at least one control signal is indicative of a data rate of the received input signals.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Li-Kong Wang, Philip J. Murfet
  • Patent number: 7619476
    Abstract: An amplifier biasing stage includes a transistor that provides a biasing signal for a complementary pair of field-effect transistors included in an output stage of an amplifier. The amplifier biasing stage also includes one resistive element connected to an emitter of the transistor, another resistive element connected to a base of the transistor, and still another resistive element connected to a collector of the transistor. The respective resistances of the resistive elements are selected to substantially match a voltage provided by the amplifier biasing stage to a gate-to-source voltage of the complementary pair of field-effect transistors. The resistances of the resistive elements are also selected to substantially match a temperature coefficient of the amplifier biasing stage to a temperature coefficient of the complimentary pair of field-effect transistors.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: November 17, 2009
    Assignee: Cirrus Logic, Inc.
    Inventor: Jefferson H. Harman
  • Patent number: 7583148
    Abstract: A transconductance control circuit, comprising: a test transconductance circuit for providing an output current from a reference voltage; apparatus for deriving a bias current for the test transconductance circuit from the output current, the bias current including a component that varies with temperature and a component that varies with process; and apparatus for providing the bias current to other transconductance circuits.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: September 1, 2009
    Assignee: Jennic Limited
    Inventor: Kim Ll
  • Patent number: 7369816
    Abstract: A radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a temperature sensing module that produces accurate voltage level readings that may be mapped into corresponding temperature values. A processor, among other actions, adjusts gain level settings based upon detected temperature values. One aspect of the present invention further includes repetitively inverting voltage signals across a pair of semiconductor devices being used as temperature sensors to remove a common mode signal to produce an actual temperature-voltage curve. In one embodiment of the invention, the circuitry further includes a pair of amplifiers to facilitate setting a slope of the voltage-temperature curve.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: May 6, 2008
    Assignee: Broadcom Corporation
    Inventors: Michael Steven Kappes, Arya Reza Behzad
  • Patent number: 7158633
    Abstract: Subscriber line interface circuitry includes an integrated circuit having sense inputs for a sensed tip signal and a sensed ring signal of a subscriber loop. The integrated circuit generates a subscriber loop linefeed driver control signal in response to the sensed signals. The linefeed driver does not reside with the integrated circuit. A method for monitoring power dissipation of the linefeed driver components includes the step of sampling at least one of the tip and ring signals to determine a line voltage and a line current of a selected linefeed driver component. Instantaneous power dissipation of the linefeed component is estimated and then filtered to generate an estimated junction temperature of the linefeed component. In one embodiment, the linefeed driver includes a tip fuse series-coupled to the tip line and a ring fuse series-coupled to the ring line.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: January 2, 2007
    Assignee: Silicon Laboratories, Inc.
    Inventor: Jerrell P. Hein
  • Patent number: 7135921
    Abstract: A differential circuit and an amplifier circuit for reducing an amplitude difference deviation, performing a full-range drive, and consuming less power are disclosed. The circuit includes a first pair of p-type transistors and a second pair of n-type transistors. A first current source and a first switch are connected in parallel between the sources of the first pair of transistors, which are tied together, and a power supply VDD. A second current source and a second switch are connected in parallel between the sources of the second pair of transistors, which are tied together, and a power supply VSS. The circuit further includes connection changeover means that performs the changeover of first and second pairs between a differential pair that receives differential input voltages and a current mirror pair that is the load of the differential pair. When one of the two pairs is the differential pair, the other is the current mirror pair.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: November 14, 2006
    Assignee: NEC Corporation
    Inventor: Hiroshi Tsuchi
  • Patent number: 6939736
    Abstract: A method of reducing package stress includes placing matched components of an op-amp substantially in a region of a die having the least stress gradients. The region is located in the center of the die. Further, the center is the common centroid of the die. The matched components are the current mirror input stages of the op-amp. In one embodiment, a semiconductor configuration includes a die having a region with the least stress gradients, and an op-amp containing matched components that are located substantially in the region.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: September 6, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Marty A. Grabham, Brian Lance Clinton
  • Patent number: 6693467
    Abstract: What is involved is a transconductance circuit is discussed, having at least one transconductance subcircuit (100) that is connected between two supply terminals (20, 21) and includes at least one MOS transistor (M1, M1′). It comprises means (200) for biasing the MOS transistor (M1, M1′) in the subcircuit (100) with a biasing current whose variation as a function of temperature substantially compensates for that of the mobility of the majority carriers in the channel of the MOS transistor (M1, M1′) in the subcircuit (100), in such a way as to make the transconductance of the circuit substantially independent of temperature.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: February 17, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Herve Jean Francois Marie
  • Patent number: 6614306
    Abstract: A high-speed cascode amplifier includes a cascode input stage. The cascode input stage sinks a cascode current in proportion to an input signal. The cascode current is sourced through two conduction paths. A first conduction path corresponds to the operating current for a diode multiplier transistor. The second conduction path corresponds to an alternate conduction path other than through the diode multiplier transistor. The size of the diode multiplier transistor is reduced by proper arrangement of the alternate path, such that the frequency response of the amplifier is improved. The VCE of the diode multiplier transistor is maintained at a stable level by adjusting the bias current of the diode multiplier transistor. The diode multiplier provides a temperature-compensated bias current to the class AB amplifier stage for producing the output signal.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: September 2, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Andrew J. Morrish
  • Patent number: 6459245
    Abstract: A voltage supply unit which operates at an internal switching frequency and has a capacitor connected in parallel with its output is connected to the input of a sensor unit operating at an internal switching frequency. The connecting line contains a resistor which, together with a capacitor connected in parallel with the input, forms a filter.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: October 1, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventor: Gerhard Mader
  • Patent number: 6054898
    Abstract: A semiconductor device capable of maintaining good temperature compensation and reducing manufacture costs of SEPP connecting NPN and PNP power transistors and temperature compensating and biasing circuits. A first semiconductor device has an ordinary bias diode formed on the same semiconductor substrate as an NPN power transistor. A second semiconductor device has one or a plurality of Schottky barrier type diodes formed on the same semiconductor substrate as a PNP power transistor. The forward voltage drop V.sub.1 of the diode is set to an arbitrary constant value smaller than E exclusive of about E/2, and the total forward voltage drop V.sub.2 of the Schottky barrier diode or diodes is set to a predetermined value of about (E-V.sub.1), where E is a total forward voltage drop between the bases and emitters of the NPN and PNP power transistors.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: April 25, 2000
    Assignees: Kabushiki Kaisha Kenwood, Sanken Denki Kabushiki Kaisha
    Inventors: Tatsuhiko Okuma, Akira Miyamoto, Hachiro Sato
  • Patent number: 5818301
    Abstract: A power amplifier arrangement for amplifying audio signals to be applied to a number of speakers has a plurality of power amplifiers. A level detector detects a level of a peak value of outputs from the power amplifiers, and produces a control signal when the positive peak value exceeds a predetermined positive level. Two power sources are provided for providing a high voltage power and low voltage power to the speakers. A power transistor turns on in response to the presence of the control signal to provide the high voltage power to the speaker, but turns off in response to the absence of the control signal to provide the low voltage power to the speaker. A temperature detector detects a temperature of the power transistor and produces a disabling signal when the detected temperature is greater than a predetermined temperature to disable the power transistor by switching transistor.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: October 6, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsuhiko Higashiyama, Fumio Hori, Seiji Kumaki
  • Patent number: 5814953
    Abstract: A power amplifier circuit drives a load with a convergence correction current which is proportional to a convergence correction voltage waveform that is applied to the power amplifier circuit. A predriver stage of the power amplifier circuit comprises first and second transistors in a push-pull configuration. First and second voltage divider networks bias emitter electrodes of the first and second transistors, respectively, so that a common-mode current flow between the first and second transistors is limited. The first and second voltage dividers also protect the first and second transistors, respectively, from damage caused by thermal runaway.
    Type: Grant
    Filed: December 18, 1995
    Date of Patent: September 29, 1998
    Assignee: Thomson Consumer Electronics, Inc.
    Inventor: John Barrett George
  • Patent number: 5689211
    Abstract: The invention is an amplifier such as an operational amplifier having an output stage with a reduced quiescent current control transistor device area that provides sufficient quiescent current control for proper operation thereof. The output stage includes a current diverter or diverting arrangement whereby current flowing to the quiescent current control transistor area is reduced by diversion without jeopardizing the proper operation of the operational amplifier. In this manner, the relative size of the quiescent current control transistors can be significantly reduced without sacrificing any of the overall performance of the amplifier.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: November 18, 1997
    Assignee: Lucent Technologies Inc.
    Inventor: Milton Luther Embree
  • Patent number: 5627495
    Abstract: A high speed integrated circuit operational amplifier chip having first, second, third and fourth successive edges includes a thermal centerline parallel to the second and fourth edges. An output driver circuit is located adjacent to an output bonding pad along the third edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced differential heating of the operational amplifier chip relative to the thermal centerline. A low gain differential input circuit is located adjacent to the first edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced responses of matched transistors in the low gain differential input circuit to isotherms produced by the differential heating.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: May 6, 1997
    Assignee: Burr-Brown Corporation
    Inventors: Joel M. Halbert, Kenneth W. Murray
  • Patent number: 5623232
    Abstract: A high speed integrated circuit operational amplifier chip first, second, third and fourth successive edges includes a thermal centerline parallel to the second and fourth edges. An output driver circuit is located adjacent to an output bonding pad along the third edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced differential heating of the operational amplifier chip relative to the thermal centerline. A differential input circuit is located adjacent to the first edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced responses of matched transistors in the low gain differential input circuit to isotherms produced by the differential heating. The most thermally sensitive transistors are disposed along or symmetrically about the thermal centerline to provide approximately balanced response by such transistors to differential heating by the output driver circuit.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: April 22, 1997
    Assignee: Burr-Brown Corporation
    Inventors: Joel M. Halbert, Kenneth W. Murray, Dan Yuan
  • Patent number: 5537080
    Abstract: A high power radio frequency amplifier employs a power stage in which a bank of push-pull stages are connected in parallel. These power stages employ relatively low-cost high voltage MOSFETs. Because the devices are operated in their active regions, these MOSFETs are susceptible to drops in gain during operation due to heating of the transistor die. The gain fluctuation has a first, slower component that varies over a time of several minutes, and a second, faster component that varies over a span of seconds. The amplifier has B+ or drain voltage control to compensate for short-term (minutes) gain degradation and preamplifier gate voltage control to compensate for short-term (seconds) gain degradation.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: July 16, 1996
    Inventors: Yogendra K. Chawla, Bradford J. Lyndaker
  • Patent number: 5444419
    Abstract: First and second power transistors collectors of which are connected with each other, other first and second loss sharing transistors connected to bases of the first and second power transistors at collectors thereof, respectively. A first driver transistor is connected to the emitter of the first loss sharing transistor at the collector thereof, and a second driver transistor is connected to the emitter of the second loss sharing transistor at the collector thereof. The base of each of the loss sharing transistors is applied with a constant voltage at the base thereof.
    Type: Grant
    Filed: March 3, 1994
    Date of Patent: August 22, 1995
    Assignee: Pioneer Electronic Corporation
    Inventor: Jun Honda
  • Patent number: 5337012
    Abstract: An amplifier arrangement which includes a first and a second output transistor each having a base, a collector and an emitter. A bias stage generates a bias voltage between the bases of the first and the second output transistor. The emitters of the first and the second output transistors are coupled to an output terminal. The bias voltage has a negative thermal response, and one element (e.g. a transistor) of the bias stage is thermally coupled to the first and the second output transistor. In order to preclude thermal instability of the amplifier arrangement, the bias stage is adapted to generate a first voltage having a first negative thermal response by means of the one element of the bias stage and to generate a second voltage opposite to the first voltage and having a second negative thermal response. The bias voltage is equal to the sum of the first and the second voltages, the first voltage being larger in absolute value than the second voltage.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: August 9, 1994
    Assignee: U.S. Philips Corporation
    Inventor: Eise C. Dijkmans
  • Patent number: 5159288
    Abstract: A receiver circuit includes a first amplifier for amplifying an input signal and for outputting a first amplified signal, a first bias circuit coupled to the first amplifier for supplying a first bias current to the first amplifier, where the first amplifier and the first bias circuit form a first circuit part, a second amplifier coupled to the first amplifier for amplifying the first amplified signal output from the first amplifier and for outputting a second amplified signal as an output signal of the receiver circuit, and a second bias circuit coupled to the second amplifier for supplying a second bias current to the second amplifier, where the second amplifier and the second bias circuit form a second circuit part, and the first and second bias circuits are independent of each other and have mutually opposite temperature characteristics so that the first and second bias currents respectively change in mutually opposite directions with increasing ambient temperature, to thereby suppress a change in current
    Type: Grant
    Filed: July 11, 1991
    Date of Patent: October 27, 1992
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventor: Hidenobu Ito
  • Patent number: 4935704
    Abstract: An improved direct-coupled transistor amplifier circuit includes a pair of complementary conductivity type output transistors that are quiescently biased to slightly conductive state to provide low distortion amplification and temperature stabilized operating conditions. A pair of complementary conductivity type input transistors receive bias current having a value that is substantially matched to the change with temperature of base-emitter voltage of an input transistor divided by the value of a resistor connecting the emitter of the input transistor to receive the bias current.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: June 19, 1990
    Assignee: Elantec
    Inventor: William H. Gross
  • Patent number: 4800339
    Abstract: An amplifier circuit has a voltage-amplifying stage, an output stage including a push-pull circuit comprising at least one complementary pair of output transistors, and a drive stage for driving the output transistors of the output stage in response to the output of the voltage-amplifying stage. The drive stage includes a subtraction unit and a signal-converting unit. The subtraction unit subtracts the output voltage of the voltage-amplifying stage, which is based on the first pole-potential of a power supply, from the reference voltage output by a reference voltage-generating unit also included in the drive stage. The subtraction unit outputs a voltage corresponding to the difference between the reference voltage and the output voltage of the voltage-amplifying stage, and supplies this voltage to the signal-converting unit. The signal-converting unit shifts the level of the input voltage, thereby producing a voltage signal based on the second pole-potential of the power supply.
    Type: Grant
    Filed: July 29, 1987
    Date of Patent: January 24, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Tanimoto, Hisashi Yamada
  • Patent number: 4757271
    Abstract: Audio amplifier comprising symmetrical, dual polarity power supply and class AB audio amplifier circuit, said supply comprising first positive (86) and negative (85) and second positive (83) and negative (84) unregulated DC inputs; positive and negative regulated outputs and common output (87); first regulator circuit including transistor (62) having its emitter connected to said first negative unregulated DC input; a second regulator circuit including transistor (61) having its emitter connected to said positive unregulated DC input and both collectors connected to said common output, each transistor having a pass resistor, said first circuit deriving a reference from said negative regulated output and said second circuit deriving a reference from said positive regulated output said first and second regulator circuit deriving power from said positive regulated output and common and said negative regulated output and common respectively; said amplifier circuit comprising primary operational amplifier (12) dri
    Type: Grant
    Filed: May 11, 1987
    Date of Patent: July 12, 1988
    Assignee: John Dumergue Charters
    Inventor: David G. Beale
  • Patent number: 4728903
    Abstract: The disclosed amplifier comprises a MOSFET output stage biased for Class A operation and a bipolar current amplification stage biased for Class C operation. The latter stage is normally cut off, and at low power output levels the entire output signal current is provided by the output stage. Current sensing resistors measure the magnitude of the output current and apply to the base-emitter junctions of the current amplification transistors a bias voltage proportional to the output current. When this current reaches a predetermined magnitude the current amplification stage becomes active so as to provide additional output signal current in parallel with that provided by the output stage. As a result at higher power output levels the output stage sees a load impedance much higher than that of the loudspeaker system and therefore has a flatter load-line which maintains its operating point in the active region.
    Type: Grant
    Filed: May 2, 1986
    Date of Patent: March 1, 1988
    Inventor: Martin G. Reiffin
  • Patent number: 4555672
    Abstract: A high frequency audio amplifier in which the positive and negative bias ports of an operational amplifier are employed to drive two oppositely phased current mirror circuits. Additionally, the outputs of the current mirror circuits are current regulated in terms of the number of base emitter voltage drops in power amplifier circuitry following the current mirrors. Further, the output stage employs parallel connected radio frequency type transistors.
    Type: Grant
    Filed: November 17, 1983
    Date of Patent: November 26, 1985
    Inventor: Brahm R. Segal
  • Patent number: 4523154
    Abstract: A DC amplifier uses complementary npn and pnp output transistors on n-type and p-type substrates, respectively. The output transistors are in an emitter-follower configuration with no emitter resistor to prevent thermal runaway. Instead, emitter-follower driver-stage transistors are provided on the same substrates as the output transistors to force a reduction in the bias voltage on the output stage when the temperature of an output transistor increases. This circuit prevents thermal runaway and temperature-dependent offsets without emitter resistors, which would increase output impedance, and without feedback from the output stage to the input stage, which would slow the response of the amplifier. Additionally, compensation-network transistors are provided to eliminate offsets resulting from driver- and output-transistor base-to-emitter voltage differences caused not only by temperature differences between the transistors on different substrates but also by manufacturing variations.
    Type: Grant
    Filed: May 18, 1983
    Date of Patent: June 11, 1985
    Assignee: GenRad, Inc.
    Inventor: James S. Congdon
  • Patent number: 4489283
    Abstract: A power amplifier comprises a power amplifying element for driving a load wherein a forward bias voltage applied between an input terminal and an output terminal of said power amplifying element which varies depending upon an output current of said power amplifying element, is detected and converted into a calibration current to feed back the current to the input terminal of said power amplifying element to calibrate variation of the forward bias voltage of said power amplifying element in linear variation in full cycle of input signal given by a signal source and to prevent cut-off of said power amplifying element in full cycle.
    Type: Grant
    Filed: January 28, 1982
    Date of Patent: December 18, 1984
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yasuhiro Ishizaki
  • Patent number: 4475103
    Abstract: An integrated-circuit thermocouple signal conditioner having on a single chip an amplifier and a transistor circuit responsive to the chip temperature for developing a cold-junction compensation signal referred to 0.degree. Celsius. The amplifier includes two matched differential input amplifiers the outputs of which are summed and used to control a high-gain main amplifier. Thermocouple signals are applied to one of the input amplifiers, serving as a floating input stage, and the main amplifier output is connected through a feedback network to the input of the other differential amplifier. A cold junction compensation signal also is applied to the input of the other differential amplifier. The compensation is a differential voltage proportional to the Celsius temperature of the chip; the compensation voltage comprises two components having positive and negative temperature coefficients.
    Type: Grant
    Filed: February 26, 1982
    Date of Patent: October 2, 1984
    Assignee: Analog Devices Incorporated
    Inventors: Adrian P. Brokaw, Barrie Gilbert
  • Patent number: 4313082
    Abstract: A circuit for providing a current having a positive temperature coefficient including a first circuit for producing a first current having substantially a constant temperature coefficient (or a negative temperature coefficient) of a first predetermined value. The first current source is coupled to a current sink circuit which sinks a known value of current from said first circuit, the current sunk by the current sink circuit having a negative temperature coefficient of a second predetermined value. The negative temperature coefficient current of the current sink circuit being greater than the negative temperature coefficient of the current source so that a difference current is provided having a positive temperature coefficient.
    Type: Grant
    Filed: June 30, 1980
    Date of Patent: January 26, 1982
    Assignee: Motorola, Inc.
    Inventor: Robert A. Neidorff
  • Patent number: 4302727
    Abstract: In a single-ended push-pull power amplifier, a transistor is provided which detects the collector power dissipation of one of complementary power transistors. The power dissipation detecting transistor is thermally coupled with a temperature compensation transistor in a bias circuit coupled to the complementary transistors for flowing a substantially constant idle or bias current through the complementary power transistors.
    Type: Grant
    Filed: November 5, 1979
    Date of Patent: November 24, 1981
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventor: Masayuki Iwamatsu
  • Patent number: 4274059
    Abstract: Two closed loops including a base bias controlling circuit are provided in a single ended push-pull amplifier. The base bias controlling circuit controls base bias voltages of respective transistors constituting the final stage of the push-pull operation so that a predetermined small amount of collector current flows via each of the collector-emitter paths of the transistors irrespective of the presence and absence of the input signal. Because of the predetermined collector currents, none of the transistors is held at cutoff in operation, thereby preventing the occurrence of the crossover distortion.
    Type: Grant
    Filed: November 27, 1978
    Date of Patent: June 16, 1981
    Assignee: Victor Company of Japan, Limited
    Inventor: Yasuhisa Okabe
  • Patent number: 4243946
    Abstract: A highly efficient class-B current source audio amplifier with little heat generation having one amplifier half fixedly biased with the other amplifier half slave biased to the first. Each amplifier half contains a tandem chain of unmatched transistors. The first amplifier half has separate ambient and load temperature controls to substantially minimize distortion due to any change in the operating characteristics of the transistor chains and to substantially minimize the possibility of power transistor failures due to overheating.
    Type: Grant
    Filed: May 19, 1978
    Date of Patent: January 6, 1981
    Inventor: Chien S. Wang
  • Patent number: 4167708
    Abstract: A transistor amplifier comprises an input stage circuit and an output stage circuit direct-coupled to the input stage circuit: the input stage including complimentary paired transistors having bases commonly connected to an input terminal and emitters AC-wise grounded and further connected to constant current sources, respectively; the output stage being a single-ended push-pull amplifier circuit including complimentary paired transistors having bases connected to collectors of the input stage transistors, respectively, and emitters commonly connected to an output terminal. This transistor amplifier has advantages that it is simple in arrangement and that both its DC and AC operations are highly stabilized against variations in the ambient temperature and in the voltages of operating power supplies.
    Type: Grant
    Filed: March 7, 1978
    Date of Patent: September 11, 1979
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventor: Motoomi Goto
  • Patent number: 4140976
    Abstract: A class B push-pull transistor power amplifier is disclosed having two amplification branches each of which is internally compensated in the signal processing/voltage amplifying section thereof for the effects of temperature on the transistors contained therein by allowing the outputs of the respective branches to drift apart slightly with temperature and using a portion of the quiesent current thus produced to alter the bias on the inputs of the respective branches.
    Type: Grant
    Filed: September 22, 1977
    Date of Patent: February 20, 1979
    Inventor: David Wartofsky
  • Patent number: 4072908
    Abstract: A class-AB audio amplifier comprises, as a final stage, two complementary power transistors connected across a direct-current source in series with an output resistor whose junction with the first of these transistors is grounded through a capacitor. The bases of the power transistors are connected across a biasing resistance inserted between two complementary pilot transistors which are connected across the d-c source in series with a constant-current generator, one of these pilot transistors having its base connected to a signal input while the other forms part of a differential circuit also including a feedback transistor of the same conductivity type connected across the source in series with the constant-current generator.
    Type: Grant
    Filed: January 21, 1977
    Date of Patent: February 7, 1978
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Bruno Murari, Pietro Menniti
  • Patent number: 4056783
    Abstract: A Class AB linear power amplifier circuit is connected in a balanced bridge configuration for increasing the fidelity and power output from stereophonic sound systems, such as used primarily in automotive vehicles, the circuitry consisting of a series of NPN transistors and PNP transistors, with bias for the transistors provided by a power source, a series of resistors and thermistors, an optional input overload protection circuit, with the transistors further being matched and balanced so as to effectively double or quadruple output power as would be available from a single ended configuration, so that the amplifier circuitry operates in a Class A mode to eliminate any crossover distortion.
    Type: Grant
    Filed: February 3, 1977
    Date of Patent: November 1, 1977
    Assignee: AudioKinetics Corporation
    Inventor: Stanley Norman Harrison