Having Temperature Compensating Means Patents (Class 330/272)
  • Patent number: 11923017
    Abstract: A non-volatile storage device includes a memory that stores data in a non-volatile manner, a power supply that generates an internal voltage to feed it to the memory, a controller that controls the memory and the power supply, an A/D converter that performs A/D conversion on the internal voltage, and a fault detector that detects a fault related to data written in the memory based on the output of the A/D converter.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventors: Kazuhisa Ukai, Koji Nigoriike
  • Patent number: 8879666
    Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes an adder circuit, an output-stage circuit and a differential circuit. The adder circuit has a first ratio and a second ratio, and receives a reference voltage and a feedback voltage so as to output an adder voltage after an operation, wherein the feedback voltage is a voltage with a negative temperature coefficient, and the reference voltage is sum of a first voltage with a negative temperature coefficient and a second voltage with positive temperature coefficient. The output-stage circuit is used for providing the feedback voltage. The differential circuit has a first multiplier factor, and the differential circuit makes the first multiplier factor be multiplied with the adder voltage so as to provide a voltage to the output-stage circuit. The RF power amplifier stabilizes an output current through adjusting the temperature coefficient of the reference voltage.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 4, 2014
    Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.
    Inventors: Jaw-Ming Ding, Wei-Hsuan Lee, Wen-Tou Chiu
  • Patent number: 8559898
    Abstract: A radio frequency (RF) power amplifier (PA) amplifying transistor of an RF PA stage and an RF PA temperature compensating bias transistor of the RF PA stage are disclosed. The RF PA amplifying transistor includes a first array of amplifying transistor elements and a second array of amplifying transistor elements. The RF PA temperature compensating bias transistor provides temperature compensation of bias of the RF PA amplifying transistor. Further, the RF PA temperature compensating bias transistor is located between the first array and the second array. As such, the RF PA temperature compensating bias transistor is thermally coupled to the first array and the second array. The RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: October 15, 2013
    Assignee: RF Micro Devices, Inc.
    Inventors: David E. Jones, Chris Levesque, William David Southcombe, Scott Yoder, Terry J. Stockert
  • Patent number: 8433265
    Abstract: In one embodiment, a method includes generating a first current in a bias current circuit and biasing an amplifier with the first current when the amplifier is operating in a first temperature range, and generating a second current in the bias current circuit and biasing the amplifier with the second current when the amplifier is operating in a second temperature range. These two currents may correspond to different profiles with respect to temperature, to maintain substantial linearity of the amplifier over the temperature ranges.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: April 30, 2013
    Assignee: Javelin Semiconductor, Inc.
    Inventor: James Francis McElwee
  • Patent number: 8260226
    Abstract: A method in a transmitter including a transmission chain and a Power Amplifier (PA), includes storing calibration data relating a plurality of specified output power levels of the transmitter to respective PA control voltages for application to the PA and respective gain levels for application to the transmission chain that cause the transmitter to output signals at the specified output power levels. A target output power level is specified, and an actual control voltage is applied to the PA. The actual control voltage is derived from a specified target control voltage depending on the target output power. A modified gain level which, when applied to the transmission chain while the PA is controlled with the actual control voltage, causes the transmitter to output the signals at the target output power level, is computed based on the calibration data. The modified gain level is applied to the transmission chain.
    Type: Grant
    Filed: May 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Marvell International Ltd.
    Inventors: David Lipshitz, Alexander Zaslavsky
  • Patent number: 8126093
    Abstract: Certain embodiments of the invention may be found in a method and system for process, voltage, and temperature (PVT) correction. The method may comprise first determining an input voltage of a transistor coupled in an inphase (I) path of a receiver and an input voltage of a transistor coupled in a quadrature (Q) path of said receiver. An amplifier gain setting may be determined from a lookup table based on at least one of a plurality of parameters related to the first determining. A gain of at least one amplifier in the receiver may be adjusted based on the amplifier gain setting determined from the lookup table.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: February 28, 2012
    Assignee: Broadcom Corporation
    Inventor: Hooman Darabi
  • Patent number: 7808322
    Abstract: A system comprises a variable gain amplifier (VGA) that amplifies an input signal with a gain that is based on a gain control signal. A power amplifier receives an output of the VGA. Memory switches between at least two of N output power settings each including a predetermined reference value and a predetermined gain offset value. The memory substantially concurrently changes from the predetermined reference value and the predetermined gain offset value of a prior one of the N output power settings to the predetermined reference value and the predetermined gain offset value of a current one of the N output power settings, where N is an integer greater than one. A gain control adjuster adjusts the gain control signal based on an output of the power amplifier and the predetermined reference value and gain offset value of the current one of the N output power settings.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: October 5, 2010
    Assignee: Marvell International Ltd.
    Inventors: Sang Won Son, King Chun Tsai, Yuan-Ju Chao, Lawrence Tse
  • Patent number: 7778351
    Abstract: A CMOS receiver system having a tunable receiver having a tunable gain and a bandwidth system is provided. The tunable receiver includes means for receiving input signals; and a control circuit controlled by a control signal for tuning at least one of the gain and the bandwidth of the tunable receiver, wherein the control signal is indicative of a data rate of the input signals. Furthermore, a method is provided for tuning a CMOS receiver receiving input signals. The method includes the steps of receiving at least one control signal, and controlling one of gain and bandwidth of the CMOS receiver in accordance with the at least one control signal, wherein the at least one control signal is indicative of a data rate of the received input signals.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Li-Kong Wang, Philip J. Murfet
  • Patent number: 7502601
    Abstract: In a power amplifier, a serial bus interface is provided for sending and receiving information to other devices, such as a baseband controller. The power amplifier includes several control pins that can be used as a serial interface, or alternately, with a direct pin control interface. The serial bus interface can be used with digital power control techniques that provide various advantages over conventional power amplifiers.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: March 10, 2009
    Assignee: Black Sand Technologies, Inc.
    Inventor: Timothy J. Dupuis
  • Patent number: 7369816
    Abstract: A radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a temperature sensing module that produces accurate voltage level readings that may be mapped into corresponding temperature values. A processor, among other actions, adjusts gain level settings based upon detected temperature values. One aspect of the present invention further includes repetitively inverting voltage signals across a pair of semiconductor devices being used as temperature sensors to remove a common mode signal to produce an actual temperature-voltage curve. In one embodiment of the invention, the circuitry further includes a pair of amplifiers to facilitate setting a slope of the voltage-temperature curve.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: May 6, 2008
    Assignee: Broadcom Corporation
    Inventors: Michael Steven Kappes, Arya Reza Behzad
  • Patent number: 7167045
    Abstract: A system for communicating information includes a variable gain amplifier (VGA) responsive to an input signal and a gain control signal for controlling a gain of the VGA. The system also includes a power amplifier responsive to the VGA. An output power level of the power amplifier is compared to a predetermined reference value to generate the gain control signal. The gain control signal is offset by a gain offset value. To change the output power level of the power amplifier from a first output power level to a second output power level, a first predetermined reference value and a first gain offset value associated with the first output power level are changed substantially concurrently to a second predetermined reference value and a second gain offset value, respectively, associated with the second output power level.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: January 23, 2007
    Assignee: Marvell International Ltd.
    Inventors: Sang Won Son, King Chun Tsai, Yuan-Ju Chao, Lawrence Tse
  • Patent number: 7135921
    Abstract: A differential circuit and an amplifier circuit for reducing an amplitude difference deviation, performing a full-range drive, and consuming less power are disclosed. The circuit includes a first pair of p-type transistors and a second pair of n-type transistors. A first current source and a first switch are connected in parallel between the sources of the first pair of transistors, which are tied together, and a power supply VDD. A second current source and a second switch are connected in parallel between the sources of the second pair of transistors, which are tied together, and a power supply VSS. The circuit further includes connection changeover means that performs the changeover of first and second pairs between a differential pair that receives differential input voltages and a current mirror pair that is the load of the differential pair. When one of the two pairs is the differential pair, the other is the current mirror pair.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: November 14, 2006
    Assignee: NEC Corporation
    Inventor: Hiroshi Tsuchi
  • Patent number: 6897729
    Abstract: An amplifier comprises a Low Noise Amplifier (LNA) that amplifies a Radio Frequency (RF) signal that includes a transconductance, a gain and an input stage that receives the RF signal. A bias assembly includes a bias circuit with a bias resistance and generates a bias current for the input stage of the LNA, which is related to the bias resistance. A shunt feedback stage amplifies an output of the input stage, generates an RF output and includes a shunt resistance. Changes in the bias resistance due to changes in conditions are substantially offset by changes in the shunt resistance due to the changes in conditions, which reduces variation of the gain of the LNA based on the changes in conditions.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: May 24, 2005
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Lawrence Tse
  • Patent number: 6784738
    Abstract: An amplifier comprising a Low Noise Amplifier (LNA) to amplify a Radio Frequency (RF) signal. The LNA having a transconductance and including an input stage to receive the RF signal. The LNA again varying as a function of changes in conditions. A bias assembly to generate a bias current to bias the LNA input stage. The bias assembly configured to reduce variation of the LNA gain to changes in conditions.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: August 31, 2004
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Lawrence Tse
  • Patent number: 6131073
    Abstract: A power voltage of a power source circuit is produced by amplifying a threshold voltage difference of an operational amplifier by an amplification factor corresponding to a dividing ratio of a resistance dividing circuit. The power source circuit is integrated on a CMOS substrate together with a computer block. A plurality of analog switches are associated with the resistance dividing circuit to stabilize the power voltage of the power source circuit. One of these switches is selectively closed to change the dividing ratio of the resistance dividing circuit in accordance with actuation data stored in a control register.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: October 10, 2000
    Assignee: DENSO Corporation
    Inventors: Yoshimitsu Honda, Hideaki Ishihara, Haruyasu Sakishita, Kouichi Maeda
  • Patent number: 5783970
    Abstract: An input driver stage for an audio power amplifier wherein the amplifier incorporates only N-channel VFETs in the output stage, the invention locks the currents in second stage (via a closed loop) which is directly connected to the VFET output stage thus allowing precise open loop predictive temperature compensated programming of the quiescent operating point of the VFET output stage into an acceptable linear area of operation--without fettering the amplifiers inherent straight forwardness of implementation or the amplifiers excellent signal amplification characteristics.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: July 21, 1998
    Assignee: Mitek Corporation
    Inventor: Joseph J. Pleitz
  • Patent number: 5770974
    Abstract: The present invention solves the gain, noise figure, and distortion problems of prior art thermal compensation circuits by incorporating a temperature-compensating circuit in the feedback loop of a transistor amplifier arrangement. Using this method, the insertion loss is reduced as the gain of the amplifier varies proportionately to the temperature. This method has a negligible effect on the noise figure and distortion, and the incremental cost is much lower than the conventional circuits. Furthermore, the present invention can be used in both single-ended or push-pull dual amplifier configurations.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: June 23, 1998
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Stephan W. Vogt, John W. Brickell, Alfredo Acosta
  • Patent number: 5631608
    Abstract: An input driver stage for an audio power amplifier wherein the amplifier incorporates only N-channel VFETs in the output stage, the invention locks the currents in second stage (via a closed loop) which is directly connected to the VFET output stage thus allowing precise open loop predictive temperature compensated programming of the quiescent operating point of the VFET output stage into an acceptable linear area of operation--without fettering the amplifiers inherent straight forwardness OF implementation or the amplifiers excellent signal amplification characteristics.
    Type: Grant
    Filed: July 24, 1995
    Date of Patent: May 20, 1997
    Assignee: Mitek Corporation
    Inventor: John J. Pleitz
  • Patent number: 5477188
    Abstract: A linear RF power amplifier employs push-pull pairs of high voltage mosfets. A minimum of transformers is employed, with an impedance matching transformer feeding an input balun supplying the input signal in push-pull to the gates of the mosfets. The drains are coupled to balanced legs of an output balun, followed by an output impedance matching transformer. Thermal sensors are employed for control of gate bias and also for control of drain voltage. The temperature sensors are mounted in the air inlet path and on the spreader plate of the heat sink. An aluminum or fiberglass strap is used to press the transistors against the spreader plate thereby ensuring good thermal contact with the transistor dies.
    Type: Grant
    Filed: July 14, 1994
    Date of Patent: December 19, 1995
    Assignee: ENI
    Inventors: Yogendra K. Chawla, Leonid Reyzelman
  • Patent number: 4933578
    Abstract: A voltage follower circuit is comprised of a plurality of transistors. A first transistor has a base connected to an input terminal and a collector connected to a positive power source terminal. A second transistor of opposite polarity relative to the first transistor has an emitter connected to the emitter of first transistor, and a collector and a base coupled to each other. A third transistor of opposite polarity relative to the first transistor has a base connected to the base of second transistor. A fourth transistor has an emitter connected to the emitter of third transistor, and a collector and a base coupled to each other. A current source is connected at its one end to the first power source terminal and connected at its other end to the collector of fourth transistor. A current mirror circuit is connected at its output port to the collector of second transistor and connected at its input port to the collector of third transistor.
    Type: Grant
    Filed: April 24, 1989
    Date of Patent: June 12, 1990
    Assignee: NEC Corporation
    Inventor: Kouichi Nishimura
  • Patent number: 4782436
    Abstract: An apparatus for allowing the use of unmatched transistors in a power supply is shown. A potentiometer (482) and a switch (481) divert base drive current away from the transistor having the higher Beta so that the collector currents of the two transistors (477, 484) can be matched. Heat sensitive resistors (480, 483) are thermally connected to the opposing transistor (484, 477) so if the temperature and collector current of one transistor should increase the base drive to the other transistor is automatically increased, thereby causing the collector currents to remain matched. The total collector current provided by the transistors (477, 484) is limited to a safe value by a regulating pulsewidth modulator (457). The use of additional protective diodes (468, 469, 478, 479) prevent transient voltages from affecting the transistors (477, 484) and allow the use of lower power, less expensive transistors.
    Type: Grant
    Filed: November 4, 1987
    Date of Patent: November 1, 1988
    Inventor: Malcolm T. Gilliland
  • Patent number: 4611178
    Abstract: A low voltage sixteen bit digital-to-analog converter operable between +5 and -5 volt power supplies and capable of providing output voltage levels to within about 1.4 volts of +V.sub.CC and -V.sub.CC includes a push-pull output stage with only a pullup transistor and a pulldown transistor connected in series between the positive and negative supply voltages. The output stage includes circuitry that reduces the base voltage of the pullup transistor or pulldown transistor enough to reduce its collector current to near zero, greatly increasing its effective collector-to-emitter breakdown voltage.
    Type: Grant
    Filed: May 8, 1985
    Date of Patent: September 9, 1986
    Assignee: Burr-Brown Corporation
    Inventors: Jimmy R. Naylor, David F. Mietus
  • Patent number: 4553106
    Abstract: An operational amplifier includes an input stage, an output stage including first, second and third NPN output transistors, and an intermediate stage. The output stage is driven by a thermal current having a positive temperature coefficient so as to keep the gain of the output stage substantially constant over temperature. Thus, the amplifiers Miller loop stability will also remain substantially constant over temperature.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: November 12, 1985
    Assignee: Motorola, Inc.
    Inventor: Robert L. Vyne
  • Patent number: 4476441
    Abstract: A push-pull power amplifier with quiescent current regulator, in particular for low-frequency power amplifiers of high quality in which the quiescent current or currents of the output transistors is or are sampled at a predetermined output voltage and/or in a predetermined output voltage range of the amplifier, their values coded in one or more comparators and in one or more storage elements the corresponding values with which the desired values of the quiescent current or currents can be corrected or held are stored.
    Type: Grant
    Filed: December 14, 1981
    Date of Patent: October 9, 1984
    Inventor: Zdzislaw Gulczynski
  • Patent number: 4475103
    Abstract: An integrated-circuit thermocouple signal conditioner having on a single chip an amplifier and a transistor circuit responsive to the chip temperature for developing a cold-junction compensation signal referred to 0.degree. Celsius. The amplifier includes two matched differential input amplifiers the outputs of which are summed and used to control a high-gain main amplifier. Thermocouple signals are applied to one of the input amplifiers, serving as a floating input stage, and the main amplifier output is connected through a feedback network to the input of the other differential amplifier. A cold junction compensation signal also is applied to the input of the other differential amplifier. The compensation is a differential voltage proportional to the Celsius temperature of the chip; the compensation voltage comprises two components having positive and negative temperature coefficients.
    Type: Grant
    Filed: February 26, 1982
    Date of Patent: October 2, 1984
    Assignee: Analog Devices Incorporated
    Inventors: Adrian P. Brokaw, Barrie Gilbert
  • Patent number: 4405902
    Abstract: The invention provides an improved class-B push-pull output stage comprising a first and a second output transistor of a first conductivity type, which stage is provided with a control loop for driving the second transistor in phase opposition as a function of the drive of the first transistor. Said control loop is adapted so that a stable quiescent-current setting is obtained and that the effect of poor high-frequency properties of a third transistor of a conductivity type opposite to the first conductivity type, which transistor is necessarily included in the control loop, is eliminated, so that a wide frequency range is obtained.
    Type: Grant
    Filed: April 22, 1981
    Date of Patent: September 20, 1983
    Assignee: U.S. Philips Corporation
    Inventors: Rudy J. van de Plassche, Eise C. Dijkmans
  • Patent number: 4302727
    Abstract: In a single-ended push-pull power amplifier, a transistor is provided which detects the collector power dissipation of one of complementary power transistors. The power dissipation detecting transistor is thermally coupled with a temperature compensation transistor in a bias circuit coupled to the complementary transistors for flowing a substantially constant idle or bias current through the complementary power transistors.
    Type: Grant
    Filed: November 5, 1979
    Date of Patent: November 24, 1981
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventor: Masayuki Iwamatsu
  • Patent number: 4300103
    Abstract: A push-pull amplifier, having a first and a second transistor of the same conductivity type, whose collector-emitter paths are included in series between two power-supply terminals, the emitter electrode of the first transistor being connected to the collector electrode of the second transistor and to an output terminal, and the base electrode of the first transistor being connected to an input terminal, is improved in respect of its linearity, temperature dependence and bandwidth by measuring the base-emitter voltage of the first transistor with the aid of a series connection of a semiconductor junction and a resistor and by applying said voltage with opposite a.c. component to the base-emitter junction of the second transistor via a coupling circuit.
    Type: Grant
    Filed: October 12, 1979
    Date of Patent: November 10, 1981
    Assignee: U.S. Philips Corporation
    Inventor: Rudy J. van de Plassche
  • Patent number: 4287478
    Abstract: A symmetrical amplifier comprising two transistors having their emitters connected to ground via two resistors of equal value. An input signal is applied between the bases of the transistors and an output signal is available at the collectors of the transistors. This amplifier will provide improved linearity up to an input voltage of 200 mV if, for the emitter resistor, the relationship R.apprxeq.0.56 U.sub.T /I.sub.CO is satisfied, U.sub.T being the thermal voltage and I.sub.CO the collector quiescent current. The value of this resistor is very small so that the slope is reduced only slightly by the emitter resistors and the sensitivity of the circuit is hardly affected thereby.
    Type: Grant
    Filed: April 9, 1979
    Date of Patent: September 1, 1981
    Assignee: U.S. Philips Corp.
    Inventor: Hermann Berger
  • Patent number: 4276516
    Abstract: In an integrated circuit class B audio output device the transistors are fabricated as plural parallel connected sections. The two output transistors have their sections interdigitated so that adjacent sections are not turned on simultaneously. This leads to substantial improvements in thermal peaks within the transistors and to reduced thermal gradients across the transistors.
    Type: Grant
    Filed: July 26, 1979
    Date of Patent: June 30, 1981
    Assignee: National Semiconductor Corporation
    Inventor: James S. Congdon
  • Patent number: 4267516
    Abstract: An improved common-emitter cascode f.sub.T doubler amplifier is provided with a feed-forward amplifier circuit to compensate for non-linearities and thermal distortion. The feed forward amplifier senses distortion at the emitters of the f.sub.T doubler amplifier transistors and injects a correction current into a pair of output nodes. The amplifier is also provided with a common-base transistor output stage.
    Type: Grant
    Filed: August 3, 1979
    Date of Patent: May 12, 1981
    Assignee: Tektronix, Inc.
    Inventor: Einar O. Traa
  • Patent number: 4229706
    Abstract: Disclosed is a Class A power amplifier circuit which includes means for controlling the quiescent bias current of the output devices of the amplifier and providing absolute overload and short circuit protection without the need of extra protective devices of any kind. The circuit includes a driver stage which amplifies an input signal and provides two outputs which are out of phase with respect to each other by 180.degree.. One output of the driver stage provides a drive signal to the control input of a first output device, while the other output of the driver stage provides a drive signal to the control input of a second output device. Power is provided to the driver stage by a standard grounded center-tapped power supply.
    Type: Grant
    Filed: January 5, 1979
    Date of Patent: October 21, 1980
    Inventor: James W. Bongiorno
  • Patent number: 4189738
    Abstract: There is provided a semiconductor integrated circuit device having a Class B push-pull circuit including a first transistor of which the base is connected with a signal source and the collector to a positive power source, and a second transistor of which the collector is connected with the emitter of the first transistor, the base to the signal source, and the emitter to ground. The first transistor has a large area of safe operation compared with the second transistor.
    Type: Grant
    Filed: September 28, 1978
    Date of Patent: February 19, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Hajime Sawazaki
  • Patent number: 4180781
    Abstract: An output transistor in common-emitter amplifier configuration is thermally coupled to means for generating a temperature-compensated component of bias potential. This bias potential is indirectly applied to the base electrode of the output transistor to provide for temperature-stabilized idling current flow in its collector-to-emitter path. More particularly, the bias potential is applied to the non-inverting terminal of a high-gain differential-input amplifier having its output terminal direct coupled to the base of the transistor and direct coupled to its inverting input terminal for regulating the quiescent potential at its output terminal to equal the bias potential. The differential-input amplifier has an input signal applied to one of its input terminals. In response to signal excursions in one sense, the differential-input amplifier drives the output transistor into increased conduction.
    Type: Grant
    Filed: June 5, 1978
    Date of Patent: December 25, 1979
    Assignee: RCA Corporation
    Inventor: Leonard A. Kaplan
  • Patent number: 4078207
    Abstract: A modified connection of elements in a push-pull transistor amplifier with driver circuitry providing over-current protection, which amplifier has previously been described by the present inventor in U.S. Pat. No. 3,855,540, increases the current gain through the push-pull transistor amplifier by a factor equal to the common-emitter forward current gain (h.sub.fe) of a transistor.
    Type: Grant
    Filed: January 7, 1977
    Date of Patent: March 7, 1978
    Assignee: RCA Corporation
    Inventor: Arthur John Leidich