And Significant Control Voltage Developing Means Patents (Class 330/279)
  • Patent number: 11837997
    Abstract: Disclosed examples include differential amplifier circuits and variable neutralization circuits for providing an adjustable neutralization impedance between an amplifier input node and an amplifier output node, including neutralization impedance T circuits with first and second impedance elements in series between the amplifier input and output, and a third impedance element, including a first terminal connected to a node between the first and second impedance elements, and a second terminal connected to a transistor. The transistor operates according to a control signal to control the neutralization impedance between the amplifier input node and the amplifier output node.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: December 5, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Krishnanshu Dandu, Brian P. Ginsburg
  • Patent number: 11728838
    Abstract: Carrier aggregation (CA) may cause interference between operation on two or more carriers within a user equipment (UE). This interference can degrade signal quality on one or more of the carriers involved in the carrier aggregation, which may be referred to as “desensing” one or more carriers. One or more isolating buffers may be coupled at a down-conversion mixer at a point where the down-conversion mixer receives a signal from a transmission line for isolating the transmission line from other transmission lines. The isolating buffer may reduce the effect of interference between multiple transmission lines carrying different carriers during carrier aggregation (CA) operation. The isolating buffers may be used in an RF transceiver supporting both 5G sub-7 GHz and 5G mmWave wireless networks and carrier aggregation across sub-7 GHz and mmWave bands.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: August 15, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Jang Joon Lee, Kyle David Holland, Prakash Thoppay Egambaram, Aleksandar Miodrag Tasic
  • Patent number: 11621685
    Abstract: A digitally controlled variable gain amplifier (VGA) for generating amplification output levels is disclosed. In one aspect, the digitally controlled VGA includes a positive amplification stage including at least two positive amplifiers, and a corresponding negative amplification stage coupled to the positive amplification stage. The negative amplification stage includes at least two negative amplifiers. The positive amplification stage and the corresponding negative amplification stage are digitally controlled by one or more digital codes. The corresponding negative amplification stage is coupled in parallel with the positive amplification stage and is equally weighted as the positive amplification stage, and both the positive amplification stage and the corresponding negative amplification stage selectively contribute to the generation of the amplification output levels for the digitally controlled VGA.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: April 4, 2023
    Assignee: IMEC vzw
    Inventors: Khaled Khalaf, Steven Brebels
  • Patent number: 11418160
    Abstract: A sub-40 kilohertz low-frequency cutoff is provided for via a transimpedance amplifier comprising differential inputs and differential outputs; coupling capacitors comprising input terminals configured to receive electrical signals, and output terminals coupled to the differential inputs; and feedback paths coupled to the differential outputs and operable to level shift voltage levels at the input terminals. In some embodiments, the feedback paths comprise source follower transistors wherein the differential outputs are coupled to gate terminals of the source follower transistors or the feedback paths further comprise feedback resistors. In some embodiments, a bias resistor is coupled between the differential inputs.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: August 16, 2022
    Assignee: Cisco Technology, Inc.
    Inventor: Brian Welch
  • Patent number: 11336235
    Abstract: An amplifier is configured in such a way that a first capacitor resonates at the frequency of a second harmonic wave included in a signal outputted from an amplifying element, a circuit including a second transmission line, the first capacitor, and a second capacitor resonates at the frequency of a third harmonic wave included in the signal outputted from the amplifying element, and also matches the impedance for a fundamental wave together with an impedance matching circuit.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: May 17, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Eigo Kuwata, Jun Nishihara
  • Patent number: 11258453
    Abstract: A pipelined ADC that does not wait for the residue of a signal to settle to be delivered to the next stage of the pipeline, and thus passes signals to subsequent stages at faster than conventional speeds. A pipelined ADC is used that processes signals representing the boundaries of the search space. Thus, each stage does not necessarily receive the signal as pre-processed by the prior stage, but rather the search space boundaries as pre-processed by the prior stage. Reducing the “search space” of the ADC is equivalent to creating the residues in each step of a pipeline as in the prior art. An ADC operating in this fashion operates without error even if the residual search space boundary outputs from one state are presented to the next stage before the outputs have settled, and can run faster for a given power and bandwidth.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: February 22, 2022
    Assignee: SiliconIntervention Inc.
    Inventor: A. Martin Mallinson
  • Patent number: 11251758
    Abstract: A power amplifier circuit includes an amplifier unit disposed on a die of a semiconductor device. The amplifier unit includes an amplifier transistor. The power amplifier circuit further includes a detector transistor disposed on the die of the semiconductor device, a variable attenuator that compensates for a gain of the amplifier unit, a bias level setting holding unit that holds a bias level setting value, which is set based on at least a detection value of the detector transistor, and a bias generation unit that generates a bias value of the variable attenuator based on the bias level setting value.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: February 15, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yoshifumi Takahashi
  • Patent number: 11226230
    Abstract: A method and a detection circuit. The detection circuit may include (a) a photodiode that is configured to convert radiation to a photodiode current; (b) a photodiode bias circuit that is configured to bias the photodiode; (c) a dynamic resistance circuit that has a first terminal and a second terminal; (d) a transimpedance amplifier that is configured to amplify an output current of the dynamic resistance circuit to provide an output voltage, wherein the second terminal is coupled to a negative input port of the amplification circuit; and (e) a conductor that is coupled between the first terminal and an anode of the photodiode.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: January 18, 2022
    Assignee: Applied Materials Israel Ltd.
    Inventor: Pavel Margulis
  • Patent number: 11201634
    Abstract: A radio-frequency switching apparatus that can be used to turn a signal path on or off or to attenuate a radio-frequency signal. The switching apparatus comprises at least one radio-frequency input, at least one radio-frequency output, at least one transmission line providing a signal path between the at least one radio-frequency input and the at least one radio-frequency output, and at least one transition metal oxide portion. The radio-frequency switching apparatus also comprises direct current blocking means electrically coupled between the at least one transition metal portion and the at least one radio-frequency input. The radio-frequency switching apparatus also comprises biasing means for providing a bias across the at least one transition metal oxide portion such that power transferred between the radio-frequency input and the radio-frequency output is controlled by controlling the bias level across the at least one transition metal oxide portion.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: December 14, 2021
    Assignee: Nokia Technologies Oy
    Inventors: Senad Bulja, Dirk Wiegner, Wolfgang Templ, Rose Kopf
  • Patent number: 11128271
    Abstract: A power supply circuit supplies a variable voltage to a power amplifier that amplifies a radio-frequency signal, and includes a transistor and a current detecting resistor. The transistor includes a collector or drain that is supplied with a fixed voltage from a fixed voltage source, a base or gate that receives an envelope signal tracking an envelope of the radio-frequency signal, and an emitter or source that outputs the variable voltage that is based on the envelope signal. The current detecting resistor is electrically connected between the fixed voltage source and the collector or drain of the transistor.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: September 21, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuuma Noguchi, Hidetoshi Matsumoto, Kiichiro Takenaka, Satoshi Tanaka
  • Patent number: 11012046
    Abstract: In a gain control device, a gain control voltage adjust circuit includes a time-constant circuit and outputs an adjusted gain control voltage depending on an adjustment signal and a control voltage generated by a differential amplifier upon input of the adjustment signal. An adjustment signal generation circuit outputs the adjustment signal during an adjustment signal output period. This period is a specified period before a first burst signal is output from a signal output unit and where a burst signal is not output from the signal output unit. The adjustment signal is to make the adjusted gain control voltage closer to a target voltage. The target voltage is a gain control voltage output from the gain control voltage adjust circuit and corresponding to a steady part of a second burst signal. The second burst signal is a burst signal output before the first burst signal.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: May 18, 2021
    Assignee: JVCKENWOOD Corporation
    Inventor: Nobuyoshi Kurushima
  • Patent number: 10944486
    Abstract: In high data rate receivers, comprising a photodetector (PD) and a transimpedance amplifier (TIA), a transmitted optical signal typically has poor extinction ratio, which translates into a small modulated current with a large DC current at the output of the PD. The large DC current saturates the TIA, which significantly degrades the gain and bandwidth performance. Accordingly, cancelling photo diode DC current in high data rate receivers is important for proper receiver operation. A DC current cancellation loop, comprising a low pass filter section and a trans-conductance cell (GM) are connected to the input of the TIA. PD DC current IDC is drawn from the input node of the TIA in the GM cell, such that the cancellation loop maintains the DC voltage value of the TIA input node to be the same as a reference voltage (VREF).
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: March 9, 2021
    Assignee: Elenion Technologies, LLC
    Inventors: Mostafa Ahmed, Alexander Rylyakov
  • Patent number: 10924062
    Abstract: A power amplifying apparatus includes a first bias circuit configured to generate a first bias current by adding a boost current to a base bias current generated from a reference current, a first amplification circuit configured to receive the first bias current and amplify a signal input through an input terminal of the first amplification unit to output a first amplified signal, and a bias boosting circuit configured to generate the boost current, based on a magnitude of a harmonic component in the amplified signal output from the first amplification circuit.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: February 16, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kyu Jin Choi, Jae Hyouck Choi, Je Hee Cho
  • Patent number: 10923943
    Abstract: A battery powered device includes a battery pack, at least one switch, a power management chip, and a pre-powered circuit. The pre-powered circuit comprises a buck and current-limiting module. The buck and current-limiting module comprises at least one zener diode and at least one current-limiting resistor. When the switch is turned off, the battery pack will be powered to a system device by the pre-powered circuit. Thus, the battery pack can be powered to the system device by the pre-powered circuit even if the battery powered device is operated in a standby mode. Besides, the power management chip can be operated in the standby state when the battery powered device is powered by the pre-powered circuit, so as to reduce the consumption of the battery energy and therefore extend the powered time of the battery powered device.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: February 16, 2021
    Assignee: STL TECHNOLOGY CO., LTD.
    Inventors: Chia-Chang Chen, Tao-Cheng Wu
  • Patent number: 10879847
    Abstract: A transmission unit includes a first transistor that amplifies power of a first signal and outputs a second signal, a power supply circuit that supplies to the first transistor a power supply voltage that changes in accordance with an amplitude level of the first signal, and an attenuator that attenuates the first signal in such a manner that an amount of attenuation of the first signal increases with a decrease in the power supply voltage when the power supply voltage is less than a first level.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 29, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Satoshi Tanaka, Yasuhisa Yamamoto, Takayuki Tsutsui, Isao Obu
  • Patent number: 10790786
    Abstract: Systems, methods, and circuitries are provided for generating a power amplifier supply voltage based on a target envelope signal for a radio frequency (RF) transmit signal. An envelope tracking system includes a first selector circuitry and predistortion circuitry. The first selector circuitry is disposed in a selector module and is configured to input a plurality of voltages conducted on a first plurality of power lanes, wherein the first plurality of power lanes is part of a power distribution network; select a voltage from the plurality of voltages based on the target envelope signal; and provide the selected voltage to a supply lane connected to an input of the power amplifier that amplifies the RF transmit signal. The predistortion circuitry is configured to modify the RF transmit signal based on a selected power lane of the first plurality of power lanes that conducts the selected voltage.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: September 29, 2020
    Assignee: Intel Corporation
    Inventors: Stephan Henzler, Andreas Langer, Bernhard Raaf
  • Patent number: 10727793
    Abstract: Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: July 28, 2020
    Assignee: Infineon Technologies AG
    Inventors: David Seebacher, Pantelis Sarais, Peter Singerl, Herwig Wappis
  • Patent number: 10644378
    Abstract: An electronic device for detecting an antenna element includes a sensing circuit, a comparison circuit, an interface circuit, an internal LNA (Low Noise Amplifier), a bypass path, and a selection circuit. The sensing circuit generates a sensing voltage according to an input current. The input current is relative to the antenna element. The comparison circuit compares the sensing voltage with a first reference voltage, so as to generate a first control voltage. The sensing circuit is coupled through the interface circuit to an RF (Radio Frequency) node. The interface circuit is configured to reduce the interference between the antenna element and the electronic device. The selection circuit selectively couples the internal LNA or the bypass path to the RF node according to the first control voltage.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: May 5, 2020
    Assignees: WISTRON NEWEB CORP., WEBCOM COMMUNICATION (KUNSHAN) CORPORATION
    Inventor: Tzu-Li Lu
  • Patent number: 10630183
    Abstract: A switching converter having a high-side switching transistor and a low-side switching transistor and an inductor, having a circuit for generating a simulated waveform representing a sawtooth inductor current waveform. A circuit for monitoring and voltage at a switch node between the high-side and low-side transistors to determine a time during which the inductor current is increasing and a time during which the inductor current is decreasing wherein voltage across the low-side transistor when it is conducting represents a first portion of the simulated sawtooth inductor current waveform. A circuit for utilizing the time when the inductor current is increasing, the time when the inductor current is decreasing and the voltage across the low-side transistor when it is conducting to generate a portion of the simulated inductor current waveform when the high-side transistor is conducting. A method and a power supply utilizing this circuit are also disclosed.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 21, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Scott E. Ragona, Rengang Chen, David Jauregui
  • Patent number: 10622955
    Abstract: The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: April 14, 2020
    Assignee: INPHI CORPORATION
    Inventors: Simon Forey, Rajasekhar Nagulapalli, Parmanand Mishra
  • Patent number: 10574282
    Abstract: A method and apparatus to reduce communication device peak current for alert tones are disclosed. A portable device may include a processor coupled to a transceiver and an alert tone controller coupled to the processor. The transceiver may be configured to process an audio signal representing an alert tone. The processor may be configured to determine whether an audio volume level setting exceeds a predetermined threshold. The alert tone controller may be activated based on the determination. The alert tone controller may be configured, based on the activation, to reduce an audio signal by adjustment to a peak-to-peak amplitude of the audio signal and generate an adjusted audio signal by a restriction on the maximum amplitude of the reduced audio signal.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: February 25, 2020
    Assignee: Motorola Solutions, Inc.
    Inventors: Wai Mun Lee, Mohamad Noorazuan Fakhir Md Dali, Peter J. Bartels, Syed Isa Syed Idrus, Yee Boon Fu
  • Patent number: 10505498
    Abstract: An envelope tracking (ET) bias circuit includes a detection circuit configured to select an ET operation voltage input through a first input terminal of the detection circuit, or an envelope signal detected from a radio frequency (RF) signal input through a second input terminal of the detection circuit, in response to a first control signal, to and output he selected one of the ET operation voltage and the envelope signal as a detection signal; an amplification circuit configured to amplify the detection signal, and output the amplified detection signal; and a bias output circuit configured to generate an ET bias current based on the amplified signal, and output the generated ET bias current.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: December 10, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Ok Ha, Jeong Hoon Kim, Byeong Hak Jo
  • Patent number: 10483920
    Abstract: Embodiments relate to a chopped amplifier system where a ripple reduction filter placed outside of a main signal path is disclosed. The chopped amplifier system includes a chopped amplifier having an input terminal and an output terminal, where the input terminal receives an input signal and the output terminal provides an output signal including a ripple that is based on an offset voltage of the chopped amplifier. The ripple reduction filter is placed in a feedback loop path that receives a portion of the chopped amplifier's output signal and provides a feedback signal to the chopped amplifier that reduces the ripple at the output of the chopped amplifier. The ripple reduction filter includes a digital controller and other circuits that can handle large disturbances such as large signal slew rate events and large common-mode steps without reducing the effectiveness of the ripple reduction filter in reducing the ripple.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: November 19, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tony Ray Larson, Dimitar Trifonov Trifonov, Biraja Prasad Dash
  • Patent number: 10476446
    Abstract: The disclosed embodiments include an audio amplifier system configured to provide a total harmonic distortion (THD) controlled clip detector and an automatic gain limiter (AGL) solution for a closed-loop amplifier. The audio amplifier system is capable of maintaining high power output without hard distortion (i.e., hard clipping) for providing better acoustics, while preventing damage to the system.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: November 12, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shun Qian, Kim Nordtorp Madsen, Lucia Wan
  • Patent number: 10448323
    Abstract: A node unit of a distributed antenna system includes a power supply unit for supplying power for operating the node unit, a digital part operated by the power supplied from the power supply unit, the digital part performing digital processing on input relay signals and outputting the digital-processed relay signals, and a controller for disabling an output of the digital part in response to a first control command for instructing a reset of the power supply unit or a second control command for instructing a reset of the digital part.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: October 15, 2019
    Assignee: SOLiD, INC.
    Inventors: Hyoungho Kim, Kwon Kim, Jonggu Lee, Heegon Kim
  • Patent number: 10439558
    Abstract: Apparatus and methods for power amplifiers with positive envelope feedback are provided herein. In certain implementations, a power amplifier system includes a power amplification stage that amplifies a radio frequency signal, at least one envelope detector that generates one or more detection signals indicating an output signal envelope of the power amplification stage, and a wideband feedback circuit that provides positive envelope feedback to a bias of the power amplification stage based on the one or more detection signals. The power amplifier system further includes a supply modulator that controls a voltage level of a supply voltage of the power amplification stage based on the one or more detection signals such that the supply voltage is modulated with the output signal envelope through positive envelope feedback.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: October 8, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Smarjeet Sharma, Nicolas Gerard Constantin
  • Patent number: 10348257
    Abstract: A system for a differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes; at least one resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two identical photodiode biasing resistances each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. A feedback loop for the amplifier may include source followers that are operable to level shift voltages prior to coupling capacitors that couple said photodiode to said amplifier to ensure stable bias conditions for said amplifier. The source followers may include CMOS transistors. The amplifier may be integrated in a complementary metal-oxide semiconductor (CMOS) chip, which may include a CMOS photonics chip.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: July 9, 2019
    Assignee: Luxtera, Inc.
    Inventor: Brian Welch
  • Patent number: 10312867
    Abstract: The present disclosure relates to methods, modules and devices for detecting and preventing occurrence of a saturation state in a power amplifier. A method is disclosed for detecting a saturation condition of a power amplifier, including monitoring a first base current of a first transistor of a cascade transistor pair of the power amplifier and a second base current of a second transistor of the cascade transistor pair. The method can also include generating a current ratio based on comparing the first base current and the second base current. The method can further include determining if the current ratio exceeds or satisfies a threshold value and modifying one or more operating characteristics of the power amplifier in accordance with a determination that the current ratio exceeds or satisfies the threshold value.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: June 4, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: David Steven Ripley, Philip John Lehtola
  • Patent number: 10230555
    Abstract: To maintain linear operation of a signal processing circuit, such as a low noise amplifier, a peak detector detects a peak of a signal associated with the signal processing circuit and compares the detected peak signal with a threshold. When the detected peak signal is greater than the threshold, a variable current source biases the signal processing circuit to place the signal processing circuit in a different mode of operation. The signal processing circuit may thereby process a larger input signal while operating in an acceptable linear region.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: March 12, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventor: George Khoury
  • Patent number: 10230414
    Abstract: A method and apparatus to reduce communication device peak current for alert tones are disclosed. A portable device may include a processor coupled to a transceiver, a current limit trigger circuit, and an alert tone current limit controller. The transceiver may be configured to process an audio signal representing an alert tone. The processor may be configured to determine whether the transceiver is in a transmit state and whether an audio volume level setting exceeds a threshold. In response, the current limit trigger circuit may be configured to activate the alert tone current limit controller that may include a voltage scale controller configured to generate a reduced audio signal by adjusting a peak-to-peak amplitude of the audio signal representing the alert tone and an alert tone amplitude modulator configured to generate an adjusted audio signal by restricting the maximum amplitude of the reduced audio signal.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: March 12, 2019
    Assignee: Motorola Solutions, Inc.
    Inventors: Wai Mun Lee, Mohamad Noorazuan Fakhir Md Dali, Peter J. Bartels, Syed Isa Syed Idrus, Yee Boon Fu
  • Patent number: 10227059
    Abstract: In the case of the process for secure access to a determined space, it is provided that after activation of the wearable object, a first coded signal is transmitted from the access or unlocking device, this first coded signal is received in the object and a coded response signal is transmitted with synchronization to the device after a defined time of transmission. A processing of the coded response signal converted in the processing unit of the device is conducted in order to check the defined time delay and the response code of the wearable object and to determine the flight times of the signals between the device and the wearable object. The distance separating the wearable object and the access or unlocking device is thus calculated to authorize access to the determined space if the calculated distance is below a determined threshold after recognition of the wearable object.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: March 12, 2019
    Assignee: The Swatch Group Research and Development Ltd
    Inventors: Arnaud Casagrande, Carlos Velasquez, Philippe Duc
  • Patent number: 10128796
    Abstract: A PA module (10) includes multiple amplifying elements (11a, 11b) and a variable filter circuit (12). The amplifying elements (11a, 11b) amplify a transmission signal in a frequency range including multiple communication bands and are cascade-connected to each other. The variable filter circuit (12) is connected between the amplifying elements (11a, 11b). The variable filter circuit (12) uses a transmission band corresponding to a used communication band selected from the multiple communication bands as a pass band and a reception band corresponding to the used communication band as an attenuation band.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: November 13, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinya Hitomi, Hidenori Obiya, Tsuyoshi Sato, Shingo Yanagihara
  • Patent number: 10103696
    Abstract: A multi-band RF power amplifier circuit fabricated using GaN technology includes a RF power amplifier coupled to a multi-band RF switch without an intervening impedance matching network between the RF power amplifier and the multi-band RF switch. The multi-band RF switch includes a plurality of Unit HEMT cells. In one IC package, the RF power amplifier, the multi-band RF switch, a controller for controlling the switch and all connection therebetween are totally contained within the IC package. In another IC package, the RF power amplifier and the multi-band RF switch are disposed on a single substrate.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: October 16, 2018
    Assignee: Tagore Technology, Inc.
    Inventor: James E. Mitzlaff
  • Patent number: 10079578
    Abstract: The disclosed embodiments include an audio amplifier system configured to provide a total harmonic distortion (THD) controlled clip detector and an automatic gain limiter (AGL) solution for a closed-loop amplifier. The audio amplifier system is capable of maintaining high power output without hard distortion (i.e., hard clipping) for providing better acoustics, while preventing damage to the system.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: September 18, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shun Qian, Kim Nordtorp Madsen, Lucia Wan
  • Patent number: 10003306
    Abstract: Embodiments relate to a chopped amplifier system where a ripple reduction filter placed outside of a main signal path is disclosed. The chopped amplifier system includes a chopped amplifier having an input terminal and an output terminal, where the input terminal receives an input signal and the output terminal provides an output signal including a ripple that is based on an offset voltage of the chopped amplifier. The ripple reduction filter is placed in a feedback loop path that receives a portion of the chopped amplifier's output signal and provides a feedback signal to the chopped amplifier that reduces the ripple at the output of the chopped amplifier. The ripple reduction filter includes a digital controller and other circuits that can handle large disturbances such as large signal slew rate events and large common-mode steps without reducing the effectiveness of the ripple reduction filter in reducing the ripple.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 19, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Tony Ray Larson, Dimitar Trifonov Trifonov, Biraja Prasad Dash
  • Patent number: 9973024
    Abstract: A wireless power transmitter and a method for detecting a change in load during wireless charging in the wireless power transmitter is provided. The wireless power transmitter includes a power transmission unit configured to transmit power to a wireless power receiver, a current detection unit configured to measure a voltage value corresponding to a current that is output to the power transmission unit while the power is transmitted from the power transmission unit, and a controller configured to adjust the power transmitted by the power transmission unit based on the measured voltage value.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: May 15, 2018
    Assignees: Samsung Electronics Co., Ltd, Kwangwoon University Industry-Academic Collaboration Foundation
    Inventors: Sung-Ku Yeo, Yun-Seong Eo, Kyu-Sub Kwak, Sung-Bum Park, Hyun-Jun Ahn
  • Patent number: 9837963
    Abstract: A power switch 307a is provided between a bias generation circuit 301 and a high potential power source, or a power switch 307b is provided between the bias generation circuit 301 and a low potential power source. A bias potential Vb output from the bias generation circuit 301 is held by a potential holding circuit 300. The bias potential Vb held by the potential holding circuit 300 is input to a bias generation circuit 301a, and a bias potential Vb2 output from the bias generation circuit 301a on which an input signal IN is superimposed is input to an amplifier circuit 302. The potential holding circuit 300 is constituted of a capacitor 306 and a switch 305 formed of, for example, a transistor with a low off-state current that is formed using a wide band gap oxide semiconductor. Structures other than the above structure are claimed.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: December 5, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Kei Takahashi, Shunpei Yamazaki
  • Patent number: 9825657
    Abstract: This disclosure provides systems, methods, and apparatus for a radio frequency transceiver. The transceiver includes a modulator for modulating a data signal onto one or more carrier signals to generate a modulated signal and a power amplifier for amplifying the modulated signal. The transceiver also includes a data pre-distorter (DPD) for pre-distorting the data signal using a look-up table that represents a non-linear transfer function that is an inverse of the non-linear transfer function of the power amplifier. The DPD selects one or more look-up tables based on a feedback signal corresponding to a power level and/or a phase of the output of the power amplifier. The transmitter also includes a controller for comparing the output of the power amplifier to a desired output level and upon sensing changes, altering the amplitude and phase of the feedback signal to substantially constant values.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: November 21, 2017
    Assignee: Google Inc.
    Inventors: Farbod Tabatabai, Dedi David Haziza
  • Patent number: 9647616
    Abstract: A power amplifier module includes a first bipolar transistor configured to amplify a radio frequency signal and output an amplified signal and a second bipolar transistor. A base of the second bipolar transistor is supplied with a control voltage for controlling attenuation of the radio frequency signal, and a collector the second bipolar transistor is supplied with a source voltage. The power amplifier module also includes a first resistor, where one end of the first resistor is connected to a supply path of the radio frequency signal to the first bipolar transistor, and a capacitor, where one end of the capacitor is connected to the other end of the first resistor and the other end of the capacitor is connected to the collector of the second bipolar transistor.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: May 9, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenji Saito
  • Patent number: 9584071
    Abstract: Envelope power supply circuitry includes power converter circuitry and envelope tracking circuitry. The power converter circuitry is configured to receive an envelope power converter control signal and a supply voltage and provide an envelope power supply signal for an amplifier from the supply voltage and based on the envelope power converter control signal. The envelope tracking circuitry is coupled to the power converter circuitry. In a first mode of operation, the envelope tracking circuitry is configured to provide the envelope power converter control signal such that a gain of the amplifier remains substantially constant over a range of input power provided to the amplifier. In a second mode of operation, the envelope tracking circuitry is configured to limit the dynamic range of the envelope power supply signal.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: February 28, 2017
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 9513651
    Abstract: A system and method to achieve low power and/or low supply operation of a delta-sigma modulator by taking advantage of the inherent virtual ground of the delta-sigma loop to make the input to a low power integrator small and largely independent of the input signal. This results in improved linearity of the integrator and relaxed constraints on the supply for the first stage integrator. The architecture also enables direct access to the quantization error of the feedback loop and thus can be used to either/or: 1. Calibrate the modulator, 2. Achieve reduced quantization noise, 3. Stabilize the loop by compensating for excess loop delay. Low voltage common-mode-feedback is also achieved using the techniques described.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: December 6, 2016
    Assignee: KAPIK INC.
    Inventors: Syed Imran Ahmed, James Andrew Cherry, William Martin Snelgrove
  • Patent number: 9479123
    Abstract: The present disclosure describes a method and system for linearizing an amplifier using transistor-level dynamic feedback. The method and system enables nonlinear amplifiers to exhibit linear performance using one or more of gain control elements and phase shifters in the feedback path. The disclosed method and system may also allow amplifiers to act as a pre-distorter or a frequency/gain programmable amplifier.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: October 25, 2016
    Inventor: Ali Mohamed Darwish
  • Patent number: 9414334
    Abstract: Methods and apparatus for using WLAN chips, e.g., WiFi communications chips, to support communications in licensed frequency spectrum which is located outside unlicensed frequency spectrum available for unlicensed WiFi communications, are described. Through the use of low cost WiFi communications chips in frequency bands for which they were not originally intended, low cost communication is achieved in licensed frequency bands. Multimode devices are also possible in which communications may be implemented in either the licensed or unlicensed frequency band using a single WLAN transceiver chip.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: August 9, 2016
    Assignee: Proxim Wireless Corporation
    Inventors: Nagaraju Nerella, Phani K Venkata, Syam Gonnalagadda
  • Patent number: 9413320
    Abstract: A broadband amplifier in which an amplifier output stage is part of a stepped attenuator where the amplifier output stage can be selectively replaced by, or bypassed by, an attenuator block to produce one step of the stepped attenuator.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 9, 2016
    Inventor: Aleksey Pinkhasov
  • Patent number: 9413233
    Abstract: A power supply is disclosed herein. For example, a method for controlling the power supply can include dynamically programming a threshold voltage. The method can also include down-converting an input voltage to generate a down converted voltage at an output voltage node. Further, the method can include passing the input voltage to the output voltage node when a supply voltage exceeds the threshold voltage.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: August 9, 2016
    Assignee: ParkerVision, Inc.
    Inventors: Gregory S. Silver, David F. Sorrells, Gregory S. Rawlins
  • Patent number: 9287842
    Abstract: A digital compensation method includes measuring the temperature of the equipment item and applying an analogue control voltage intended to maintain the electrical quantity of the equipment item at a predetermined setpoint value. At each measurement instant, the method includes interrogating look-up tables respectively associated with different setpoint values, then, when the measured temperature is situated between two digital temperature states stored in the look-up tables, creating intermediate digital temperature states situated between the two stored digital temperature states, computing, by interpolation, digital control words corresponding to the intermediate digital temperature states created, and selecting a digital control word, stored or intermediate, corresponding to the measured temperature, then delivering, to at least one of the N individual devices, the analogue control corresponding to the selected digital control word.
    Type: Grant
    Filed: July 18, 2015
    Date of Patent: March 15, 2016
    Assignee: THALES
    Inventors: Jean Maynard, Raoul Rodriguez, Grégory Mouchon, Philippe Chubbert
  • Patent number: 9214909
    Abstract: A scalable radio frequency (RF) generator system including at least one power supply, at least one power amplifier receiving input from the power supply, and a power supply control module, and a system controller. Output from the at least one power supply can be combined and applied to each of the power amplifiers. Output form each of the at least one power amplifiers can be combined to generate a single RF signal. A compensator module controls operation of the at least one power supply. The compensator module, system control module, and power supply controller communicate in a daisy chain configuration.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: December 15, 2015
    Assignee: MKS Instruments, Inc.
    Inventors: Aaron T. Radomski, Jonathan Smyka, Daniel J. Lincoln, Yogendra Chawla, David J. Coumou, Vadim Lubomirsky
  • Patent number: 9208941
    Abstract: A transformer core apparatus includes a body of highly magnetically permeable material, a permanent magnet arranged in a safe state position for saturating the body with a permanent magnetic field, and means for removing the permanent magnetic field from the body.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: December 8, 2015
    Inventor: Steven Murphy
  • Patent number: 9207099
    Abstract: A computer implemented method, system and computer program product for estimating an offset of at least one sensor is disclosed. The computer implemented method, system and computer program product comprise calculating combinations of running sums to define for computing/or one or more slopes for the sensor. At least one of the one or more slopes provides an indication of the sensor offset changes with temperature.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: December 8, 2015
    Assignee: INVENSENSE, INC.
    Inventor: William Kerry Keal
  • Patent number: 9190971
    Abstract: A signal processing apparatus comprises a signal path for a signal, the signal path comprising a signal processing stage. An auxiliary stage is coupled to an input of the signal processing stage for, in response to a signal in the signal path at the input of the signal processing stage, generating a control signal indicative of the time of a crossing of a first threshold by the signal in the signal path at an output of the signal processing stage by detecting a crossing by the signal of a second threshold established by the auxiliary stage. The second threshold is substantially equal to the first threshold.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: November 17, 2015
    Assignee: ST-ERICSSON SA
    Inventor: Robert Hwat Hian Teng