Abstract: Included are: a first power source 3 configured to output a voltage required for a first gate bias voltage for turning a power amplifier 2 to an ON state; a second power source 4 configured to output a voltage required for a second gate bias voltage for turning the power amplifier 2 to an OFF state; a changeover switch 5 connected between the first power source 3 and the power amplifier 2 and configured to supply either the first gate bias voltage or the second gate bias voltage to the power amplifier 2 by switching a state between the first power source 3 and the power amplifier 2 to either an open state or a short-circuit state on the basis of a control signal related to on-off control of the power amplifier 2; and a resistance value varying unit 15 connected between the second power source 4 and the power amplifier 2 and configured such that a resistance value thereof is variable.

Abstract: A transceiver includes a transmit signal path, a receive signal path, an amplifier, and control circuitry. The control circuitry is configured to couple the amplifier in the transmit signal path to amplify a transmit signal during a transmit operating mode of the transceiver. Furthermore, the control circuitry is configured to couple the amplifier in the receive signal path to amplify a receive signal during a receive operating mode of the transceiver.

Abstract: A high-frequency switch includes: a first transistor connected to an input terminal and a first output terminal; a second transistor connected to the first output terminal; a third transistor connected to the second transistor and grounded; a resistor connected to a connection between the second and third transistors and grounded; a switching circuit switchable between a state in which the switching circuit allows passage of a transmitted/received signal between the input terminal and a second output terminal and a state in which the switching circuit cuts off the transmitted/received signal; and a control unit to control the first, second, and third transistors and the switching circuit. At the time of reception, the control unit brings the switching circuit into the state in which the switching circuit cuts off the transmitted/received signal, places the first and third transistors in an on-state, and places the second transistor in an off-state.

Abstract: One embodiment describes a transimpedance amplifier (TIA) system. The system includes an inverter TIA stage interconnecting an input node and an output node and configured to invert an input signal at the input node to provide a first inverted signal component at the output node. The system also includes a noise-canceling inverter stage arranged in parallel with the inverter stage and being configured to invert the input signal to provide a second inverted signal component and to invert noise from the input node. Thus, the first and second inverted signal components constructively combine at the output node and the noise is substantially mitigated at the output node.

Abstract: The present invention provides an amplifier circuit, wherein the amplifier circuit includes an operational amplifier and a feedback path. The operational amplifier has an input terminal and an output terminal, and is arranged for receiving an input signal to generate an output signal. The feedback path is coupled between the input terminal and the output terminal of the operational amplifier, wherein the feedback path comprises at least two poly resistors, and a depletion region of at least one of the two poly resistors is biased by the output signal generated by the operational amplifier.

Abstract: The invention relates to a voltage amplifier (100, 300) that places defined ranges (12, 14) of an input voltage signal (10) in different relations in terms of the input voltage signal (10) at one or more operating points of an amplifier circuit (130). An appropriate division of the ranges (12, 14) of the input voltage signal (10) makes it possible to linearly amplify the appertaining ranges (12, 14). Such linearly amplified output signals (191, 192, 193, 194) can then be converted into digital signals (531), for example, by means of several analog-to-digital converters (510).

Abstract: To provide a variable gain amplifier capable of correcting a DC offset voltage through simpler control even when a gain thereof is changed. A differential output type variable gain amplifier is equipped with a first voltage correction unit coupled to a preceding stage of a variable gain amplifier circuit and for outputting a first correction voltage to correct a potential difference generated between a first conductor provided with a first input resistor and a second conductor provided with a second input resistor, and a second voltage correction unit coupled to a subsequent stage of the variable gain amplifier circuit and for correcting a differential output. A control unit is configured to control the first correction voltage and a correction amount of a potential difference by the second voltage correction unit and thereby attenuate a DC offset voltage included in the differential output.

Abstract: An amplifier circuit can include an amplifier and a resistor network coupled to the amplifier. The resistor network can include a range resistor coupled in parallel to a resistor string, and one or more switches coupled to the resistor string. The resistor network can be used to calibrate gain and common mode rejection ratio (CMRR) of the amplifier circuit.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: An integrated circuit amplifier configurable to be either a programmable gain amplifier or an operational amplifier comprises two output blocks, one output block is optimized for programmable gain amplifier operation, and the other output block is optimized for operational amplifier applications. A common single input stage, input offset calibration and bias generation circuits are used with either amplifier configuration. Thus duplication of the input stage, offset calibration and bias generation circuits are eliminated while still selectably providing for either a programmable gain amplifier or operational amplifier configuration.

Abstract: A conferencing endpoint includes a loudspeaker, a base microphone, and a double-talk detection module which allows two-way communication between the conferencing endpoint and a remote endpoint only when participants at both endpoints are speaking at the same time, so as to minimize echo due to feedback. The double-talk detection module adds the energy of any distortion from the loudspeaker to the energy of the signal coming from the remote endpoint, and compares this combined energy with the energy of the base microphone to determine whether double-talk is present. The double-talk detection module is thus prevented from mistaking the feedback for near end talk at the endpoint.

Abstract: The inventive concepts relate to variable gain amplifiers. The variable gain amplifier including an amplifier, a first fixed resistor and a first variable resistor, a second fixed resistor and a second variable resistor, a third fixed resistor and a third variable resistor, a fourth fixed resistor and a fourth variable resistor, a first output terminal and a second output terminal, and a decoder may be provided. The decoder is configured to receive first control bits, generate second control bits from the first control bits, generate third and fourth control bits from the first or second control bits, respectively, transmit the first control bits and the third control bits to the third and fourth variable resistors to adjust resistance values, and transmit the second and fourth control bits to first and second variable resistors to adjust resistance values.

Abstract: A device includes an amplifying circuit having first and second input terminals and an output terminal, a ground terminal, a variable resistance circuit, and a resistance selecting circuit coupled in series to the variable resistance circuit between the output terminal and the ground terminal. The resistance selecting circuit includes a first node coupled to the second input terminal, a plurality of resistors coupled in series to each other and a plurality of gate circuits each coupled between the first node and one end of a corresponding one of the resistors.

Abstract: A preamplifier circuit can include a control line dedicated to receive a control signal that corresponds to indicating a specific register of the preamplifier circuit, which can allow the preamplifier to switch between utilizing two or more registers to control a current output of the preamplifier circuit. The preamplifier circuit may also have a serial input to program multiple registers of the preamplifier circuit in a serial fashion. In some embodiments, the current output may be a laser bias current. The preamplifier may adjust an output current that drives a laser emitter based on a control signal indicating which specific registers controls the output current. Further, a controller, such as a system-on-chip controller, may selectively vary the control signal to affect the current output of the preamplifier circuit. These systems and methods may be particularly useful for lasers and heat-assisted magnetic recording (HAMR).

Abstract: A receiver, including: a tuner receiving an input signal; a signal processor configured to process the input signal; an automatic gain control (AGC) controller configured to: initialize the receiver in a low gain state; determine the presence of a signal; and increase the receiver gain to determine if a weak signal is present prior to a strong signal.

Abstract: An integrated circuit amplifier configurable to be either a programmable gain amplifier or an operational amplifier comprises two output blocks, one output block is optimized for programmable gain amplifier operation, and the other output block is optimized for operational amplifier applications. A common single input stage, input offset calibration and bias generation circuits are used with either amplifier configuration. Thus duplication of the input stage, offset calibration and bias generation circuits are eliminated while still selectably providing for either a programmable gain amplifier or operational amplifier configuration.

Abstract: A power converter may include a power inductor, a plurality of switches arranged to sequentially operate in a plurality of switch configurations, an output for producing the output voltage, wherein a first switch is coupled to a first output terminal of the output and a second switch is coupled to a second output terminal of the output, and a linear amplifier coupled to the output. The controller may be configured to, in a linear amplifier mode of the power stage, enable the linear amplifier to transfer electrical energy from an input source of the power stage to the load, and in at least one mode of the power stage other than the linear amplifier mode, sequentially apply switch configurations from the plurality of switch configurations to selectively activate or deactivate each of the plurality of switches in order to transfer the electrical energy from the input source to the load.

Abstract: An RF amplifier that compensates the drift appearing after a sudden decrease of the drain current is disclosed. The RF amplifier detects the drain current by the bias control unit that feeds the change of the drain current back to the gate bias of the FET. The bias control unit responds to the sudden increase of the drain current by a relatively longer time constant; while, to the sudden decrease thereof by the second time constant enough shorter than the first time constant to compensate the drift appearing after the sudden decrease of the drain current.

Abstract: A method for adjusting common mode rejection ratio (CMRR) and gain error of a current sense (CS) amplifier, comprising: measuring a first referred to input (RTI) offset voltage while presenting a given common mode (CM) input voltage; adding a first trim resistor of a plurality of selectable trim resistors within an adjustable feedback resistor chain to a feedback electrical path; measuring a second RTI offset voltage while presenting the given CM input voltage; estimating, based upon the first and second RTI offset voltages, a third RTI offset voltage value that would result by adding a second trim resistor of the plurality of selectable trim resistors to the feedback electrical path; using the first, second and third RTI offset voltage values to identify the combination of selectable trim resistors that achieves an RTI offset voltage closest to zero volts; and adding the identified selectable trim resistors to the feedback electrical path.

Abstract: Disclosed herein is a display device capable of displaying an image with two or more gray levels. The display device includes: a voltage division circuit adapted to generate a plurality of voltages using a resistance division circuit; a gamma correction section adapted to gamma-correct the image using the voltages generated at division points of the resistance division circuit; an amplification circuit adapted to amplify a given voltage and supply the amplified voltage to at least one of the division points of the resistance division circuit; and an adjustment section adapted to adjust an amplification factor of the amplification circuit.

Abstract: A variable feedback impedance is presented capable of providing high linearity (e.g. as represented by IP2 and IP3) and high linear range (e.g. as represented by P1dB) when used in a feedback path of an RF amplifier in the presence of high voltage amplitudes.

Abstract: An imaging sensor using a novel bit line processing circuit, that circuit, and the method of processing the pixel outputs from an image sensor using that processing circuit are disclosed. The image sensor includes an array of pixel sensors, a signal digitizing circuit, and a digitizing controller. Each pixel sensor generates a voltage signal that is a function of a charge on the photodetector in that pixel sensor, and couples that voltage signal to a bit line in response to a first signal. The signal digitizing circuit is connected to the bit line, the digitizing circuit converting the voltage signal to a plurality of output digital values, the output digital values having selectable levels of digitization noise. The digitizing controller generates the level of noise based on the voltage signal. The signal digitizing circuit includes a variable gain amplifier and an ADC having a fixed number of bits.

Abstract: An operational amplifying device with auto-adjustment output impedance includes an operational amplifier and first to third signal paths. The operational amplifier has an output connected to its inverting input, and a non-inverting input for receiving an input signal. The first signal path has one end connected to the output of the operational amplifier and the other end connected to a first output node. The second signal path has one end connected to the output of the operational amplifier and the other end connected to the first output node. The third signal path has one end connected to the output of the operational amplifier and the other end connected to the first output node. The first signal path is normally on, and the second and third signal paths are normally off. The first signal path has high impedance, and each of the second and third signal paths has low impedance.

Abstract: An adaptive phase-lead compensation (zero) circuit is disclosed that can be added to a circuit (e.g., a CMOS-based LDO) to ease the compensation and increase the phase margin of the circuit. By using the disclosed adaptive phase-lead compensation circuit, an adjustable resistance can be connected to any nodes in the compensated circuit rather than just to the voltage source (VDD) or ground (GND), allowing the Miller Effect to be used via a Miller capacitor.

Abstract: A semiconductor integrated circuit includes an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal, a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier, and a variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied.

Abstract: A radio frequency power amplifier amplifies an input signal at an input port, and produces an output signal at an output port. The power amplifier may include one or more amplifier stages. An amplifier stage may include an active device, and a feedback network. The feedback network may include one or more reactive elements configured to resonate at a predetermined frequency, to provide an impedance match at the input to the amplifier stage, and to provide an impedance match at the output of the amplifier stage. In some example implementations, the input and output impedance matching is caused by biasing the active device to produce a transconductance at least one of equal to or greater than a critical transconductance.

Abstract: A variable gain analog amplifier is described that uses pulse-density modulation in the form of a sigma-delta modulator (SDM) to produce a gain by modulating the selection of a switch that selects the amount of resistance in a negative feedback loop of the amplifier. The output of the SDM is dithered to increase the gain resolution of the analog amplifier, wherein the increased resolution produces a quiet, inaudible transition between changes in gain setting at an output of the variable gain amplifier and in addition produces a quiet, inaudible mixing and merging of audio signals.

Abstract: A variable gain amplifier (100) includes a transistor (110), an FB impedance section (120), a source impedance section (130), a drain impedance section (140), a gain controller (150), and a frequency characteristic controller (160). The gain controller (150) varies impedance of one of the FB impedance section (140), the source impedance section (130), and the drain impedance section (140), and outputs a gain control signal. The frequency characteristic controller (160) varies the impedance of different impedance section, based on the gain control signal.

Abstract: A variable matching circuit includes a transformer which is disposed between first and second transistor circuits. A primary inductor device and a secondary inductor device are magnetically coupled in the transformer. The primary inductor device is connected between an output terminal of the first transistor circuit and a bias circuit for the first transistor circuit. The secondary inductor device is connected between an input terminal of the second transistor circuit and a bias circuit for the second transistor circuit. Connection points between the primary inductor device and the bias circuit for the first transistor circuit and between the secondary inductor device and the bias circuit for the second transistor circuit are connected to first and second capacitive elements, respectively. At least one of inductance values of the respective primary and secondary inductor devices and capacitance values of the respective first and second capacitive elements is variable.

Abstract: A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of NMOS resistors in the fine ladder conquers fine ladder nominal current and it produces non-monotonic gain scallop. Two new art design techniques: (1) adaptively control the fine ladder; and (2) use dummy PMOS brunch device leakage compensates for the NMOS resistor device leakage, are proposed so that the non-monotonic scallops are substantially eliminated and 13-bit resolution/accuracy PGA has been achieved.

Abstract: A control apparatus is provided that can provide high dynamic resolution and is suitable for inclusion within an integrated circuit. The control apparatus receives a demand signal representing a desired value of a measurand, and a feedback signal representing a present value or a recently acquired value of the measurand. The processing circuit forms a further signal a further signal which is a function of the demand and feedback signals. The further signal is then subjected to at least an integrating function. The demand signal, feedback signal or the further signal is processed or acquired in a sampled manner. The use of such sampled, i.e. discontinuous, processing allows integration time constants to be synthesized which would otherwise require the use of unfeasibly large components within an integrated circuit, or the use of off-chop components. Both of these other options are expensive.

Abstract: An amplifier circuit including an amplifier, a first feedback path, and a second feedback path. The amplifier is configured to amplify an input signal in accordance with a gain. The first feedback path includes a first capacitance, and responsive to the input signal being within in a first frequency range, the first feedback path configured to provide feedback from the output of the amplifier to an inverting input of the amplifier. The second feedback path includes a first resistance connected in series with a second capacitance, and responsive to the input signal being within in a second frequency range, the second feedback path is configured to provide feedback from the output of the amplifier to the inverting input of the amplifier. The second frequency range is less than the first frequency range, and the gain of the amplifier levels off according to a value of the second capacitance.

Abstract: An error amplification circuit amplifies an error voltage between a reference voltage and an output voltage of the LED current sensor. A control circuit controls the DC output power so that the DC output power becomes a predetermined value, by performing on-off control on a switching element based on the output voltage of the error amplification circuit. The error amplification circuit includes an error amplifier, a phase compensation circuit connected between an inverting input terminal and an output terminal of the error amplifier and having a serial circuit of a phase compensation capacitor and a phase compensation resistor, a gain adjustment resistor serially connected at one end to the serial circuit and connected at the other end to the LED current sensor, and a short circuit configured to make the inverting input terminal of the error amplifier grounded for a predetermined period of time after activation.

Abstract: A method for compensating for a dielectric absorption effect in a measurement configuration during measurements by an instrument having measurement terminals includes providing a feedback loop in the instrument, the loop having a gain adjustment and a simulation impedance and being adapted to provide a signal counter to the dielectric absorption at the measurement terminals; applying a transient calibration signal to the test terminals for at least two values of the gain adjustment; measuring a response to the calibration signal for each of the at least two values; and determining an operating value of the gain adjustment based on the measured responses. The operating value is used for subsequent measurements by the instrument, the simulation impedance modeling the dielectric absorption characteristics of the measurement configuration.

Abstract: Variable feedback architecture and control techniques for variable gain amplifiers (VGAs) concurrently maintain, across a wide range of VGA gain settings, minimal input and output impedance variations, a low noise figure, low rates of change in noise figure, high signal-to-noise ratio (SNR), high quality of service (QoS), low distortion, high and relatively constant output third order intercept point (i.e., IP3 or TOI). Variable feedback counteracts impedance variations caused by gain variations. Compared to conventional high performance VGAs, noise figure is lower (e.g. 3 dB lower at maximum gain and 12 dB lower at minimum gain) and relatively constant, IP3 is higher and relatively constant, small signal third order intermodulation signal (IM3) tone slope is relatively constant and input and output impedances are relatively constant. As gain decreases, the noise figure advantage is nearly dB per dB compared to conventional high performance VGAs.

Abstract: In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting.

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract: An auto gain adjusting device and method is disclosed. The auto gain adjusting device comprises a predistorter, a gain unit, a power amplifier, a receiving unit and a calculation unit. The predistorter generates a plurality of test signals in a calibration mode, wherein the powers between a current test signal and a previous test signal includes a first difference value. The gain unit provides a substantially constant gain value to the current test signal and the previous test signal to generate a current amplified test signal and a previous amplified test signal. The power amplifier amplifies the current amplified test signal and the previous amplified test signal to generate a first transmitting signal and a second transmitting signal. The receiving unit converts the first transmitting signal and the second transmitting signal into a first baseband signal and a second baseband signal respectively.

Abstract: This technique relates to a receiving device, a receiving method, and a program that can demodulate transmitted signals with high accuracy. A receiving device of this disclosure includes: an amplifying unit that amplifies a received signal; an adjusting unit that adjusts gain of the amplifying unit in accordance with power of the signal; a demodulating unit that demodulates the amplified signal; and a detecting unit that detects an interval from the signal, information having the same content continuously appearing in the interval. The adjusting unit restricts the process of adjusting the gain of the amplifying unit in accordance with a result of the detection of the interval. This disclosure can be applied to receiving devices that receive broadcast signals compliant with DVB-C2 via a CATV network.

Abstract: According to one embodiment, an amplification device includes an input terminal into which an input signal is inputted, a first amplifier, an output terminal, a variable impedance module connected at an output end of the first amplifier, a second amplifier, a reference impedance element connected at an output end of the second amplifier, a magnitude comparator, a phase comparator, and a controller. The controller is configured to control impedance of the variable impedance module so that impedance at a point between the first amplifier and the variable impedance approaches a first value.

Abstract: Disclosed is an automatic gain control feedback amplifier that can arbitrarily control a gain even when a difference in input signal is large. The automatic gain control feedback amplifier includes: an amplification circuit unit configured to amplify voltage input from an input terminal and output the amplified voltage to an output terminal; a feedback circuit unit connected between the input terminal and the output terminal and including a feedback resistor unit of which a total resistance value is determined by one or more control signals and a feedback transistor connected to the feedback resistor unit in parallel; and a bias circuit unit configured to supply predetermined bias voltage to the feedback transistor.

Abstract: A TIA circuit and method are provided that merge the automatic gain control function with the bandwidth adjustment function to allow the TIA circuit to operate over a wide dynamic range at multiple data rates. The TIA circuit has an effective resistance that is adjustable for adjusting the gain and the bandwidth of the TIA circuit. The mechanism of the TIA circuit that is used to adjust the effective resistance, and hence the gain and bandwidth of the TIA circuit, is temperature independent, and as such, the performance of the TIA circuit is not affected by temperature variations.

Abstract: Embodiments of the invention described herein provide a magnetic sensor interface capable of adjusting signal conditioning dynamically using a speed signal of a target such that the true positive and negative peaks of the input signal are maintained for the given target across its entire speed range (0-Max rpm), therefore increasing the signal to noise ratio at low speeds and avoiding clipping or distortion at high speeds. In one aspect, a method comprises receiving an alternating differential voltage signal from a sensor. The differential voltage signal has an amplitude that changes relative to a change in speed of a target. The alternating differential voltage signal is converted to an attenuated single-ended voltage signal that can be dynamically scaled. The attenuated single-ended voltage signal can be scaled by multiplying the attenuated single-ended voltage signal by a scaling factor.

Abstract: The present disclosure provides an amplifier and associated methods of operations. An exemplary amplifier an input terminal; an output terminal; a first virtual ground node; a second virtual ground node; an operational amplifier coupled with the input terminal and the output terminal; a resistive input section coupled with an input of the operational amplifier; and a resistive feedback section coupled with an output of the operational amplifier. The resistive input section includes a fixed input resistor coupled with the input terminal and the first virtual ground node, and a switchable input resistor segment coupled with the fixed input resistor in parallel. The resistive feedback section includes a fixed feedback resistor coupled with the output terminal and the first virtual ground node, and a switchable feedback resistor segment coupled with the fixed feedback resistor in parallel.

Abstract: A variable gain amplifier (100) includes a transistor (110), an FB impedance section (120), a source impedance section (130), a drain impedance section (140), a gain controller (150), and a frequency characteristic controller (160). The gain controller (150) varies impedance of one of the FB impedance section (140), the source impedance section (130), and the drain impedance section (140), and outputs a gain control signal. The frequency characteristic controller (160) varies the impedance of different impedance section, based on the gain control signal.

Abstract: Provided is a feedback amplifier. The feedback amplifier includes: an amplification circuit unit amplifying a bust packet signal inputted from an input terminal and outputting the amplified voltage to an output terminal; a feedback circuit unit disposed between the input terminal and the output terminal and controlling whether to apply a fixed resistance value to a signal outputted to the output terminal; a packet signal detection unit detecting a peak value of a bust packet signal from the output terminal and controlling whether to apply the fixed resistance value; and a bias circuit unit generating a bias voltage, wherein the feedback circuit unit determines a feedback resistance value to change the fixed resistance value in response to at least one control signal and adjusts a gain by receiving the bias voltage.

Abstract: Systems and methods are provided for detecting forward power sent to an antenna and reflected power reflected back from the antenna. Embodiments of the present invention provide systems and methods for measuring forward and reflected power and controlling the amount of power supplied to the antenna responsive to these measurements. Embodiments of the present invention enable the power sent to the antenna to be dynamically altered when antenna impendence changes (e.g., when the antenna gets too close to another object).

Abstract: The present invention relates to an apparatus and a method for automatic gain control of a sensor, and a sensor apparatus. The apparatus for automatic gain control of a sensor including: a PID control unit for outputting a gain value applied compensated sensor signal by performing PID control while generating and changing a gain value to converge a peak value of a sensor signal to a target value; and a margin calculation unit for determining the degree of change of peaks of a previous gain value applied compensated sensor signal and a current gain value applied compensated sensor signal and performing calculation of a margin for stabilizing the compensated sensor signal according to the result of determination of the degree of change is provided. Further, a sensor apparatus and a method for automatic gain control of a sensor are provided.

Abstract: Systems and method for implementing a transmitter with hybrid closed loop power control in a communication device.

Abstract: An amplifier and oscillator system includes a MEMS resonator and a two stage amplifier topology. The MEMS resonator is configured to generate a resonator signal. The two-stage amplifier topology is configured to amplify the resonator signal with a selected trans-impedance gain. Additionally, the two stage amplifier topology yields a feedback resistance that provides the selected trans-impedance gain.