Including Protection Means Patents (Class 330/298)
  • Patent number: 11843357
    Abstract: Methods and devices for clamping an output of an amplifier stage of an amplifier are presented. According to one aspect, a clamp sense circuit senses a voltage at a node of an internal stage of the amplifier. The clamp sense circuit senses a region of operation of the clamp circuit and correspondingly controls a current limiter that is introduced in the amplifier to limit a current through the internal stage of the amplifier. Limiting the current in turn causes limiting a current path from a clamp circuit through the output of the amplifier stage. According to another aspect, the clamp sense circuit is a replica of the amplifier stage of the amplifier, the output of the amplifier stage coupled to the clamp circuit, and an output of the replica decoupled from the clamp circuit.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: December 12, 2023
    Assignee: pSemi Corporation
    Inventor: Christopher C. Murphy
  • Patent number: 11722102
    Abstract: A protection circuit comprises a first transistor, a comparator, a second transistor, and a third transistor. The first transistor has a gate connected to an input terminal and configured to pass a drain current based on a potential at the input terminal. The comparator has a non-inverting terminal to which a source of the first transistor is connected and an inverting terminal to which a reference voltage is applied. The second transistor has a gate to which an output of the comparator is applied, a source connected to a power supply voltage, and a drain connected to the input terminal. The third transistor has a gate to which a predetermined voltage is applied, a drain connected to the gate of the second transistor, and a source connected to the drain of the input transistor.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: August 8, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Shuhei Miwa
  • Patent number: 11670940
    Abstract: The present disclosure relates to an ESD protection device (240) for a USB interface (210). The ESD protection device (240) comprises an ESD protection component (246) configured to limit a voltage applied to the USB interface (210) and at least one discharge resistor (244, 244.1, 244.2) configured to discharge an AC coupling capacitor (242) of the USB interface (210). The ESD protection component (246) and the discharge resistor (244, 244.1, 244.2) are incorporated in a single electronic component (245).
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: June 6, 2023
    Assignee: Infineon Technologies AG
    Inventor: Anton Gutsul
  • Patent number: 11545939
    Abstract: Methods, apparatus, and systems are disclosed that adjust transient response in a multistage system. An example apparatus includes a first filter including an input configured to be coupled to an output of a master stage, an amplifier, the first input of the amplifier coupled to the input of the first filter, the second input of the amplifier coupled to the output of the first filter, a second filter, the input of the second filter coupled to the output of the amplifier, and a comparator, the first input of the comparator coupled to the input of the first filter circuit, the second input of the comparator coupled to the output of the amplifier, the third input of the comparator coupled to the output of the second filter, and the output of the comparator adapted to be coupled to a latch.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: January 3, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sanjay Gurlahosur, Karen Chan
  • Patent number: 11476805
    Abstract: The present disclosure relates to circuitry comprising: amplifier circuitry configured to receive a variable supply voltage, wherein the supply voltage varies according to an output signal of the amplifier circuitry; monitoring circuitry configured to monitor one or more parameters of an output signal of the amplifier circuitry; and processing circuitry configured to receive an indication of the voltage of the variable supply voltage and an indication of the monitored parameters from the monitoring circuitry and to apply a correction to one or more of the monitored parameters to compensate for coupling between the variable supply voltage and the monitoring circuitry.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: October 18, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Philip Clarkin, Ivan Perry, Mark H. Tovell, Roberto Napoli, David Rhodes
  • Patent number: 11444582
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: September 13, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Kenji Mukai, Fumio Harima
  • Patent number: 11425498
    Abstract: A method of regulating power supply to a speaker and a system for regulating power supply to a speaker comprising a generating of a low frequency signal output to the speaker, sensing a current and a voltage of the speaker after the low frequency signal is output to the speaker, measuring an impedance of the speaker based on the current and voltage, determining a temperature of the speaker and comparing with a threshold value, and lowering a power supply to the speaker where the temperature is above the threshold value.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: August 23, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Ding Wei
  • Patent number: 11233486
    Abstract: Concurrent electrostatic discharge and surge protection clamps in power amplifiers. In some embodiments, a semiconductor die can include a semiconductor substrate and an integrated circuit implemented on the semiconductor substrate. The integrated circuit can include a power amplifier and a controller. The semiconductor die can further include a clamp circuit implemented on the semiconductor substrate and configured to provide electrostatic discharge protection and surge protection for at least some of the integrated circuit.
    Type: Grant
    Filed: February 1, 2020
    Date of Patent: January 25, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Myunghwan Park, Jermyn Tseng, John Tzung-Yin Lee, David Steven Ripley
  • Patent number: 11190889
    Abstract: A semiconductor device is provided, the device including a first detection section having a removal section to remove DC offset components included in each of an input signal and an output signal output from an amplification section that amplifies the input signal, and a correction section configured to perform correction to match phases of the input signal and the output signal from which the DC offset components have been removed, and to match gains of the input signal and of the output signal, the first detection section comparing a waveform of the input signal to a waveform of the output signal, and a second detection section to detect a mismatch between the DC offset component included in the input signal that is input into the removal section and the DC offset component included in the output signal that is input into the removal section.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: November 30, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takanori Hashimoto
  • Patent number: 11176861
    Abstract: An electronic device includes a substrate and a display driver chip bonded on the substrate. The display driver chip includes a plurality of operational amplifiers, and each of the operational amplifiers has a first stage and a second stage. The first stage includes a first power input terminal. The second stage includes a first power input terminal and an output terminal for outputting an output voltage. The first power input terminal of the first stage is connected to a first metal trace of the substrate, and the first power input terminal of the second stage is connected to a second metal trace of the substrate. The first power input terminal of the first stage and the first power input terminal of the second stage are both provided with a first voltage level.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: November 16, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Syang-Yun Tzeng, Cheng-Tsu Hsieh, Ching-Wen Hou, Ying-Hsiang Wang, Ping Chen
  • Patent number: 11165395
    Abstract: Radio frequency amplifiers with overload protection are provided herein. In certain configurations, an RF amplifier system includes an RF amplifier that receives an RF signal from an input terminal and that generates an amplified RF signal at an output terminal, and an overload detection circuit that generates a detection signal indicating a detected signal level of the RF amplifier. The RF amplifier includes an amplification device that amplifies the RF signal and a degeneration circuit that provides degeneration to the amplification device. Additionally, the detection signal is operable to control an amount of degeneration provided by the degeneration circuit so as to protect the RF amplifier from overload.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: November 2, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventor: Leslie Paul Wallis
  • Patent number: 11152897
    Abstract: A power amplifier includes an amplifying circuit, including an amplifying transistor configured to amplify an input signal and configured to output an output signal, a bias circuit, including a bias transistor comprising an emitter configured to provide a bias current into a base of the amplifying transistor, and a base into which a control current is input, and an overcurrent protecting circuit configured to bypass the control current into a ground, according to a current level of the output signal.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: October 19, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Su Yeon Han
  • Patent number: 11137436
    Abstract: The present disclosure pertains to systems and methods for monitoring traveling waves in an electric power system. In various embodiments, a data acquisition subsystem may acquire electric power system signals. A traveling wave detection subsystem may detect two or more traveling waves based on the electric power system signals and determine a location of an event triggering the traveling waves. A traveling wave security subsystem may selectively generate a restraining signal based on the location of the event as within a blocking zone. A protection action subsystem may implement a protective action when the location is outside of a blocking zone. In various embodiments, a protective action will not be implemented for traveling waves launched from known locations of switching devices operating normally. Further, protective actions may be restrained if a magnitude of a traveling wave differs from an expected value based on a pre-fault voltage.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: October 5, 2021
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Edmund O. Schweitzer, III, Bogdan Z. Kasztenny
  • Patent number: 11133787
    Abstract: Methods and apparatus to determine automated gain control parameters for an automated gain control protocol are disclosed. An example apparatus includes a first tuner to amplify an audio signal. Disclosed example apparatus also include a second tuner to amplify the audio signal. Disclosed example apparatus also include a first controller to tune the first tuner to apply a first gain representative of a first range of gains to the audio signal to determine a first amplified audio signal and tune the second tuner to apply a second gain representative a second range of gains to the audio signal to determine a second amplified audio signal, the second range of gains lower than the first range of gains. Disclosed example apparatus also include a second controller to select the first range of gains to be utilized in an automated gain control protocol when the first gain results in clipping of the first amplified audio signal and the second gain does not result in clipping of the second amplified audio signal.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: September 28, 2021
    Assignee: The Nielsen Company (US), LLC
    Inventors: John T. Livoti, Rajakumar Madhanganesh, Stanley Wellington Woodruff, Ryan C. Lehing, Charles Clinton Conklin
  • Patent number: 11018631
    Abstract: Monolithic microwave integrated circuits are provided that include a substrate, a transmit/receive selection device that is formed on the substrate, a high power amplifier formed on the substrate and coupled to a first RF port of the transmit/receive selection device, a low noise amplifier formed on the substrate and coupled to a second RF port of the transmit/receive selection device and a protection circuit that is coupled to a first control port of the transmit/receive selection device.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: May 25, 2021
    Assignee: Cree, Inc.
    Inventor: Thomas J. Smith, Jr.
  • Patent number: 10969848
    Abstract: A system power monitor circuit and method implemented in a system including multiple power supplies measures and scales the power supply output current value at each power supply as a ratio of the power supply output voltage and a reference voltage. Scaled power supply output current values are combined to provide a single system current signal that is referenced to the same reference voltage value being the system voltage signal. The system power is determined from the system current signal and the system voltage signal. In some embodiment, a power supply output voltage of a selected power supply is used as the reference voltage.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 6, 2021
    Assignee: Alpha & Omega Semiconductor (Cayman) Ltd.
    Inventor: Chris M. Young
  • Patent number: 10958222
    Abstract: A bias circuit includes a current sensor, a transistor, and a low pass filter circuit. The current sensor has a first terminal coupled to a voltage terminal, and a second terminal. The transistor has a first terminal coupled to the second terminal of the current sensor, a second terminal coupled to a radio frequency signal path for providing a bias signal, and a control terminal for receiving a reference voltage. The low pass filter circuit is coupled between the second terminal of the current sensor and the control terminal of the transistor.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 23, 2021
    Assignee: RichWave Technology Corp.
    Inventor: Yi-Fong Wang
  • Patent number: 10944366
    Abstract: In an embodiment, a class-AB amplifier includes: an output stage that includes a pair of half-bridges configured to be coupled to a load; and a current sensing circuit coupled to a first half-bridge of the pair of half-bridges. The current sensing circuit includes a resistive element and is configured to sense a load current flowing through the load by: mirroring a current flowing through a first transistor of the first half-bridge to generate a mirrored current, flowing the mirrored current through the resistive element, and sensing the load current based on a voltage of the resistive element.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: March 9, 2021
    Assignee: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD
    Inventors: Ru Feng Du, XiangSheng Li
  • Patent number: 10797669
    Abstract: An example speaker for providing alerts includes: a housing and a cover forming an integrated unit; a microphone configured to sense an ambient noise level; and a processor configured to adjust a volume of the speaker based upon the ambient noise level. A hinge can be positioned between the housing and the cover to allow the cover to be pivoted relative to the housing from a close position to an open position.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: October 6, 2020
    Assignee: Federal Signal Corporation
    Inventors: Scott M. Cassidy, Lonnie E. Moravetz, Mark J. Dietel
  • Patent number: 10768241
    Abstract: A power supply circuit includes an internal power source that receives power supply from an external power source, an abnormality detection circuit that receives power supply from the internal power source to detect abnormalities of the external power source, a protection target circuit that receives the power supply from the external power source, and a protection function unit that restricts electric power supplied to the protection target circuit to a predetermined range, when the abnormality detection circuit detects the abnormalities.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: September 8, 2020
    Assignee: YAMAHA CORPORATION
    Inventors: Takuya Kataoka, Hitoshi Shima
  • Patent number: 10732230
    Abstract: A power supply circuit includes an internal power source that receives power supply from an external power source, an abnormality detection circuit that receives power supply from the internal power source to detect abnormalities of the external power source, a protection target circuit that receives the power supply from the external power source, and a protection function unit that restricts electric power supplied to the protection target circuit to a predetermined range, when the abnormality detection circuit detects the abnormalities.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: August 4, 2020
    Assignee: YAMAHA CORPORATION
    Inventors: Takuya Kataoka, Hitoshi Shima
  • Patent number: 10728658
    Abstract: An electronic circuit includes an output generator and an over-voltage detector. The output generator is configured to output an output signal to an output terminal. In response to an amplitude of a voltage of the output terminal being greater than an allowable amplitude, the over-voltage detector is configured to output an over-voltage detection signal of a first logic value, such that elements included in the output generator are turned off. In response to the over-voltage detector outputting the over-voltage detection signal of the first logic value again before a reference time elapses after the first logic value of the over-voltage detection signal changes to a second logic value of the over-voltage detection signal, the turned-off elements remain turned off. In response to the over-voltage detector outputting the over-voltage detection signal of the second logic value during the reference time, the turned-off elements are turned on.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: July 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-Jin Lee, Young-Hun Kim
  • Patent number: 10666205
    Abstract: Apparatus and methods for overload protection of low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA system includes a switch having an analog control input, an LNA configured to provide amplification to a radio frequency (RF) input signal received from the switch, a detector configured to generate a detection current based on detecting a signal level of the LNA, and an error amplifier configured to amplify the detection current to generate an overload protection signal that controls the analog control input.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: May 26, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventor: Leslie Paul Wallis
  • Patent number: 10644667
    Abstract: A sound processing device includes an amplifier, a current detector, and a controller. The amplifier amplifies a sound signal to drive a loudspeaker. The current detector detects a value of an electric current flowing into the amplifier. The controller controls whether to supply power to the amplifier based on a predicted current value and the current detected by the current detector. The predicted current value is predicted in accordance with a volume setting and a level of the sound signal.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: May 5, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuhiro Watanabe, Kazuhiro Uchida, Seigo Ozaki
  • Patent number: 10581386
    Abstract: A protective device that detects an abnormal current in a driving circuit for driving a speaker includes a sound level detector, a current level detector, and a determination section. The sound level detector detects a sound level of an audio signal output to the driving circuit. The current level detector detects a current level of a current flowing in the driving circuit from a power source. The determination section generates, based on a detection signal of the sound level and a detection signal of the current level, a protection command signal when the current level larger than a second threshold is detected when the sound level of the audio signal is smaller than a first threshold.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: March 3, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Yasuo Nakata
  • Patent number: 10433083
    Abstract: An audio processing device has an information extractor that extracts identification information from a first audio signal in a first frequency band that includes an audio component of a sound for reproduction and an audio component including the identification information of the sound for reproduction and a signal processor that generates a second audio signal that includes the identification information extracted by the information extractor and that is in a second frequency band higher than the first frequency band, with a sound represented by the second audio signal being emitted from a sound emission device.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: October 1, 2019
    Assignee: YAMAHA CORPORATION
    Inventors: Shota Moriguchi, Yuki Seto
  • Patent number: 10422818
    Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: September 24, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Tikno Harjono, Vijay Krishnamurthy, Min Chu, Kuntal Joardar, Gary Eugene Daum, Subrato Roy, Vinayak Hegde, Ankur Chauhan, Sathish Vallamkonda, Md Abidur Rahman, Eung Jung Kim
  • Patent number: 10320342
    Abstract: A bi-directional RF signal amplifier includes a RF input port and surge suppression circuitry downstream of the RF input port. First and second communications paths lead from the surge suppression circuitry to first and second RF output ports. The second communications path is considered non-interruptible and can support both downstream and upstream RF communications even in the absence of power being supplied to the RF signal amplifier. The surge suppression circuitry includes a data line connected to the RF input port. A first circuit path is electrically connected between the data line and ground. A gas discharge tube (GDT), within the first circuit path, acts as an open circuit when a voltage across the GDT is less than a predetermined value and acts as a short circuit when the voltage across the GDT exceeds the predetermined voltage. An electronic device is placed in series with the GDT within the first circuit path.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: June 11, 2019
    Assignee: CommScope, Inc. of North Carolina
    Inventor: Shi Man Li
  • Patent number: 10256775
    Abstract: A semiconductor device formed on a silicon on insulator substrate includes an input node to receive a first signal, such as a high frequency signal, and an output node to output a second signal corresponding to the first signal. A first transistor has a gate that receives the first signal from the input node and thereby outputs an amplified first signal. A second transistor is connected between a drain of the first transistor and the output node. An inductor is connected between a source of the first transistor and a ground potential. A capacitor connected is between the gate of the first transistor and the input node. An electrostatic discharge (ESD) protective element is connected between a first node and a second node. The first node is between the inductor and the first transistor, and the second node is between the input node and the capacitor.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: April 9, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Seshita, Yasuhiko Kuriyama
  • Patent number: 10211732
    Abstract: An SMPS (Switched Mode Power Supply) circuit includes a first switch element, a second switch element, an inductor, a capacitor, a current sensor, a current comparator, and a controller. The first switch element is coupled between a first power node and a switch node. The second switch element is coupled between the switch node and a second power node. The inductor is coupled between the switch node and an output node. The capacitor is coupled between the output node and the second power node. The current sensor detects a switch current through the second switch element. The current comparator compares the switch current with a first reference current to generate a comparison signal. The controller controls the first switch element and the second switch element according to the comparison signal and a switch voltage at the switch node. The invention can avoid an excessive SMPS output current.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: February 19, 2019
    Assignee: MediaTek Inc.
    Inventors: Chih-Chen Li, Kuan-Yu Chu, Shan-Fong Hong
  • Patent number: 10090807
    Abstract: This disclosure provides isolation for a medical amplifier by providing a low impedance path for noise across an isolation barrier. The low impedance path can include a capacitive coupling between a patient ground, which is isolated from control circuitry, and a functional ground of an isolation system that is isolated from earth ground. The low impedance path can draw noise current from an input of an amplifier of patient circuitry.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: October 2, 2018
    Assignee: Cardioinsight Technologies, Inc.
    Inventors: Arkadiusz Biel, Harold Wodlinger, Richard M. Fine
  • Patent number: 9979353
    Abstract: Aspects of the present disclosure are generally directed to a power supply for generating an output supply voltage. The power supply generally includes a variable voltage supply configured to generate an intermediate supply voltage based on a reference signal, a correction circuit configured to generate an error signal based on the output supply voltage or the intermediate supply voltage, and a combiner configured to combine the intermediate supply voltage and the error signal to provide the output supply voltage.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: May 22, 2018
    Assignee: SnapTrack, Inc.
    Inventors: Martin Paul Wilson, Shane Flint
  • Patent number: 9930452
    Abstract: A system includes a class D amplifier and a current steering digital-to-analog converter (DAC) directly connected to the class D amplifier. The system also includes a common mode servo circuit coupled to a node interconnecting the current steering DAC to the class D amplifier. The common servo circuit amplifies a difference between a common mode signal determined from the node and a reference voltage and generates a feedback current to the node based on the amplified difference. A feed-forward common-mode compensation circuit is included to reduce an alternating current (AC) ripple from the class D amplifier. The feed-forward common-mode compensation circuit includes first and second resistors coupled to respective outputs of the class D amplifier. A current mirror is coupled to the first and second resistors and is configured to sink a current from the node to ground that approximates a common mode feedback current of the class D amplifier.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: March 27, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lars Risbo, Ryan Erik Lind, Jasjot Singh Chadha
  • Patent number: 9722546
    Abstract: A bias circuit for applying bias current to a low quiescent current amplifier includes first and second transistors and a transistor pair circuit. The first transistor is connected to a supply bias voltage source and an auxiliary bias voltage source, and is controlled by a bias voltage output from the auxiliary bias voltage source, the first transistor acting as a current source. The second transistor is connected to the supply bias voltage source and an output of the first transistor, and is controlled by the output of the first transistor to selectively buffer supply bias current from the supply bias voltage source provided to the low quiescent current amplifier via a bias resistor. The transistor pair circuit includes third and fourth transistors connected in series, one of the third and fourth transistors is also connected in parallel with a dividing resistor, the transistor pair circuit acting as a voltage source.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: August 1, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Jagadheswaran Rajendran, Yut Hoong Chow
  • Patent number: 9680426
    Abstract: A power amplifier is described. A power amplifier includes at least a first amplifier stage. The power amplifier also includes a first notch filter coupled with the first amplifier stage. The first notch filter is configured to tune to a first frequency. The first notch filter including at least one first set of metal oxide semiconductor variable capacitor arrays. Moreover, the power amplifier includes a first mirrored notch filter coupled with said first amplifier stage. The first mirror notch filter is configured to tune to the mirror of the first frequency. The first mirror notch filter including at least one second set of metal oxide semiconductor variable capacitor arrays.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: June 13, 2017
    Assignee: TDK Corporation
    Inventor: Chris Levesque
  • Patent number: 9648572
    Abstract: An apparatus for regulation of the signal power of a transmitter includes a control loop. The control loop includes a controlled module, a voltage detector, an evaluation circuit and an input amplification module. A decoupling module decouples the output of the control loop from a downstream electrical load.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: May 9, 2017
    Assignee: Intel Deutschland GmbH
    Inventor: André Hanke
  • Patent number: 9589916
    Abstract: A packaged RF power transistor includes an RF input lead, a DC gate bias lead, an RF power transistor comprising gate, source and drain terminals, and an input match network. The input match network includes a primary inductor electrically connected to the RF input lead, a secondary inductor electrically connected to the gate terminal and to the DC gate bias lead, and a tuning capacitor electrically connected to the RF input lead and physically disconnected from the gate terminal. The input match network is configured to block DC voltages between the RF input lead and the gate terminal and to propagate AC voltages in a defined frequency range from the RF input lead to the gate terminal. The tuning capacitor is configured to adjust a capacitance of the input match network based upon a variation in DC voltage applied to the RF input lead.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: March 7, 2017
    Assignee: Infineon Technologies AG
    Inventors: Marvin Marbell, E J Hashimoto, Bill Agar
  • Patent number: 9559640
    Abstract: A CMOS amplifier including electrostatic discharge (ESD) protection circuits is disclosed. In one embodiment, the CMOS amplifier may include a PMOS transistor, a NMOS transistor, primary protection diodes, and one or more auxiliary protection diodes to limit a voltage difference between terminals of the CMOS amplifier. In some embodiments, the auxiliary protection diodes may limit the voltage difference between an input terminal of the CMOS amplifier and a supply voltage, the input terminal of the CMOS amplifier and ground, and the input terminal and the output terminal of the CMOS amplifier.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: January 31, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Eugene Robert Worley, Dongling Pan, Li-Chung Chang
  • Patent number: 9406668
    Abstract: A power semiconductor element includes: a main transistor including a first gate electrode, a first drain electrode, and a first source electrode; a sensor transistor including a second gate electrode, a second drain electrode, and a second source electrode; and a gate switch transistor including a third gate electrode, and a third drain electrode, a third source electrode. The first gate electrode, the second gate electrode, and the third drain electrode are connected, the first drain electrode and the second drain electrode are connected, the first source electrode and the second source electrode are connected via a sensor resistor, the first source electrode and the third source electrode are connected, the second source electrode and the third gate electrode are connected via a switch resistor, and the main transistor, the sensor transistor, and the gate switch transistor are formed with a nitride semiconductor.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: August 2, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shuichi Nagai, Daisuke Ueda, Tatsuo Morita, Tetsuzo Ueda
  • Patent number: 9294038
    Abstract: Communications equipment including communications equipment for wireless communications may benefit from power amplifier transistors having stabilized characteristics. For example, certain power amplifier transistors may benefit from having their characteristics stabilized during bias switching. An apparatus can include a power amplifier device. The apparatus can also include a voltage or current input to the power amplifier device. An input voltage or current to the voltage or current input can be configured to be controlled according to scheduled transmission in a slot. The apparatus can also include a gate bias insertion circuit provided at the bias input. The gate bias insertion circuit can be configured to provide a reduced input voltage or current as a power amplifier bias. The reduced input voltage or current can be configured to correspond to a threshold of a transistor of the power amplifier when transmission is not scheduled in a slot.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: March 22, 2016
    Assignee: NOKIA SOLUTIONS AND NETWORKS OY
    Inventor: Darrell Barabash
  • Patent number: 9240760
    Abstract: A power amplifier module includes a first amplification transistor that amplifies and outputs a radio frequency signal, a second amplification transistor that is connected in parallel to the first amplification transistor and that has a smaller size than the first amplification transistor, a bias circuit that supplies a bias voltage or a bias current to the first and second amplification transistors, a current detector circuit that detects a current flowing in the second amplification transistor, and a bias control circuit that controls the bias voltage or the bias current supplied from the bias circuit to the first and second amplification transistors depending on the detection result of the current detector circuit.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: January 19, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuhiko Ishimoto, Takashi Soga
  • Patent number: 9106072
    Abstract: Exemplary embodiments are directed to providing electrostatic discharge (ESD) protection of a cascode device of an amplifier. In an exemplary embodiment, a transistor is configured to receive a bias voltage and at least one circuit element coupled to the transistor and configured to receive an input voltage via an input pad. Additionally at least one diode can be coupled to a drain of the first transistor and configured to limit a voltage potential at an internal node of the amplifier caused by the input pad.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: August 11, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Himanshu Khatri, Ojas M Choksi, Wei Zhuo
  • Patent number: 9070665
    Abstract: A high-voltage switch comprises one or more high-voltage transistors and a cooling substrate which may be manufactured from an electrically insulating material and on and/or through which a cooling medium can flow, wherein the one or more high-voltage transistors are mounted on at least one surface of the cooling substrate.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: June 30, 2015
    Assignee: Bergmann Messgeraete Entwicklung KG
    Inventor: Thorald Horst Bergmann
  • Patent number: 9041469
    Abstract: One or more embodiments of the present invention pertain to an all solid-state microwave power module. The module includes a plurality of solid-state amplifiers configured to amplify a signal using a low power stage, a medium power stage, and a high power stage. The module also includes a power conditioner configured to activate a voltage sequencer (e.g., bias controller) when power is received from a power source. The voltage sequencer is configured to sequentially apply voltage to a gate of each amplifier and sequentially apply voltage to a drain of each amplifier.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: May 26, 2015
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventors: Rainee N. Simons, Edwin G. Wintucky
  • Patent number: 9035701
    Abstract: This disclosure relates generally to radio frequency (RF) amplification devices and methods of limiting an RF signal current. Embodiments of the RF amplification device include an RF amplification circuit and a feedback circuit. The RF amplification circuit is configured to amplify an RF input signal so as to generate an amplified RF signal that provides an RF signal current with a current magnitude. The feedback circuit is used to limit the RF signal current. In particular, a thermal sense element in the feedback circuit is configured to generate a sense current, and thermal conduction from the RF amplification circuit sets a sense current level of the sense current as being indicative of the current magnitude of the RF signal current. To limit the RF signal current, the feedback circuit decreases the current magnitude of the RF signal current in response to the sense current level reaching a trigger current level.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: May 19, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Derek Schooley, Robert Bennett, James Leake, Pradeep Silva
  • Patent number: 8994454
    Abstract: According to embodiments of the present invention, an over-input signal may be limited to be within a range between adjustable upper limit voltage and lower limit voltage while suppressing deterioration of a noise figure. An amplifier circuit includes an input transistor; an input transistor; a resistor element having a first terminal connected to a gate of the input transistor and a second terminal connected to a bias voltage; and a protective circuit connected to the gate of the input transistor and limiting an input to the gate of the input transistor to be within a range between an upper limit voltage and lower limit voltage adjustable based on the bias voltage.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 31, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Tadamasa Murakami
  • Patent number: 8994455
    Abstract: There is provided a radio frequency amplifying apparatus having a protection voltage varying function, including a radio frequency amplifying unit amplifying a radio frequency signal, and a protection circuit unit connected between an output node of the radio frequency amplifying unit and a ground and limiting a voltage in the output node to a level of a preset protection voltage or less when the voltage in the output node is higher than the preset protection voltage, wherein the protection voltage is varied with a control signal.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: March 31, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Youn Suk Kim
  • Publication number: 20150084702
    Abstract: Embodiments of the present disclosure describe electrostatic discharge (ESD) circuitry and associated techniques and configurations. In one embodiment, ESD circuitry includes a first node coupled with a supply voltage node and a ground node, a first transistor coupled with the first node and the supply voltage node, a second transistor coupled with the first node and the ground node, a second node coupled with the first transistor and the second transistor, a third transistor coupled with the second node and a third node coupled with the third transistor, wherein a first time period to charge the first node is less than a second time period to discharge the third node. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Applicant: TriQuint Semiconductor, Inc.
    Inventor: Bruce J. Tesch
  • Publication number: 20150038092
    Abstract: Various implementations include circuits, devices and/or methods that provide open loop current limiting power amplifiers and the like. In some implementations, an open loop current clamp includes a trim module to provide a control value and a limiting source having respective input and output terminals. The input terminal is coupled to the trim module to receive the control value. The output terminal coupled to a control terminal of the first transistor to provide a limiting electrical level produced in response to the control value by the limiting source. The limiting electrical level substantially setting a first mode of operation for the first transistor such that the current draw of the first transistor is substantially determined by the first mode of operation and the limiting electrical level such that a voltage at an output terminal of the first transistor exerts reduced influence on the current draw.
    Type: Application
    Filed: July 7, 2014
    Publication date: February 5, 2015
    Inventors: Paul R. Andrys, David S. Ripley, Matt L. Banowetz, Kyle J. Miller
  • Patent number: RE47399
    Abstract: A power amplifier protection system to sense one or more operating conditions of a power amplifier and regulate the power of the input signal to the power amplifier as a response to one or more of the sensed operating conditions. This dynamic protection system may protect a power amplifier from failure by monitoring such operating conditions as power output and temperature and reducing the amplitude of the input signal if the power amplifier is operating beyond specified levels.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: May 21, 2019
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Stewart Sidney Taylor