Abstract: In one example embodiment, a current source is provided to limit noise and offset. In one embodiment, a source transistor is provided, with current sourced at the drain. A feedback network runs from the source node to the gate. The feedback network produces voltage gain by a transconductance, such as a transistor. Appropriate capacitors are also provided, and two pairs of switches are disposed to provide offset cancellation by toggling between gain and clamp modes in the switched capacitor architecture.

Abstract: A radio frequency (RF) power amplifier includes a low impedance pre-driver driving the input of a common-source output amplifier stage. The preamplifier includes a first transistor that has a first terminal coupled to a preamplifier RF input node, a second terminal coupled to a preamplifier RF output node, and a third terminal coupled to a supply voltage node. A first inductor is coupled between the RF output node and a bias voltage node. A voltage difference between respective first and second voltages on the RF input node and the RF output node that are substantially in phase, determines current through the first transistor.

Abstract: The embodiments of the present invention disclose a variable gain amplifier and relate to the field of electronic circuits. The linear-in-dB relationship between an output current and a control voltage of the variable gain amplifier is relatively ideal. The variable gain amplifier includes a fitted differential module group and an offset voltage output module, where the fitted differential module group is configured to output, under the control of a driving voltage and offset voltages, an output current of the variable gain amplifier according to a reference current; and the fitted differential module group includes n fitted differential modules, the n fitted differential modules are cascaded in turn, and n is any positive integer larger than 1.

Abstract: An amplifier includes an amplifying stage configured to provide an amplifier output signal based on a combination of a received amplifying stage input signal and a received amplified version of the amplifying stage input signal.

Abstract: A semiconductor power amplifier comprises an input-side amplifier for inputting and amplifying an input signal, a balanced amplifier which is connected to an output terminal of the input-side amplifier, comprises two hybrid couplers and a plurality of power amplifiers, passes the input signal, and converts a reflective wave into thermal energy, and an output-side amplifier which is connected to an output terminal of the balanced amplifier and amplifies an output signal.

Abstract: A buffer circuit includes a first transistor circuit having a first conductivity type transistor, a second transistor circuit having a second conductivity type transistors, in which the first and second transistor circuits are serially connected between a first fixed power supply and a second fixed power supply, and input terminals and output terminals of each of the first and second transistor circuits are connected in common respectively, in which at least one transistor circuit of the first transistor circuit and the second transistor circuit is a double gate transistor, and in which wherein a switch element, when any one transistor circuit of the first and the second transistor circuits is in an operating state, is included to supply a voltage of a third fixed power supply to a common connection node of the double gate transistor of the other transistor circuit.

Abstract: An amplifier includes an amplifier section having selectable signal paths to provide discrete gain settings, and logic to incrementally select the signal paths. The logic may be configured to increment the gain in response to digital gain control signals or an analog gain control signal. Another amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.

Abstract: Some embodiments provide an amplifier apparatus, comprising: a plurality of amplifier transistor circuits coupled in series, wherein each of the plurality of amplifier transistor circuits comprises: a transistor, wherein the transistors of the plurality of amplifier transistor circuits are coupled in series; a transistor voltage control and drive circuit coupled with the corresponding transistor, wherein the transistor voltage control and drive circuit is configured to control and drive the corresponding transistor in accordance with received control signals and in parallel with the other of the plurality of amplifier transistor circuits; and isolation circuitry that isolates control of the transistor from control of the other of the amplifier transistor circuits; wherein the plurality of amplifier transistor circuits are configured to be controlled and driven in parallel relative to the control signals.

Abstract: A low noise amplifier includes a first Group III-nitride based transistor and a second Group III-nitride based transistor coupled to the first Group III-nitride based transistor. The first Group III-nitride based transistor is configured to provide a first stage of amplification to an input signal, and the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal.

Abstract: A system including a power amplifier having a first gain, a preamplifier having a second gain, a first temperature sensor configured to sense the temperature of the power amplifier, and a bias generator. The first gain is a function of a temperature of the power amplifier. The preamplifier receives an input signal, amplifies the input signal according to the second gain, and outputs an amplified signal to the power amplifier. The bias generator generates a biasing signal to bias the preamplifier and adjusts the second gain of the preamplifier by adjusting the biasing signal based on the temperature of the power amplifier and an ambient temperature. The adjusted second gain of the preamplifier compensates a change in the first gain of the power amplifier due to a change in the temperature of the power amplifier.

Abstract: A high frequency amplifier circuit includes a first transistor that has a first terminal, a second terminal and a control terminal, the first terminal being grounded, a second transistor that has a first terminal, a second terminal and a control terminal, the control terminal of the second transistor being coupled to the second terminal of the first transistor, the first terminal of the second transistor being coupled to only the second terminal of the first transistor with respect to high frequency wave, the second terminal of the second transistor being coupled to a direct-current power supply, and a first resistor of which first terminal is coupled to a node between the second terminal of the first transistor and the control terminal of the second transistor, and of which second terminal is coupled to the first terminal of the second transistor.

Abstract: A high-frequency module including a power amplifying circuit includes a high-frequency power amplifying element, a matching circuit, and a driving power-supply circuit. The high-frequency power amplifying element includes a high-frequency amplifying circuit and a directional coupler. A first end of a main line of the directional coupler is connected to an output terminal of a latter-stage amplifying circuit of the high-frequency amplifying circuit. A second end of the main line of the directional coupler is connected through an output matching circuit to a high-frequency signal output terminal of the high-frequency power amplifying element. The output terminal of the latter-stage amplifying circuit is also connected to a second driving power-supply voltage application terminal of the high-frequency power amplifying element. The second driving power-supply voltage application terminal is connected to the high-frequency signal output terminal by a connecting conductor.

Abstract: Techniques for reducing distortion and improving linearity of amplifiers are described. In an exemplary design, an apparatus includes a driver amplifier, a variable matching circuit, and a power amplifier. The driver amplifier amplifies a first RF signal and provides a second RF signal. The variable matching circuit receives the second RF signal and provides a third RF signal. The power amplifier amplifies the third RF signal and provides a fourth RF signal. The variable matching circuit matches a fixed impedance at the output of the driver amplifier to a variable impedance at the input of the power amplifier in order to improve the linearity of the amplifiers. In an exemplary design, the power amplifier includes a first transistor (e.g., an NMOS transistor) of a first type, and the variable matching circuit includes a second transistor (e.g., a PMOS transistor) of a second type that is different from the first type.

Abstract: An amplitude shift keying (ASK) modulation amplifier circuit includes a first amplifier to which a high frequency signal and a modulating signal are supplied, and that is configured to perform an amplification of the high frequency signal and an ASK modulation, and a second amplifier to which an output of the first amplifier and the modulating signal are supplied, and that is configured to perform an amplification of the output signal from the first amplifier and an ASK modulation. In some configurations, an amplification gain of the second amplifier is set higher than an amplification gain of the first amplifier.

Abstract: Exemplary embodiments are directed to operating a multi-stage amplifier with low-voltage supply voltages. A multi-stage amplifier may include a first path of an amplifier output stage configured to convey an output signal if a first supply voltage is greater than a threshold voltage. The multi-stage amplifier may also include a second path of the amplifier output stage configured to convey the output signal if the first supply voltage is less than or equal to the threshold voltage.

Abstract: A comparator circuit for generating a signal representing a comparison of an input signal and a reference signal. In an embodiment, the comparator circuit includes a first stage and a second stage to provide respective signal amplification, where switch circuitry of the second stage switchedly couples respective elements of the first and second stages. The comparator circuit further includes a third stage to generate an output signal based on an intermediate signal of the second stage. In another embodiment, feedback circuitry of the comparator circuit is to selectively control a voltage of the output stage based on the output signal.

Abstract: Techniques for optimizing a cascade gain device comprising at least two gain stages are disclosed. A first noise figure associated with the first gain stage is incrementally increased by a plurality of noise figure increments determined based, at least in part, on a minimum noise figure and a maximum noise figure associated with the first gain stage. At each of the plurality of noise figure increments, at least a gain value that corresponds to the noise figure increment is calculated. One of the plurality of noise figure increments and the corresponding gain value is selected as an optimum noise figure of the first gain stage and an optimum gain value of the first gain stage respectively. Parameters of an inter-stage matching network associated with the first gain stage are configured based on the optimum noise figure and the optimum gain of the first gain stage.

Abstract: In one embodiment, an apparatus includes a first amplification block configured to receive a signal and a second amplification block configured to output the signal. The outputted signal is an amplified version of the signal. A circuit allows reuse of a second current flowing through the second amplification block by coupling the second current to pass through the first amplification block to increase a first current that flows through the first amplification block. Amplification of the signal is based on the increased first current that flows through the first amplification block.

Abstract: An amplifier for use in a buoyant cable antenna operable to receive signals within a frequency band includes: a first amplifier operable to provide amplified signals based on the received signals; a bandpass filter arranged to pass filtered signals within a first portion of the frequency band, the filtered signals being based on the amplified signals; an attenuator arranged in parallel with said bandpass filter and operable to attenuate signals within a second portion of the frequency band, the attenuated signals being based on the amplified signals; and a second amplifier operable to provide an amplified output including first amplified signals within the first portion of the frequency band and to provide second amplified signals within the second portion of the frequency band. The first amplified signals have a first gain, the second amplified signals have a second gain, and the first gain is more than the second gain.

Abstract: A power amplifier is provided which is capable of performing efficient amplification in a wider transmission signal power range than conventional power amplifiers. The power amplifier for amplifying and outputting an input signal includes first to N-th amplifiers (N is an integer of two or more) which are cascaded. A Doherty amplifier is used in circuit configuration of each of the first to N-th amplifiers. At least one of the first to (N?1)-th amplifiers has a different power ratio from that of the N-th amplifier.

Abstract: A power amplifier circuit uses an output transistor and a cascode transistor. First and second drive circuits apply gate control signals to the two transistors, which rise and fall in synchronism, and this is such that the voltage drop across the cascode transistor is reduced (compared to a constant gate voltage being applied to the output transistor).

Abstract: A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other.

Abstract: A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor.

Abstract: The invention provides an amplifier circuit. In one embodiment, the amplifier circuit includes a first class-AB amplifier and a second class-AB amplifier. The first class-AB amplifier amplifies an input signal to generate the first output signal. The second class-AB amplifier amplifies the first output signal to generate a final output signal on an output node. When the power of the input signal is greater than a threshold level, the second class-AB amplifier is in a turned-off state during a turned-on duration period of the first class-AB amplifier, and the first class-AB amplifier is in a turned-off state during a turned-on duration period of the second-class AB amplifier.

Abstract: The present invention includes a class-E power amplifier, comprising a driver stage (DS) including a first power amplifier with transistors, to which an input signal is inputted; a main stage (MS), including a second power amplifier with transistors, whose input is connected to the output of the DS; and a first LC resonator whose one end is connected to the output of the DS and the other end to the ground as an AC equivalent circuit and a second LC resonator whose one end is connected to the input of the MS and the other end to the ground as an AC equivalent circuit. In accordance with the present invention, as the voltage stress is reduced on the CMOS class-E power amplifier, the application of the high power supply voltage may be allowed and therefore the load impedance may be high while the same efficiency is maintained.

Abstract: A power amplifier includes an input terminal into which an input signal is input; a first amplification element amplifying the input signal; a second amplification element amplifying an output signal of the first amplification element; an output terminal from which an output signal of the second amplification element is output; a first matching circuit connected between an output of the second amplification element and the output terminal; a first switch connected between an output of the first amplification element and an input of the second amplification element; a second switch having a first end connected to the output of the first amplification element, and a second end; and a second matching circuit having a first end connected to the second end of the second switch, and a second end directly connected to the output of the second amplification element.

Abstract: A method of sharing inductors for inductive peaking of an amplifier includes calculating a single stage inductance of a single stage for inductive peaking in order to have a stable impulse response. The method further includes determining a number of stages for shared inductance for inductive peaking. The method further includes sharing at least two inductors having the shared inductance among the determined number of stages for inductive peaking.

Abstract: A voltage amplifier is provided that includes a first row and a second row each having a respective first or second plurality of capacitors arranged collinearly. First row capacitors comprise first terminals and second row capacitors comprise second terminals. The first row and second row are parallel to each other along longitudinal and lateral axes. A third row has a first plurality of diodes and a fourth row has a second plurality of diodes, each row positioned cross-wise to the first row and located above the first and second rows along the vertical axis. The first diodes are positioned parallel to each other along the longitudinal and lateral axes, and the second diodes are parallel to each other along the longitudinal and lateral axes and positioned cross-wise to and above the first plurality along the vertical axis. Diodes and capacitors are directly and physically connected using respective electrical leads.

Abstract: The present disclosure describes a distributed amplifier (DA) that includes active device cells within sections that are configured to provide an input gate termination that is conducive for relatively low noise and high linearity operation. A section adjacent to an output of the DA is configured to effectively terminate the impedance of an input transmission line of the DA. Each active device cell includes transistors coupled in a cascode configuration that thermally distributes a junction temperature among the transistors. In this manner, noise generated by a common source transistor of the cascode configuration is minimized. The transistors coupled in the cascode configuration may be fabricated using gallium nitride (GaN) technology to reduce physical size of the DA and to further reduce noise.

Abstract: A method for processing signals may include, in a conditionally-stable operational amplifier, shifting the gain curve of the conditionally-stable operational amplifier to a desired position, by buffering at least one output signal from at least one transconductance module within the conditionally-stable operational amplifier using a buffer. The desired position of the gain curve may be associated with a desired feedback factor. The shifting of the gain may take place without shifting a corresponding phase. The tuning of the buffer may be based on the desired position of the gain curve which is derived from feedback factor value(s) specified by an application. A phase corresponding to the desired position of the gain curve at 0 dB frequency may be greater than a threshold phase. The buffering may be tuned using at least one tunable wideband buffer so that the corresponding phase at 0 dB frequency remains higher than the threshold phase.

Abstract: Embodiments of power amplification devices are described that include a power amplification circuit, a first voltage regulation circuit, and a second voltage regulation circuit. The voltage regulation circuits are configured to provide regulated voltages to the power amplification circuit. The power amplification device also includes a threshold detection circuit to get better maximum output power performance while preserving power efficiency. The threshold detection circuit is configured to increase a voltage adjustment gain of the first voltage regulation circuit when a regulated voltage level of regulated voltage from the second voltage regulation circuit reaches a threshold voltage level. In this manner, the voltage adjustment gain can be increased when the second voltage regulation circuit is close to or has railed.

Abstract: An amplifier with a non-linear current mirror comprises an amplification stage having an input terminal for an input signal as well as an output stage coupled to the amplification stage by a current mirror stage. The current mirror stage comprises at least one mirror transistor coupled to the amplification stage and at least one output transistor coupled to the output stage. The amplifier comprises two variable resistive elements, each of them connected in series to one of the mirror transistor and the output transistor. A tuning stage is adapted to tune the variable resistive elements in response to the input signal.

Abstract: A multi-input differential amplifier with dynamic transconductance compensation is disclosed. The multi-input differential amplifier includes an input stage, an output stage and a transconductance compensation circuit. The input stage includes a plurality of differential input pairs, which includes a first differential input pair, a second differential input pair, a third differential input pair and a fourth differential input pair, for generating a pair of differential signals according to a first input signal, a second input signal, a third input signal, a fourth input signal, and an output signal. The output stage is utilized to generate the output signal in response to the pair of differential signals. The transconductance compensation circuit is coupled between the first and the second differential input pair, for compensating a first transconductance of the first differential input pair and a second transconductance of the second differential input pair.

Abstract: A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.

Abstract: Power amplifier (PA), regardless of the process used for the manufacturing of its devices, suffers from a nonlinear output capacitance that has significant impact on various aspects of the PA performance. This output capacitance is dependent on the large output voltage swing. Accordingly a compensation capacitance is added at the output of the PA that has a behavior that is inverse respective of the output voltage of that of the output capacitance of the PA. Connecting the compensation capacitor in parallel to the PA output capacitance, results in a total capacitance that is the sum of the output capacitance and its compensation capacitance. The total output capacitance is therefore essentially stable throughout the output voltage swing.

Abstract: A power amplifier (PA) using switched-bulk biasing to minimize the risk of output stage snapback effect is disclosed. An adaptive biasing of the output stage prevents device breakdown while accommodating large voltage swings. These protection techniques can be applied to all types of cascode configurations of a PA, including single-ended, differential, quadrature, segmented and any combination thereto.

Abstract: Disclosed is a high-frequency signal processing device capable of reducing transmission power variation and harmonic distortion. For example, the high-frequency signal processing device includes a pre-driver circuit, which operates within a saturation region, and a final stage driver circuit, which operates within a linear region and performs a linear amplification operation by using an inductor having a high Q-value. The pre-driver circuit suppresses the amplitude level variation of a signal directly modulated, for instance, by a voltage-controlled oscillator circuit. Harmonic distortion components (2HD and 3HD), which may be generated by the pre-driver circuit, are reduced, for instance, by the inductor of the final stage driver circuit.

Abstract: A method of sharing inductors for inductive peaking of an amplifier having at least two stages includes calculating a single stage inductance of a single stage of the at least two stages for inductive peaking in order to have a stable impulse response. A shared inductance is calculated for inductive peaking by dividing the single stage inductance by a number of stages of the at least two stages. At least two inductors having the shared inductance are shared among the at least two stages for inductive peaking.

Abstract: The subject matter discloses a flash analog to digital converter arranged in a tree of signal amendment units, each comprises an amplifier and an offset adder. The output signals of the tree are even partitioned and compared to comparators, to reduce the level of accuracy required from the comparators. The subject matter also discloses a cascade of amplifiers connected in series and operate in delay one relative to the other, each amplifier comprises a reset unit to reset the amplifier responsive to receipt of a signal.

Abstract: A semiconductor device for transmitting-signal amplification which has a fine resolution, a high dynamic range, a small occupied area, and low power consumption, is realized. An input signal amplitude is reduced every one half by a ladder network, and a transconductance amplifier stage is arranged corresponding to each node of the ladder network. An output of the transconductance amplifier stage is coupled to an output signal line in common. According to a control word WC<21:0>, the transconductance amplifier stage is enabled selectively, and the output current which appears in the output signal line is added.

Abstract: Embodiments provide a multi-stage radio frequency (RF) power amplifier (PA) having a low dynamic error vector magnitude (EVM). A first stage of the RF PA may include a first active device configured to receive an enable signal and to turn on in response to the enable signal, thereby activating the first stage. The RF PA may further include a second active device coupled in series with the first active device and configured to receive a main supply voltage. The second active device may provide a first supply voltage across the first active device that is less than and independent of the main supply voltage. One of the first active device or the second active device may be configured to receive an RF input signal and to pass an amplified RF output signal to a second stage of the RF PA circuit.

Abstract: A power amplifier includes first and second amplification stages. The first amplification stage is configured to amplify a radio frequency (RF) input signal. The second amplification stage includes at least one transistor configured to amplify an output of the first amplification stage, the second amplification stage being configured to have a capacitance between a gate of the at least one transistor and a first power supply voltage. The capacitance automatically varies with amplitude of the output of the first amplification stage.

Abstract: A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in which an amplifier circuit is formed and a second semiconductor chip in which a control circuit for controlling the amplifier circuit is formed. A bonding pad over the second semiconductor chip is connected with a bonding pad over the first semiconductor chip directly by a wire without using a relay pad. In this regard, the bonding pad formed over the first semiconductor chip is not square but rectangular (oblong).

Abstract: The present invention is directed to a folded cascode amplifier with an enhanced slew rate, which includes a folded cascode amplifying circuit, a first input circuit and a second input circuit. The second input circuit has an electricity type opposite to that of the first input circuit. The first input circuit is connected, via its driving nodes, to the folded cascode amplifying circuit, and the second input circuit is connected, via its driving nodes, to crossover nodes of the first input circuit.

Abstract: Methods and apparatus to control power in a printer are disclosed. An example apparatus includes a first field effect transistor having a first terminal, a second terminal, and a third terminal, the second terminal coupled with a first voltage input. The example apparatus further includes a second field effect transistor having a fourth terminal, a fifth terminal, and a sixth terminal, the fourth terminal coupled with the first terminal of the first field effect transistor, the fifth terminal coupled with a second voltage input. The example apparatus further includes a first comparator having a first input coupled to the first input voltage, having a second input coupled to the second input voltage, and having an output coupled with the third terminal.

Abstract: An operational amplifier can include a plurality of amplifiers connected to form a plurality of amplification paths extending from an input terminal to an output terminal of the operational amplifier. An amplifier in one of the amplification paths can include an intrinsic amplification-transistor capacitance connected between a first amplifier input and a first amplifier output, and a cross-coupling capacitor connected between the first amplifier input and a second amplifier output. A plurality of the amplification paths can include series-connected amplifiers connected in parallel with the cross-coupled amplifier. The cross-coupling capacitor can have a capacitance value selected as a function of the intrinsic capacitance and a gain experienced between the amplifier inputs and outputs. The operational amplifier can include an AC coupling capacitor connected in series with the cross-coupled amplifier. The operational amplifier can be arranged in feedback configuration.

Abstract: Embodiments of power amplification devices are described with a power amplification circuit that has more than one amplifier stage and with at least a first voltage regulation circuit and a second voltage regulation circuit configured that provide regulated voltages to these amplifier stages. The power amplification device includes a threshold detection circuit to get better maximum output power performance while preserving power efficiency. The threshold detection circuit is configured to increase a first voltage adjustment gain of the first voltage regulation circuit when a regulated voltage level of a second voltage regulation circuit reaches a first threshold voltage level. In this manner, the first voltage adjustment gain can be initially set to be lower than the second voltage adjustment gain until the second voltage regulation circuit is close or has railed. The first voltage adjustment gain can then be increased to allow the first voltage regulation circuit to also rail.

Abstract: An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal.

Abstract: An electronic circuit includes: first through third transistors having a control terminal, first and second terminals; a first direct current path supplying a direct current having passed through between the first terminal and the second terminal of at least one of the second transistor and the third transistor to the second terminal of the transistor at former position compared to the transistor through which the direct current passed; a second direct current path that is different from the first direct current path and supplies a direct current having passed through between the first terminal and the second terminal of at least one of the second transistor and the third transistor to the second terminal of the transistor at former position compared to the transistor through which the direct current passed; and a common coupling point coupling the first direct current path and the second direct current path in common.

Abstract: The invention provides an amplifier circuit. In one embodiment, the amplifier circuit includes a first class-AB amplifier and a second class-AB amplifier. The first class-AB amplifier amplifies an input signal to generate the first output signal. The second class-AB amplifier amplifies the first output signal to generate a final output signal on an output node. When the power of the input signal is greater than a threshold level, the second class-AB amplifier is in a turned-off state during a turned-on duration period of the first class-AB amplifier, and the first class-AB amplifier is in a turned-off state during a turned-on duration period of the second-class AB amplifier.