With Capacitive Structure Patents (Class 330/67)
  • Patent number: 9270233
    Abstract: Radio Frequency (RF) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed RF amplifier circuits employ various concepts for reducing an overall circuit inductance or enabling an increase in capacitance for a given circuit size.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: February 23, 2016
    Assignee: Samba Holdco Netherlands B.V.
    Inventors: Gerard Jean-Louis Bouisse, Xavier Moronval
  • Patent number: 9257946
    Abstract: Radio Frequency (RF) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed RF amplifier circuits may employ a baseband decoupling network connected in parallel with a low-pass RF matching network of the amplifier circuit.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: February 9, 2016
    Inventors: Gerard Jean-Louis Bouisse, Jean-Jacques Bouny
  • Publication number: 20140104004
    Abstract: Radio Frequency (RF) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed RF amplifier circuits may employ a baseband decoupling network connected in parallel with a low-pass RF matching network of the amplifier circuit.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 17, 2014
    Applicant: NXP B.V.
    Inventors: Gerard Jean-Louis Bouisse, Jean-Jacques Bouny
  • Patent number: 8559650
    Abstract: A circuit apparatus and a method for detecting an earphone in a portable terminal are provided. The apparatus includes an earjack, a first switch, a second switch, a comparator, and a main chip. The earjack outputs a signal informing whether an earphone is inserted, provides a signal input from a third pole of the inserted earphone to the first switch, and provides a signal input from a fourth pole to the second switch. The first switch outputs a signal provided from the earjack to one of a comparator and a ground depending on an input control signal. The second switch outputs a signal provided from the earjack to one of the comparator and the ground depending on the input control signal. The comparator compares a voltage of a signal provided from one of the first switch and the second switch with a reference voltage to output a signal representing a comparison result.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: October 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Woo Seo
  • Patent number: 8452025
    Abstract: A power supply circuit including a voltage regulator and a headphone driving circuit employing the same are disclosed. In accordance with the present invention, the power supply circuit may provide stable power supply to the amplifier since the power supply circuit generates the constant voltage +Vreg and the constant voltage ?Vreg from +VDD robust to stronger than a power noise, and the balanced signal path for isolating the noise of the input signal to be amplified is not required, thereby simplifying the constitution of the circuit.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: May 28, 2013
    Assignee: Neofidelity, Inc.
    Inventors: Yeongha Choi, Jin Ho Oh, Min Soo Kim, Jae-Hee Won
  • Patent number: 7986184
    Abstract: A variety of circuits, methods and devices are implemented for radiofrequency amplifiers. According to one such implementation, a radiofrequency amplifier circuit is implemented in a SMD package. The circuit amplifies a radiofrequency signal having a base-band portion and a plurality of carrier signals frequency-spaced larger than the base-band bandwidth. The circuit includes a radiofrequency transistor connected to a circuit output having a parasitic output capacitance. The source-drain terminal is electrically connected to the circuit output. An internal shunt inductor provides compensation for the parasitic output capacitance. A high-density capacitor is connected between the internal shunt inductor and a circuit ground. The high-density capacitor has a terminal with a surface area can be at least ten times that of a corresponding planar surface.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: July 26, 2011
    Assignee: NXP B.V.
    Inventors: Willem Frederick Adrianus Besling, Theodorus Wilhelmus Bakker, Yann Lamy, Jinesh Kochupurackal, Fred Roozeboom
  • Patent number: 7961470
    Abstract: An RF power amplifier including a single piece heat sink and an RF power transistor die mounted directly onto the heat sink.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: June 14, 2011
    Assignee: Infineon Technologies AG
    Inventors: Henrik Hoyer, Donald Fowlkes, Bradley Griswold
  • Patent number: 7911271
    Abstract: A hybrid broadband power amplifier module design is disclosed. In a power amplifier design, low impedance transmission lines are typically needed at the input and output of the transistor to match for its optimum source and load impedance. The peripheral of the GaN (Gallium Nitride) transistor is very small due to the high power density of the GaN transistor. The transmission line, for example a microstrip line, needs to be very wide to achieve low impedance on ceramic substrates such as Alumina. The dimensional mismatch from the low impedance transmission line to the transistor causes additional parasitic effect to the matching networks and limits the bandwidth of the amplifier. Capacitor materials are typically very high in dielectric constant; hence a single layer capacitor with small dimensions equalizes to a low impedance transmission line. Selected capacitors with proper dimensions can be used as the low impedance transmission lines in the matching networks.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: March 22, 2011
    Inventor: Pengcheng Jia
  • Patent number: 7683871
    Abstract: A display control device of the present invention includes a gamma circuit producing and outputting a gray scale voltage and a selection drive circuit selecting the gray scale voltage on the basis of a pixel data displayed on a display device and outputting the selected gray scale voltage as a pixel driving signal to the display device. The selection drive circuit includes an analog memory and holds the selected gray scale voltage in the analog memory.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: March 23, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Fumihiko Kato
  • Patent number: 7342443
    Abstract: An operational amplifier for canceling an offset and continuously generating an output signal. The operational amplifier includes a first operational amplification unit and a second operational amplification unit each having at least one electrical characteristic that is substantially the same as one another. One of the operational amplification units performs a canceling operation (holding operation and compensation operation) of the offset voltage while the other operational amplification unit performs a non-canceling operation and generates the output voltage by amplifying an input voltage. Both operational amplification units alternately perform the canceling operation and the non-canceling operation.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: March 11, 2008
    Assignee: Fujitsu Limited
    Inventor: Eiji Nishimori
  • Patent number: 7330180
    Abstract: A video signal line driving circuit includes, for each output terminal TSj, a unit precharge circuit made of a capacitor Cpr and switches SWA1, SWA2, SWB1 and SWB2 for connecting the capacitor Cpr in parallel to a capacitive load of a liquid crystal panel. An OFF period in which first and second output buffers are electrically disconnected from the video signal line is provided between a P period in which a positive voltage is to be applied from the first output buffer in the video signal line driving circuit to the video signal lines (capacitive load) and an N period in which a negative voltage is to be applied from the second output buffer. A first and a second precharge period are set within this OFF period.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: February 12, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Ken Inada
  • Patent number: 7119613
    Abstract: A RF amplifier device (22) including an amplifier element (24) compensated by a compensating circuit (26, 28) with respect to its output capacitance and frequency decoupled from its power supply (26), wherein the decoupling circuit is directly connected to the compensating circuit (26, 28) and a RF amplifier device including an amplifier element (56, 80) and a compensating circuit comprising an internal shunt inductor having a compensating inductance (58, 60, 62) and a compensating capacitance (64, 92) and arranged in parallel to a terminal of the amplifier element (56, 80) to compensate a terminal capacitance of the amplifier element (56, 80), and a decoupling and power supply lead (76, 98) which is connected to the compensating capacitance (64, 92) and/or a decoupling circuit (100) and/or a combination of the compensating capacitance and the decoupling circuit (130) and a module thereof and a method for decoupling the mentioned RF amplifier device.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: October 10, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Theodorus Wilhelmus Bakker
  • Patent number: 7084708
    Abstract: A high-frequency amplification device includes a high-frequency amplifier including input and output sections, a first capacitor including first and second electrodes, and a first insulation film interposed therebetween. The first electrode is connected to the output section via a first inductor, and the second electrode is grounded. The amplification device further comprises a second capacitor including third and fourth electrodes and a second insulation film interposed therebetween. The third electrode is formed of a material substantially identical to that of the first electrode, and the fourth electrode is formed of a material substantially identical to that of the second electrode. The second insulation film is formed of a material substantially identical to that of the first insulation film and has a thickness substantially identical to that of the first insulation film.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: August 1, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Sugiura, Makoto Shibamiya, Yasuhiko Kuriyama, Toru Sugiyama, Yoshikazu Tanabe
  • Patent number: 6806773
    Abstract: Voltage regulators use capacitors to compensate the voltage regulator and provide stable performance. Capacitors have an inherent equivalent series resistance (ESR) that changes over various operating conditions including signal frequency, operating temperature as well as others. An apparatus and method compensates for the low ESR of capacitors to increase the total equivalent series resistance of the capacitor. By providing an “on-chip” resistance between the capacitor and the circuit ground potential, minimum total ESR can be provided such that stable load regulation is achieved with capacitors that would otherwise be undesirable for such use. Increasing the value of the output capacitor's equivalent series resistance allows wider ranging values of capacitance to be used. The increased range of capacitance values allows capacitors of different material types to be used.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: October 19, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Aaron Grant Simmons, Robert Eric Fesler
  • Patent number: 6473314
    Abstract: A low cost radio frequency interference filter assembly comprises a multiple layer structure including a middle trace layer disposed between an upper ground layer and lower ground layer. Non-conductive insulation layers are disposed between the middle trace layer and the upper and lower ground layers. The upper layer includes input contacts, signal contacts, and capacitors which are coupled to the signal contacts and an upper grounded substrate. The middle trace layer includes a grounded substrate and trace lines which are coupled to the signal contacts of the upper layer by signal vias. The lower layer includes a grounded substrate. Ground vias are formed through the insulation layers to couple the middle grounded substrate to the upper and lower grounded substrates. The filter assembly may be formed as an integral projection of a printed circuit board assembly.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: October 29, 2002
    Assignee: Powerwave Technologies, Inc.
    Inventors: James Keith Custer, Pauline Mei-Seung Tong
  • Publication number: 20020135340
    Abstract: A constant voltage source includes a constant voltage supplying circuit including an operational amplifier for supplying an output voltage to a load and a feedback circuit for feeding back the output voltage to the operational amplifier; a first inductance unit disposed between the constant voltage supplying circuit and the load; and a first bypass capacitor of which one terminal is coupled between the first inductance unit and the load and the other terminal is coupled to a constant voltage unit.
    Type: Application
    Filed: January 2, 2002
    Publication date: September 26, 2002
    Inventor: Yoshihiro Hashimoto
  • Patent number: 6429745
    Abstract: In conventional cases, when connecting a capacitor having a low equivalent series resistance (ESR) to an output terminal of a semiconductor device as a phase compensation capacitor, an external resistor connected in series therewith is required. A semiconductor device of the present invention comprises a resistor that is formed within the semiconductor device and of which one end is connected to the output terminal for compensating for a low ESR component, and a capacitor connection terminal to which another end of the resistor is connected. The resistor thus arranged compensates for the low ESR component of a low-ESR capacitor that is connected externally to the capacitor connection terminal.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: August 6, 2002
    Assignee: Rohm Co., Ltd.
    Inventor: Yoshiyuki Hojo
  • Patent number: 6181200
    Abstract: An radio frequency (RF)/microwave power amplification circuit is disclosed herein having improved power and frequency characteristics. The RF power circuit is characterized by having the output capacitance of the device resonate with a shunt inductance that is physically closer to the device than provided in conventional RF power circuits. This is realized by mounting a direct current (DC) bypass capacitor directly on the same metalized pad that the device terminal is mounted on. By doing this, the inductance associated with a wire bond connection from the device to the capacitor is eliminated or at least reduced. Also disclosed is a dual cell power circuit that consists of matching the impedance characteristics of the active cells to each other by adjusting the circuit parameters in which the active devices interact with.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: January 30, 2001
    Assignee: Integra Technologies, Inc.
    Inventors: John H. Titizian, Jeffrey A. Burger, Young H. Kim
  • Patent number: 6133787
    Abstract: A method and apparatus for controlling the common mode impedance misbalance of an isolated single-ended circuit for all common mode paths, thereby allowing the balancing of the common mode impedances which reduces common mode effects while maintaining the advantages of the single-ended amplifier including circuit simplicity and the reference input connected to circuit ground. In one embodiment, two solid shields enclose the circuit as completely as possible with the inner shield connected to circuit ground which is also the reference for all other inputs to the circuit. A discrete capacitor is connected between the outer shield and each of the non-reference inputs. When the shield is complete, i.e., solid, almost solid with minimal holes or a fine mesh, the value of the discrete capacitor is selected to match the parasitic capacitance formed between the outer shield and the inner shield. In another embodiment, the shield may be incomplete, i.e.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: October 17, 2000
    Assignee: Physio-Control Manufacturing Corporation
    Inventors: Daniel Yerkovich, Douglas K. Medema, Randall J. Makela
  • Patent number: 5751555
    Abstract: An electronic component with reduced capacitance includes a substrate (12) with an interconnect line (14), an additional substrate (11) with an interconnect line (13) wherein the substrate (12) overlies the additional substrate (11), an electronic device (15) overlying the substrate (12) and electrically coupled to the interconnect line (14) of the substrate (12), and an additional electronic device (17) having a lead (23) and an additional lead (26) wherein the lead (23) overlies the substrate (12) and is electrically coupled to the interconnect line (14) of the substrate (12) and wherein the additional lead (26) overlies the additional substrate (11) and is electrically coupled to the interconnect line (13) of the additional substrate (11).
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: May 12, 1998
    Assignee: Motorola, Inc.
    Inventors: Henry L. Pfizenmayer, Frederick C. Wernett, III
  • Patent number: 5352991
    Abstract: A power amplifier assembly that dissipates a maximum of one thousand one hundred watts includes a power amplifier circuit and a chassis that has an overall volume of 0.02 cubic meters. The chassis includes a heat sink base that contains a mounting pattern for the power amplifier circuit. By thermally coupling the power amplifier circuit to the heat sink base via thermal coupling devices and the mounting pattern, the heat sink base dissipates a maximum of one thousand one hundred watts in a volume of 0.016 cubic meters.
    Type: Grant
    Filed: August 12, 1993
    Date of Patent: October 4, 1994
    Assignee: Motorola, Inc.
    Inventors: Jeffrey S. Lipschultz, John N. Lubbe, Marc H. Pullman