Abstract: A receiver (400; 500) comprising an amplifier (406; 506) having an input (408) and an output (410). The input (408) of the amplifier is configured to receive a signal. The receiver also comprises a feedback path (412; 512) between the output (410) and the input (408) of the amplifier (406; 506), wherein the feedback path (412; 512) includes a filter (402; 502) and a buffer amplifier (414; 514) in series. The input of the buffer amplifier (414; 514) is connected to the output (410; 510) of the amplifier (406; 506). The output of the buffer amplifier (414; 514) is connected to the input of the filter (402; 502). The output of the filter (402; 502) is connected to the input (408; 508) of the amplifier (406; 506). The filter (402; 502) is configured to pass signals having a desired frequency.

Abstract: A radio-frequency amplifier includes a common gate amplification stage configured to be biased in a saturation condition with a first current and configured to receive an input signal as a gate-source voltage and to generate an output voltage as an amplified replica of the input signal. A feedback transistor is configured to be biased in a saturation condition with a second current and coupled to the common gate amplification stage so as to have a gate-drain voltage corresponding to a difference between the output voltage and the input signal.

Abstract: An amplifier system can include a feedback amplifier circuit having an amplifier, a feedback capacitor connected between an input terminal and an output terminal of the amplifier by at least one first switch, and a reset capacitor connected across the feedback capacitor by at least one second switch and between a pair of reference voltages by at least one third switch. During an input-signal processing phase of operation, a control circuit may close the at least one first switch and open the at least one second switch to electrically connect the feedback capacitor between the input and output terminals to engage feedback processing by the feedback amplifier circuit, and close the third switch to electrically connect the reset capacitor between the first and second voltages to charge the reset capacitor to a selectable voltage difference.

Abstract: Constant and accurate signal gain systems based on controlling signal amplifier gain level by applying the signal amplifier output signal to a signal level divider with a set ratio. The output signal of the signal level divider is applied to one input of the gain control amplifier, which is a differential amplifier, while the signal amplifier input signal is applied to the other input. The gain control amplifier output level is used to control the gain level of the signal amplifier. The gain control amplifier output level forces by negative feedback the gain control amplifier input levels to be substantially equal thus maintaining the signal amplifier gain level substantially constant.

Abstract: A power circuit includes a memory power circuit and a central processing unit (CPU) power circuit. The memory power circuit includes a first operational amplifier and a first switch. The CPU power circuit includes a second operational amplifier and a second switch. The memory power circuit supplies power to a memory slot. The CPU power circuit supplies power to a CPU.

Abstract: A transceiver includes a harmonic termination circuit that receives a tunable harmonic voltage from a power amplifier control. The harmonic termination circuit includes a variable capacitor that is capable of adjusting its capacitance in response to the tunable harmonic termination voltage to achieve at least two modes of operation. The at least two modes of operation may be EDGE mode and GSM mode. In this embodiment, the harmonic termination circuit allows for linearity specifications of EDGE to be met, while not degrading the efficiency of the transceiver when operating in GSM mode. In one embodiment, the harmonic termination circuit further includes an inductive element in series with the variable capacitor.

Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.

Abstract: An amplifier arrangement has an amplifier (3) with a signal input (31), a feedback input (32) and a signal output (33). A first coupling path (FB1), which has a first impedance element (R1), connects the feedback input (32) to the signal output (33). A second coupling path (FB2) has a filter device (4), a buffer circuit (5) and a second impedance element (R2) connected in series, and connects the feedback input (32) to the signal output (33) or to the signal input (31).

Abstract: A differential signal generator circuit includes: a first amplifier for comparing an input signal with a threshold voltage and outputting differential signals; and a second amplifier for adjusting the threshold voltage in response to the differential signals. The second amplifier includes: a first transistor and a second transistor forming a differential pair, the gate of each transistor receiving a respective one of the differential signals; a third transistor and a fourth transistor forming a current mirror, the third transistor being connected between the drain of the first transistor and a reference potential point, the fourth transistor being connected between the drain of the second transistor and the reference potential point; a current source connected to the sources of the first and second transistors; and an adjusting section for adjusting drain current of the first transistor in response to an externally applied current or voltage.

Abstract: A circuit arrangement for wirelessly exchanging data with a reader device, including an antenna for converting electromagnetic radiation into an antenna voltage, an analogue circuit for demodulating an information signal based on the antenna voltage, and a digital circuit for processing of the information signal and for receiving power from the analogue circuit. The circuit arrangement also includes a decoupling circuit, which is interconnected between the analogue circuit and the digital circuit and provides a decoupling of both circuits.

Abstract: An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor.

Abstract: A data transmitting circuit includes a reflection suppressive component generating circuit for generating a reflection suppressive component for suppressing the reflection caused by the discontinuity in the characteristic impedance on a transmission line, and a data output circuit for amplifying the reflection suppressive component and the data to be currently transmitted to a receiving side and outputting them to the transmission line.

Abstract: The invention relates to a transimpedance amplifier circuit for converting an input current into an output voltage Uout?, comprising an amplifier element (4) having at least one signal input and an output having the output voltage Uout. For this purpose, the transimpedance amplifier circuit has a T-shaped feedback network divided into at least a first branch (1), a second branch (2) and a third branch (3), which is connected in series with the first branch (1), thus producing a node (K). The first branch (1) has a non-reactive resistance (R1) and is connected to the output at one end and the node (K) at the other end. The second branch (2) has at least one capacitance C2 and is connected to the node (K) at one end and in particular to an earth at the other end, and the third branch (3) has at least one capacitance C3 and is connected to the node (K) at one end and to the signal input at the other end. As a result, a capacitive current division is effected at the node (K).

Abstract: According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.

Abstract: An electronic system providing a video signal to an output terminal intended to be connected to a receiver having one input impedance out of two input impedances, the electronic system including an adaptable amplifier providing the video signal and capable of operating according to one operation configuration out of two operation configurations, each operation configuration being adapted to one of the two input impedances of the receiver; circuitry for detecting characteristic portions of the video signal; and control and measurement circuitry capable of measuring a signal representative of the current provided to the output terminal by the electronic system during each detected characteristic portion, and of having the adaptable amplifier adopt one of the two operation configurations based on the comparison of the representative measured signal with thresholds.

Abstract: An adaptive feedback estimation and cancellation (AFEC) apparatus includes: a controller for generating and outputting control information by using a synchronization signal from an external synchronization acquisition unit and base station information, in order to remove a feedback signal that exists in a forward/reverse repeater signal to be repeated and then send the forward/reverse repeater signal; a first feedback prediction canceller for adaptively removing a feedback signal that exists in the forward repeater signal based on the control information from the controller and automatically adjusting the gain of the forward repeater signal; and a second feedback prediction canceller for adaptively removing a feedback signal that exists in the reverse repeater signal based on the control information from the controller and automatically controlling the gain of the reverse repeater signal.

Abstract: An amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.

Abstract: A signal conditioning circuit dynamically adjusts a compression ratio, so as to compress a signal and avoid limiting to the extent possible, thereby avoiding distorting the signal by clipping. An input signal is applied to the input of a programmed gain amplifier (PGA) or other amplifier whose gain can be controlled by a gain control signal. The input or the output of the PGA is sampled by a level detector to produce a level signal that represents the level of the signal. A variable source produces a variable threshold signal. A comparator compares the level signal to the variable threshold signal to produce a difference signal. Control logic generates the gain control signal from the difference signal. When the level signal exceeds the threshold signal, the control logic alters the gain control signal to reduce the gain of the PGA, and when the level signal is less than the threshold signal, the control logic alters the gain control signal to increase the gain of the PGA.

Abstract: The invention teaches an amplifier (100) with an input signal (IN) coupled to the gate of a second transistor (Q2) and an output signal (OUT) coupled to an output node between a third resistor (R3) and the drain of the second transistor (Q2). A third transistor (Q3) is coupled in parallel between the output node and the gate of a second transistor (Q2). A first bias signal (Vbias) is coupled to the output node and the gate of the third transistor (Q3). The amplifier preferably also includes a plurality of switchable resistors coupled to the output node to adjust the output for process variations. The invention also describes a method of compensating for process variations in an output of an amplifier which comprises producing a reference signal dependent on the difference between a reference value and an actual value and switching one or more resistors into the output of the amplifier to adjust the output of the amplifier to reflect the process variations.

Abstract: The variable gain amplifier includes a forward path that provides the amplifier variable gain, and a feedback path. The feedback path uses a switch that is turned on at low gain levels. The switch taps into the feedback resistor, shunting it to signal-ground and eliminating the feedback mechanism. This ensures that the input impedance seen at the input port does not grow excessively, using part of the feedback resistor as a passive termination at low gain levels. In this way variable gain ranges in excess of 30 dB can be achieved.

Abstract: An amplifier circuit block and a compensation circuit block are provided. The amplifier circuit block includes an analog adder for subtracting an output signal of the compensation circuit block from an input signal and an amplifier circuit operating in a wide band. The compensation circuit block includes an amplifier circuit with a low offset voltage and a low noise in a low frequency region, an analog adder block for subtracting an output signal of the amplifier circuit from an output signal of the amplifier circuit and generating a differential signal thereof, and a feedback circuit block for negatively feeding back the differential signal to the analog adder. The amplifier circuit block can reduce the offset voltage and the low-band noise by the negative feedback of the differential signal, and at the same time, the operation band of the entire amplifier circuit can be decided by the characteristic of the amplifier circuit.

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: A radio frequency (RF) receiver device comprises a receiver system that receives an analog radio frequency signal and downconverts the analog radio frequency signal to a downconverted analog signal, the receiver system further including a peak signal detector configured to determine a peak signal level of the downconverted analog signal, and an automatic gain control adjustment element configured to determine whether the peak signal level falls within a predetermined range, and configured to generate, in the RF receiver, a gain control signal controlling the gain of at least one analog component based on whether the peak signal level falls within the predetermined range.

Abstract: An amplifier is described which amplifies an input signal according to a defined amplification factor, and which generates an output signal. To reduce an offset fraction of the output signal the amplifier comprises a feedback path which has lowpass characteristics and which returns the output signal in a lowpass-filtered state to an input of the amplifier. The feedback path comprises an amplifier stage as well as at least one Miller capacitance connected between an input and an output of the amplifier stage.

Abstract: An amplifier system with feedback current cancellation comprises an amplifier with at least one stage, a feedback network, first and second replica circuits, a buffer, second and third resistances, an operational amplifier (op-amp), a transistor, and a current mirror. The feedback network includes a first resistance that communicates with an input and an output of the amplifier. The first and second replica circuits approximately replicate DC characteristics of the output and the input of the amplifier, respectively. An output of the op-amp communicates with a control terminal of the transistor. The current mirror provides a current at the input of the amplifier that is proportional to a second current flowing through the transistor. The buffer communicates with the first replica circuit. The second resistance communicates with an output of the buffer. The third resistance communicates with the second resistance and with the second replica circuit.

Abstract: An amplifier system with feedback current cancellation comprises an amplifier, a feedback network, an operational amplifier (op-amp), and second, third, and fourth resistances. The amplifier includes an input, an output, and at least one stage. The feedback network includes a first resistance that communicates with the input and the output of the amplifier. The operational amplifier (op-amp) includes an inverting input that communicates with the input of the amplifier, a non-inverting input, and an output. The second resistance communicates with the input of the amplifier and with the output of the op-amp. The third resistance communicates with the output of the op-amp and with the non-inverting input of the op-amp. The fourth resistance communicates with the non-inverting input of the op-amp and with the output of the amplifier.

Abstract: A linear transimpedance amplifier includes a forward transimpedance circuit that receives an input signal from an optical device. The forward transimpedance circuit generates a linear output signal. The forward transimpedance circuit includes a first gain path and a second gain path, the first gain path configured to amplify the input signal when the first gain path is at a lower input impedance relative to the second gain path and the second gain path configured to amplify the input signal when the second gain path is at a lower input impedance relative to the first gain path. A feedback circuit includes a first circuit that detects a low frequency component of the output signal.

Abstract: A variable gain frequency multiplier comprises a multiplier circuit and a control circuit configured to receive a power control signal, the power control signal being proportional to a power output signal.

Abstract: A signal conditioning circuit dynamically adjusts a compression ratio, so as to compress a signal and avoid limiting to the extent possible, thereby avoiding distorting the signal by clipping. An input signal is applied to the input of a programmed gain amplifier (PGA) or other amplifier whose gain can be controlled by a gain control signal. The input or the output of the PGA is sampled by a level detector to produce a level signal that represents the level of the signal. A variable source produces a variable threshold signal. A comparator compares the level signal to the variable threshold signal to produce a difference signal. Control logic generates the gain control signal from the difference signal. When the level signal exceeds the threshold signal, the control logic alters the gain control signal to reduce the gain of the PGA, and when the level signal is less than the threshold signal, the control logic alters the gain control signal to increase the gain of the PGA.

Abstract: A single chip GSM/EDGE transceiver comprises a fully differential receive chain, a subharmonic mixer in the receive chain, the subharmonic mixer configured to receive a radio frequency (RF) input signal and a local oscillator (LO) signal that is phase-shifted by a nominal 45 degrees, and a synthesizer having a voltage controlled oscillator and having at least one frequency divider to generate desired transmit and receive LO signals. The transceiver also comprises a transmitter having a closed power control loop, and a harmonic rejection modulator, the use thereof made possible by a frequency plan designed to allow the synthesizer to develop the transmit and receive LO signals without a frequency multiplier.

Abstract: An amplifier circuit block and a compensation circuit block are provided. The amplifier circuit block includes an analog adder for subtracting an output signal of the compensation circuit block from an input signal and an amplifier circuit operating in a wide band. The compensation circuit block includes an amplifier circuit with a low offset voltage and a low noise in a low frequency region, an analog adder block for subtracting an output signal of the amplifier circuit from an output signal of the amplifier circuit and generating a differential signal thereof, and a feedback circuit block for negatively feeding back the differential signal to the analog adder. The amplifier circuit block can reduce the offset voltage and the low-band noise by the negative feedback of the differential signal, and at the same time, the operation band of the entire amplifier circuit can be decided by the characteristic of the amplifier circuit.

Abstract: Provided is a detector for automatic gain control (AGC). The detector for AGC is used for a variable gain amplifier (VGA) including at least one VGA cell.

Abstract: Embodiments related to resistive feedback amplifiers are presented herein.

Abstract: A system and method for acquisition and conditioning of a signal received from a light sensor generating an input signal in proportion to a sensed amount of light, the system utilizing an operational amplifier with first and second feedback loops to render the output signal of a control circuit, part of the second feedback loop, in proportional relationship to the input signal across the range of output signals from the light sensor.

Abstract: An amplifier has an input stage amplifying circuit, an output stage amplifying circuit, and a negative feedback circuit. The input stage amplifying circuit differential-amplifies a first input voltage inputted to a positive phase input node and a second input voltage inputted to an opposite phase input node, and outputs from a positive phase output node. The output stage amplifying circuit amplifies output voltage from a node and outputs it from an output terminal, and generates the second input voltage corresponding to output voltage and feedback-inputs it to the opposite phase input node. The negative feedback circuit has a first PMOS for a current source whose output current fluctuates due to output voltage of the positive phase output node, and a differential amplifying section to which the output current of the first PMOS is supplied and which is formed from a second and third PMOS which differential-amplify the first input voltage and the second input voltage.

Abstract: Various embodiments comprise apparatus, methods, and systems that include an amplification apparatus comprising a first input, a second input, and an output, a first plurality of series-connected transistors including a first transistor having a first channel ratio and a first gate coupled to the first input, and a second plurality of series-connected transistors including a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the second input.

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: According to one or more aspects of the present invention, an amplifier arrangement is disclosed. The arrangement comprises a first, a second and a third amplifier. The first and second amplifiers are coupled to one another such that they form a negative feedback loop. In addition, an output node of the first amplifier is connected to a signal input of the third amplifier. An output node of the third amplifier circuit forms the amplifier output of the amplifier arrangement. In addition, the third amplifier circuit is designed for switchably changing its gain on the basis of a signal at an actuating input of the amplifier arrangement.

Abstract: A method and apparatus provides an input structure for a power amplifier. In one example, the input structure has an input network and a predriver circuit to provide an input signal to the power amplifier. The input network includes a transformer for helping to maintain a constant input impedance. The predriver includes a limiting amplifier that provides isolation between the power amplifier and the RF input. A DC feedback circuit is used by the predriver that maintains the DC level of the inverters to a desired level.

Abstract: In a balanced output circuit, an input signal inputted thereto is provided as a first output signal thereof on one hand, and on the other hand the input signal is inputted to an inverting amplification circuit and is compared with a comparison voltage before the signal is outputted as a second output signal. Based on the comparison of the first and second output signals, the comparison voltage is controlled by a charging voltage of a capacitor such that the DC voltage of the second output signal is equalized to that of the first output signal. Thus, the DC offset voltage between the first output signal (non-inverted output signal) and the second output signal (inverted output signal) can be properly annihilated by a simple circuit.

Abstract: An amplifier system with feedback current cancellation comprises an amplifier, a feedback network, first and second unity-gain buffers, a second resistance, and a current mirror. The amplifier includes an input, an output, and at least one stage. The feedback network includes a first resistance having one end that communicates with the input of the amplifier and an opposite end that communicates with the output of the amplifier. The first and second buffers each include an input and an output. The inputs of the first and second buffers communicate with the output and the input of the amplifier, respectively. The second resistance communicates with the outputs of the first and second buffers. The current mirror provides a current at the input of the amplifier that is proportional to a second current flowing through the second resistance.

Abstract: A circuit having multiple overlapped feedback loops for DC offset cancellation is provided with applying in one of multistage amplifier, multistage filter, and the combination thereof. The circuit includes a plurality of negative feedback variable bandwidth switches coupled to each stage of the above mentioned multistage devices, the output of the last stage is coupled to an input of a low-pass filter loop. The circuit includes a plurality of variable gain amplifiers, output of each variable gain amplifier is coupled to the series contact of each stage respectively, and input of each variable gain amplifier is thereof coupled to an output of the low-pass filter loop. Therefore, the circuit achieves to cancel the DC offset for multistage overlapped feedback path with less area and low power consumption.

Abstract: A transistor biasing circuit is shown that utilizes a negative feedback loop control circuit to set the gate bias voltage in the output transistors of a power amplifier. This control circuit has a current sensor in series with the drain of the transistor, the current sensor output in turn feeding a dc signal into a dc amplifier, and the output of the dc amplifier driving a gate bias integrator which forms a dc control loop for maintaining the bias point. The output transistor is protected from excessive temperature and/or excessive power dissipation.

Abstract: A method (200) and radio frequency amplifier circuit (100) for adjusting a gain setting of a power amplifier (102) and a gain setting of a power amplifier driver (106) that form part of the radio frequency amplifier circuit (100). The method (200) includes selecting (220) a power output value for the power amplifier and an associated constant envelope modulated radio frequency signal supplied by the power amplifier driver (106) to the power amplifier (102) and then sensing variations (240) in a power output value of the power amplifier (102). Next there is performed adjusting (250) both the gain setting of the power amplifier (102) and adjusting the gain setting of the power amplifier driver (106) in response to the sensing so that the constant envelope modulated signal is within a linear operating region of the power amplifier (102). The gain settings of the power amplifier (102) and power amplifier driver (106) are concurrently adjusted until the power output value for the power amplifier is achieved.

Abstract: A Gigabit/s transimpedance amplifier system includes a forward-path amplifier section with a very large bandwidth and an overall frequency-selective feedback section which is active only from DC to low frequencies. The forward-path of the amplifier comprises a regulated cascode for receiving the input signal, a regulated cascode for receiving the feedback signal, a single-ended to differential converter and an output buffer. Stability and frequency selection is achieved by a bandwidth-limited operational amplifier in the feedback path. The Miller multiplication of a capacitive means in the operational amplifier creates a low-frequency pole and stabilizes the feedback loop and thereby limits the frequency range of the feedback.

Abstract: A low noise amplifier (LNA) is discussed. In implementations, a LNA may include a feedback section coupled to a transistor. The feedback section may have a resistive portion including a buffer and a resistor. A capacitor may be connected in parallel with the resistor. In additional implementations, an integrated circuit may include a second transistor connected to the drain of the first transistor. A feedback section may be coupled across the first and second transistors. The feedback section may include a buffer, a resistor and a capacitor connected in series, so that the terminal of the buffer is connected to the drain of the second transistor while the terminal of the resistor is connected to a source on the first transistor.

Abstract: The variable gain amplifier includes a forward path that provides the amplifier variable gain, and a feedback path. The feedback path uses a switch that is turned on at low gain levels. The switch taps into the feedback resistor, shunting it to signal-ground and eliminating the feedback mechanism. This ensures that the input impedance seen at the input port does not grow excessively, using part of the feedback resistor as a passive termination at low gain levels. In this way variable gain ranges in excess of 30 dB can be achieved.

Abstract: An interpolated variable gain amplifier (VGA) utilizes multiple active feedback cells. The active feedback cells may be implemented as transconductance (gm) cells that replicate gm cells in the interpolated input stages.

Abstract: An amplifier system with feedback current cancellation comprises an amplifier having at least one stage, a feedback network, first and second replica circuits, first and second unity-gain buffers, a second resistance, and a current mirror. The feedback network includes a first resistance that communicates with an input and an output of the amplifier. The first and second replica circuits approximately replicate the DC characteristics of the output and the input of the amplifier, respectively. Inputs of the first and second buffers communicate with the first and second replica circuits, respectively. The second resistance communicates with outputs of the first and second buffers. The current mirror provides a current at the input of the amplifier that is proportional to a second current flowing through the second resistance.

Abstract: The present invention provides an amplifier circuit comprising a differential amplifier and a negative feedback loop circuit, in which a positive feedback loop circuit having a gain smaller than a gain of the negative feedback loop circuit is formed inside the negative feedback loop circuit.