Abstract: A frequency synthesizer and a frequency synthesis method thereof are provided. The frequency synthesizer includes a phase-locked loop unit, a voltage-controlled oscillating unit, and a frequency mixing unit. The phase-locked loop unit receives a reference signal and a feedback injection signal and generates a first oscillating signal according to the reference signal and the feedback injection signal. The voltage-controlled oscillating unit receives the feedback injection signal and generates a second oscillating signal according to the feedback injection signal. The frequency mixing unit is coupled to the phase-locked loop unit and the voltage-controlled oscillating unit, receives the first oscillating signal and the second oscillating signal, and mixes the first oscillating signal and the second oscillating signal to generate the feedback injection signal and an output signal.

Abstract: A system and technique for providing to flexible, programmable frequency estimators and spectrum analyzers that can operate over extremely large bandwidths and yet provide high spectral resolution are described. The acquisition time and hardware complexity of one technique scale as O(N), where N denotes the number of frequency bins acquired. Embodiments are disclosed in which architectures are implemented using exponentially-tapered transmission lines and filter cascades.

Abstract: The present invention relates to a digital offset phase-locked loop (DOPLL), which may have advantages of size, simplicity, performance, design portability, or any combination thereof, compared to analog-based phase-locked loops (PLLs). The DOPLL may include a digital controlled oscillator (DCO), which provides a controllable frequency output signal based on a digital control signal, a radio frequency (RF) mixer circuit, which provides a reduced-frequency feedback signal based on the controllable frequency output signal without reducing loop gain, a time-to-digital converter (TDC), which provides a digital feedback signal that is a time representation of the reduced-frequency feedback signal, and digital PLL circuitry, which provides the digital control signal based on the digital feedback signal and a digital setpoint signal.

Abstract: A frequency synthesizing apparatus and method for a multi-band radio frequency (RF) receiver is provided. The frequency synthesizing apparatus includes a simple circuit configuration with a single SSB mixer and thus, may synthesize six high frequency signals. Signals to be inputted into the SSB mixer include a first signal and a second signal. The first signal is generated based on a VCO and a PPF. Also, the second signal is selected from a plurality of frequency divided signals which are generated by dividing a signal generated in the VCO via a plurality of dividers.

Abstract: A method is provided for configuring a microcontroller clock system that includes a main oscillator, a phase locked loop, and a backup oscillator. According to the method, the main oscillator and the backup oscillator are activated in reset mode. A clock signal is generated from the backup oscillator, and the clock signal that is generated is applied to the microcontroller in order to start the microcontroller. Also provided are a clock system for a microcontroller, and a microcontroller including a clock system.

Abstract: The embodiments of the present invention provide a configurable homodyne/heterodyne RF receiver including first and second mixers. The configurable homodyne/heterodyne RF receiver functions as a homodyne receiver when the first and second mixers are configured to operate in parallel, and as a heterodyne receiver when the first and second mixers are configured to operate in series. The embodiments of the present invention further provides an RFID reader employing the configurable homodyne/heterodyne RF receiver to facilitate a listen-before-talk function.

Abstract: A phase locked loop (PLL) frequency synthesizer to produce a local oscillator signal for a transmitter for operation at a plurality of RF frequency bands that are disparate. The transmitter has an intermediate frequency that is a sizable fraction of the bandwidth of one or more of the RF bands. The transmitter includes at least one RF upconverter, each having a local oscillator input coupled to the frequency synthesizer.

Abstract: The clock signal output device has a crystal oscillator for generating a reference clock signal and generating and outputting an output clock signal having a prescribed frequency on the basis of the reference clock signal. The device also has an atomic oscillator for generating a clock signal having higher precision than a crystal oscillator, an intermittent time management unit for intermittently driving the atomic oscillator, and a correction unit for receiving correction data for correcting the offset amount of the output clock signal on the basis of a clock signal each time the atomic oscillator is driven, and correcting the output clock signal on the basis of the correction data.

Abstract: A frequency synthesizer for mixing reference frequencies using at least one control signal has a local oscillator, frequency dividers for dividing a frequency generated from the local oscillator and generating at least one control signal, and a single side band (SSB) mixer for mixing the reference frequencies, using the frequency generated from the local oscillator and the control signal. The frequency synthesizer has a simplified structure, and can easily mix reference frequency signals without a need for additional power.

Abstract: The present invention relates generally to communications, and more specifically to a method and apparatus for generating local oscillator signals used for up- and down-conversion of RF (radio frequency) signals. A major problem in the design of modulators and demodulators, if the leakage of local oscillator (LO) signals into the received signal path. The invention presents a number of highly integratable circuits which resolve the LO leakage problem, using regenerative divider circuits acting on oscillator signals which are running at a multiple or fraction of the frequency of the desired LO signal, to generate in-phase (I) and quadrature (Q) mixing signals. Embodiments of these circuits also use harmonic subtraction and polyphase mixers, as well as virtual local oscillator TM (VLO) mixing signals. VLO mixing signals are signal pairs which emulate local oscillator signals by means of complementary mono-tonal and multi-tonal mixing signals.

Abstract: A local oscillator (LO) circuit is disclosed which provides improved isolation between the unselected LO source and a mixer. The LO circuit includes a first LO source to generate a first periodic signal cycling at a first frequency, a second LO source to generate a second periodic signal cycling at a second frequency different than the first frequency, a limiter, a first switching element to selectively couple the first LO source to the limiter, and a second switching element to selectively couple the second LO source to the limiter. The limiter improves the isolation of the leakage LO signal (i.e. the unselected LO signal) with respect to the selected LO signal. The improved isolation comes about because the limiter gain associated with the selected LO signal is greater than the gain associated with the leakage LO signal. A receiver and transmitter using the LO circuit are also disclosed.

Abstract: A phase lock loop circuit includes an oscillator, a digital mixer, a comparator, a loop amplifier, and a low-pass filter. The oscillator has an oscillation frequency controlled by a control voltage. The digital mixer is constituted by a digital element to output a difference frequency signal between an oscillation output from the oscillator and an input mixing signal. The comparator compares at least the phase of the difference frequency signal output from the digital mixer with that of a reference frequency signal, and outputs a difference signal. The loop amplifier and the low-pass filter generate the control voltage for the voltage controlled oscillator on the basis of the difference signal output from the comparator.

Abstract: An VCO generates a high-frequency signal based on a modulating signal and a phase-locking control signal. A first distributor separates the high-frequency signal into two parts, one of which is outputted as an oscillator output signal. An n-multiplier and a microwave amplifier for n-multiplication adjust the level of the reference signal while the frequency of it is multiplied by `n`. A second distributor separates the output from the microwave amplifier for n-multiplication into two parts, one of which is made to be a comparative signal, the other is made to be a locally oscillated signal. A frequency mixer and a microwave amplifier for frequency mixing produce an intermediate frequency signal using the other output from the first distributor and the locally generated signal. The phase comparator compares the intermediate frequency signal with the comparative signal to output an error signal. An LPF generates the phase-locking control signal by removing unwanted signals from the error signal.

Abstract: A frequency synthesis system for generating microwaves which includes a main loop with a low gain electronically tunable voltage controlled oscillator (VCO) covering the entire desired frequency bandwidth, and a secondary loop including a direct synthesis section in which frequencies are synthesized directly from a quartz reference which also controls the stability of the oscillator and an indirect synthesis section with a high gain oscillator.

Abstract: A scanning-superhetrodyne ESM receiver having a VCO for a local oscillator which is linearized and temperature compensated. A stable combline oscillator is used to generate known frequency signals which are frequency converted to an intermediate frequency (IF) using the local oscillator and frequency converter (mixer). The frequency of each combine signal is measured and a table of known voltage/frequency points is generated. The table is input to a Cubic Spline program which computes the coefficients for the best-fit third order polynomial for each pair of data points. When a particular local oscillator frequency is desired, the corresponding tune voltage is computed by solving the polynomial equation for the given frequency range. By repeating the calibration on a periodic, or an "as needed" basis, temperature compensation is achieved.

Abstract: A device for the control of a phase-locked loop with frequency changing comprises an oscillator (10), a mixer (20) of signals, and a phase/frequency detector (40). The control device comprises a frequency comparator (60) to compare the frequency Fv of the signal given by the oscillator and the transposition frequency Fx, and an inhibiting circuit (70) sensitive to the frequency comparator and interposed between the mixer and the phase/frequency detector to block the beat frequency Fv-Fx at input of the phase/frequency detector. The disclosed device can be used to release the loop automatically during major changes in the loop control frequency F.

Abstract: An oscillator circuit is coupled to receive first and second reference signals and includes a voltage-controlled oscillator for generating an oscillating signal. A difference frequency calculation circuit is coupled to the voltage-controlled oscillator to produce a count signal corresponding to a difference in frequency between the oscillating signal and the first reference signal. A feedback circuit is coupled to the difference frequency calculation circuit and coupled to receive the second reference signal which corresponds to a predetermined frequency for the oscillating signal. The feedback circuit provides a control signal as an input to the voltage-controlled oscillator to control the frequency of the oscillating signal.

Abstract: An improved mixed down synthesizer scheme 10 having a first phase locked loop 12 and a second phase locked loop 14 provides a first frequency and a second frequency respectively. The first phase locked loop 12 has at least a first programmably tunable filter 30 and a mixer 28. The second phase locked loop 14 has an output received by the mixer 28 in the first phase locked loop 12. A controlling means (18 and 20) controls the first and second frequencies and tunes the first programmably tunable filter 30. The first and the second phase locked loops 12 and 14 are programmed to maintain a constant frequency ratio between the first and second frequencies in order to maintain a minimum frequency offset from the mixed-in spurious products.

Abstract: An improved microwave frequency signal source using a single frequency offset technique which increases the frequency range of an indirect frequency synthesizer to twice the highest operating frequency of the programmable digital frequency divider in the loop includes a voltage-controlled oscillator (VCO) operating within a predetermined microwave frequency band and phase-locked to a reference oscillator operating at a reference frequency below microwave frequencies. The offset loop signal is developed by heterodyning the voltage-controlled oscillator (VCO) output signal with a microwave signal whose frequency is located at the center of the predetermined microwave frequency band of the VCO to form a signal at an intermediate frequency (I.F.) within the frequency range of a programmable digital frequency divider.

Abstract: A wide deviation tracking filter is provided which has the input signal to be tracked applied to a low frequency phase-locked loop circuit which performs coarse filtering of the phase noise on the input signal. A digital phase shifter is connected in series in the low frequency phase-locked loop and produces a pair of quadrature clock signals which are at the frequency of the input signal and at half the frequency of the output of the voltage control oscillator of the low frequency phase-locked loop. The pair of quadrature signals are connected to an image reject circuit. The image reject circuit is connected in series in the loop of a high frequency phase-locked loop which operates at a much higher frequency than the low frequency phase-locked loop and performs the function of further filtering the phase noise on the input signal to provide an output signal having ultra-low phase noise.

Abstract: A frequency stable RF oscillator 10 comprises a variable frequency RF source in the form of a microwave cavity 24 having a Gunn diode 26 and a varactor 28 mounted therein, and produces an RF output frequency f.sub.o. The output of a frequency stable reference oscillator 14 having a frequency f.sub.r is impressed upon the RF source. Through self-mixing action of the Gunn diode, an IF whose frequency is f.sub.IF =.vertline.nf.sub.r -f.sub.o .vertline. is generated, n being a high harmonic number. The IF is detected by an IF amplifier 18 which forms part of a frequency lock loop controlling the frequency of the RF source.

Abstract: A multi-channel frequency synthesizer, including a crystal oscillator circuit that may be selectively operated to provide a reference signal at a selected reference frequency that is one of a given plural number of frequencies; an IF generator for processing the reference signal to provide an IF signal at a selected intermediate frequency that is one of a given plural number of submultiples of the selected reference frequency; a comb generator for processing the reference signal to provide a comb of signals separated from each other by the selected reference frequency; and a phase-locked loop.

Abstract: An automatic frequency control system includes a frequency measuring unit (IFM), which produces a frequency quantity representing the frequency of its input signal, and a controllable-frequency signal generator (VCO), which produces an output signal whose frequency depends on a control signal supplied to its control input. In a normal mode of operation, IFM derives its input signal from an external source connected to an input terminal (T), and the system derives from the frequency quantity produced by IFM, a control signal for VCO, using a predetermined transfer characteristic, so that the output frequency of VCO is dependent on the frequency of the input signal to IFM, being, for example, equal to the frequency of the signal at T.

Abstract: A phase locked loop synthesizer including a phase locked loop (PLL) having a first characteristic loop bandwidth, for generating a synthesized signal, the PLL including a signal controlled oscillator (SCO) having first and second control inputs for controlling the frequency of the SCO, the first control input receiving a signal from the PLL, and a subsidiary frequency compression loop (FCL) having a second characteristic bandwidth wider than said first characteristic bandwidth, the FCL having an output coupled to the second control input of the SCO whereby said SCO is subject to frequency control by both the PLL and the FCL.

Abstract: A chrominance subcarrier regeneration network having high stability, the network being adapted for use in a video tape recorder and including a phase detector for comparing the phase of a gated subcarrier burst of a video signal with that of a subcarrier regenerated signal to develop an error signal; a voltage controlled oscillator driven by the error signal to develop a corrected signal at a frequency substantially below that of the subcarrier burst; and a crystal oscillator, mixer and filter for translating the frequency and filtering the corrected signal to develop the regenerated signal.

Abstract: This disclosure describes a continuous tuning arrangement for a variable frequency response circuit of the type covering a relatively wide frequency range. Many techniques for accommodating a wide frequency range are known and include synthesizers, waveform generators and so on which employ various coarse tuning controls or devices for band selection. A synthesizer is described which employs a continuous tuning means enabling one to continuously tune the circuit from a first frequency to a second frequency or from said second frequency to said first in a rapid manner, whereby continuous tuning is afforded without the necessity of returning the tuning control to a start position each time a new frequency is selected by the coarse tuning control.

Abstract: A network analyzer is provided with an electronically variable phase shifter in the IF portion of the reference channel, and the phase shifter is connected to sweeping signal generator (sweeper) driving the device under test. As the output frequency of the sweeper changes, the control signal to the phase shifter changes the phase shift in the IF portion of the reference channel, compensating for phase differences between the test and reference signals due to different line lengths in the two signal paths. The electronically variable phase shifter may comprise a linear phase shifter such as a phase lock loop along with a frequency multiplier and down converter to multiply the phase shift produced by the phase shifter.

Abstract: A low noise frequency source utilizes a varactor diode to form a parametric crystal oscillator which may be frequency multiplied to the desired microwave frequency, for radar applications.

Abstract: Linear accuracy of the output-signal frequency of a scanning oscillator is aintained through monitoring the location in a shift register of a pulse whose position is indicative of the frequency error from a desired scanning oscillator output-signal frequency.