Adjustable Frequency Patents (Class 331/48)
  • Patent number: 7952438
    Abstract: An injection locking clock generator can vary the free running frequency of an injection locking oscillator to broaden an operating frequency range of an oscillation signal injected to itself, thereby performing an injection locking with respect to all frequencies of an operating frequency range. The clock generator includes a main oscillator configured to generate oscillation signals of a frequency corresponding to a control voltage, and an injection locking oscillator configured to generate division signals synchronized with the oscillation signals by dividing the oscillation signals, wherein a free running frequency of the injection locking oscillator is set according to the frequency of the oscillation signals.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: May 31, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Taek-Sang Song, Kyung-Hoon Kim, Dae-Han Kwon
  • Patent number: 7898344
    Abstract: In a multi-radar system, configured comprising a plurality of radar units which generate and output signals the frequency of which increases and decreases periodically, each radar unit generates and outputs signals synchronized with a prescribed sync signal, such that the upper limit and lower limit of the periodically increasing and decreasing frequency is different for the signals of each radar unit, and moreover the timing of the upper limit and lower limit of the signals substantially coincide. By this means, the frequency intervals between signals can be reduced, and more channels can be set, without causing radio wave interference.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: March 1, 2011
    Assignee: Fujitsu Limited
    Inventor: Hironobu Hongo
  • Patent number: 7868705
    Abstract: In a high-frequency oscillator, a first resonance circuit and a second resonance circuit are respectively connected to a first amplifier circuit and a second amplifier circuit. A selection circuit includes a first switch circuit and a second switch circuit which selectively operate one of the first amplifier circuit and the second amplifier circuit. A grounded capacitor is connected to output sides of the first amplifier circuit and the second amplifier circuit. The grounded capacitor is commonly used by both the first amplifier circuit and the second amplifier circuit. An auxiliary grounded capacitor is connected between the first switch circuit and the first amplifier circuit. Accordingly, the grounded capacitor and the auxiliary grounded capacitor are connected to each other in parallel only when the first amplifier circuit is activated.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: January 11, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tomohide Aramata
  • Publication number: 20100308924
    Abstract: A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 9, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Rajagopalan Rangarajan, Chinmaya Mishra, Maulin Bhagat, Zhang Jin
  • Patent number: 7812679
    Abstract: A frequency generation unit (FGU) 100 includes a plurality of selectable voltage controlled oscillators (110) whose output frequencies are chosen in relationship with a predetermined intermediate frequency (IF) and frequency divider value (M) to provide multi-band frequency generation capability in a single communication device. A programmable reference divider (104), phase detector (174) and programmable charge pump (106) take an incoming reference frequency (120) and generate a charge pump output (124) to optimize the in-band phase noise in the FGU 100. A fixed loop filter (108) filters the charge pump output (124) to generate a control voltage (126) for the selectable VCOs (110). The desired frequency band is selected and enabled using control logic (128).
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 12, 2010
    Assignee: Motorola, Inc.
    Inventor: Armando J. Gonzalez
  • Patent number: 7808327
    Abstract: Methods and systems to provide digitally controlled crystal oscillators are disclosed. One example method includes determining a state of an oscillator system and selecting a first output of a digitally controlled crystal oscillator or a second output of a second oscillator based on the determination. In an example implementation, the second oscillator is a ring oscillator.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: October 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Gennady Feygin, Khurram Muhammad, Chih-Ming Hung, Meng-Chang Lee
  • Patent number: 7791423
    Abstract: The present invention relates to a two-frequency switchover type crystal oscillator in which first and second IC chips and first and second crystal resonators are connected to wiring patterns of a circuit substrate to form first and second oscillation circuits, and the first and second oscillation circuits are selectively operated in accordance with a selection mechanism; a two-frequency switchover type crystal oscillator in which surfaces opposite to circuit function surfaces of the first and second IC chips are connected to form a two-stage structure; IC terminals of the circuit function surface of the first IC chip are directly connected both electrically and mechanically to the wiring patterns; and IC terminals of the circuit function surface of the second IC chip are connected electrically by wire bonding to the wiring patterns; wherein those wiring patterns of the wiring patterns that are connected to power source, output, and ground terminals of the first and second IC chips are connected in common wit
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: September 7, 2010
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Makoto Watanabe
  • Patent number: 7782145
    Abstract: Aspects of a method and system for frequency tuning based on characterization of an oscillator are provided. In this regard, a frequency of an oscillator in an integrated circuit may be controlled based on a first digital control word, a frequency of a tuned circuit may be controlled based on a second digital control word, and the second control word may be determined utilizing a mapping between the first control word and the second control word. The frequency of the oscillator and the tuned circuit may be controlled by adjusting a capacitance of the oscillator and tuned circuit, respectively. The mapping may be based on a relationship between the oscillator and the tuned circuit, such as logical and/or mathematical relationship between the capacitance of the oscillator and the capacitance of the tuned circuit and/or the relationship between the frequency of the oscillator and the frequency of the tuned circuit.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: August 24, 2010
    Assignee: Broadcom Corporation
    Inventor: Ahmadreza Rofougaran
  • Patent number: 7772933
    Abstract: In one embodiment, a multiple band oscillator system is disclosed which comprises a first oscillator having a first input, a resonating element, a first output, and a second output. In addition, the multiple band oscillator system also comprises a second oscillator having a second input, a third output, and a fourth output. The first oscillator has a first oscillator frequency and the second oscillator has a and second oscillator frequency. The multiple band oscillator system also contains a tuning capacitive element coupled to the first and second oscillators for determining the second oscillator frequency, and the first oscillator and the second oscillators are both capable of operating the resonating element.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: August 10, 2010
    Assignee: Nortel Networks Limited
    Inventor: Charles Nicholls
  • Patent number: 7760031
    Abstract: A method is provided for reducing inter modulation distortion products using multi-carrier phase alignment of the type where a combined carrier signal is generated from the combined output carried waves of a plurality of numerically controlled oscillators in which the frequency of the carrier wave can be altered by changing an input value into the oscillator. In particular the initial phase of the output carrier waves is adjusted so that the peak amplitude of the combined carrier signal is minimized so that compression of the higher amplitude portions of the combined signal is reduced.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 20, 2010
    Assignee: Vecima Networks Inc.
    Inventors: Gregory Clayton Whittet, Surinder Kumar
  • Publication number: 20100124137
    Abstract: A voltage-controlled oscillator comprises a first oscillator and a second oscillator. The first oscillator may generate a plurality of intermediate clock signals at a plurality of first nodes, multiply connected to a plurality of first ring shape circuits, in response to a control voltage. The plurality of intermediate clock signals may have a different phase from each other and a same phase difference with each other. The second oscillator may generate a plurality of output clock signals at a plurality of second nodes, multiply connected to a plurality of second ring shape circuits, by changing a voltage level of the intermediate clock signals. The plurality of second ring shape circuits may pass the plurality of first nodes.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 20, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Chan-Kyung Kim
  • Patent number: 7705688
    Abstract: A period signal generator comprises a first period signal generating unit for generating a first period signal of which period changes according to a temperature, a second period signal generating unit for generating a second period signal which has a constant period regardless of a temperature, and a period signal output control unit for comparing the first period signal with the second period signal and selecting and outputting the first period signal in case that the period of the first period signal is shorter than that of the second period signal.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: April 27, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yun-Seok Hong
  • Publication number: 20090302952
    Abstract: Systems and methods for distributing a clock signal are disclosed. In some embodiments, systems for distributing a clock signal include a plurality of resonant oscillators, each comprising an inductor; and a differential clock grid that distributes the clock signal. The differential clock grid is coupled to the plurality of resonant oscillators and the clock signal, and the inductances of the inductors are configured such that a resonant frequency of the plurality of resonant oscillators is substantially equal to the frequency of the clock signal.
    Type: Application
    Filed: December 29, 2006
    Publication date: December 10, 2009
    Applicant: The Trustees of Columbia University in the City of New York
    Inventors: Steven Chan, Kenneth L. Shepard, Zheng Xu
  • Patent number: 7612625
    Abstract: In one embodiment, the present invention includes an apparatus having a voltage controlled oscillator (VCO) to generate a first clock signal having a frequency controlled by a bias current coupling ratio of first and second bias currents, and a control circuit coupled to the VCO to generate a first pair of control signals to adjust the bias current coupling ratio. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: November 3, 2009
    Assignee: Intel Corporation
    Inventors: Miaobin Gao, Yu-Li Hsueh, Chien-Chang Liu
  • Patent number: 7589598
    Abstract: The present invention discloses a dual-band voltage controlled oscillator (VCO), comprising a plurality of resonant circuits; an inductor module; a plurality of switches of current source; a buffer circuit; and a output port. The dual-band voltage controlled oscillator (VCO) according to the invention uses the current source in such two VCOs with different resonant frequencies as the switch device to combine the two VCOs and uses the common inductor module for the two VCOs to save the chip size.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: September 15, 2009
    Assignee: National Taiwan University of Science & Technology
    Inventors: Sheng Lyang Jang, Shao Hua Li
  • Patent number: 7567135
    Abstract: To determine performance degradation at functional module in a normal power state due to a power control device, voltages are applied to oscillators at a power diagnostic module. A first voltage is a supply voltage for the data processing device, and a second voltage is a supply voltage applied at a functional module of the data processing device. Counters are adjusted based on the oscillators to determine the oscillators' respective frequencies. In addition, the power diagnostic module can include a timer to measure the length of time that the functional module is in a low-power state, and an analog to digital converter to measure the voltage applied to the functional module during transitions to and from the low-power state.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: July 28, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Aaron S. Rogers, Daniel W. Bailey, Roger D. Pannell
  • Patent number: 7564316
    Abstract: Variable-frequency oscillators incorporating thin-film bulk acoustic resonators (FBARs) are described. In one aspect, a variable-frequency oscillator includes a first oscillator circuit and a second oscillator circuit. The first oscillator circuit includes a first film bulk acoustic resonator that has a first resonant frequency. The second oscillator circuit is coupled to the first oscillator circuit and includes a second FBAR that has a second resonant frequency different from the first resonant frequency. At least one current source is coupled to the first and second oscillator circuits and is operable to supply a total current. A bias circuit is operable to apply to the first and second oscillator circuits respective biases that control apportionment of the total current to the first and second oscillators.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: July 21, 2009
    Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventor: Michael L. Frank
  • Patent number: 7557662
    Abstract: In an oscillating apparatus or a frequency detecting apparatus in which a center frequency and a variable frequency range are freely or optionally established with a high stability and a high accuracy, a first frequency component of a signal from a first crystal oscillator and a second frequency component of another signal from a second crystal oscillator are subjected to a synthesizing operation in a synthesizer and to other operations to obtain a desired center frequency and a desired variable frequency range.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: July 7, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Heike, Tomihiro Hashizume
  • Publication number: 20090134944
    Abstract: A capacitive-degeneration double cross-coupled voltage-controlled oscillator is provided. The capacitive-degeneration double cross-coupled voltage-controlled oscillator includes a main cross-coupled oscillating unit including an oscillation transistor pair cross-coupled to first and second output nodes of a resonating unit to perform an oscillation operation; and an auxiliary cross-coupled oscillating unit including a positive-feedback transistor pair cross-coupled to the first and second output nodes and the transistor pair of the main cross-coupled oscillating unit and a degeneration capacitance connected between emitters of the positive-feedback transistor pair so as to increase a negative resistance of the main cross-coupled oscillating unit. Accordingly, it is possible to increase a maximum attainable oscillation frequency and to decrease an input capacitance.
    Type: Application
    Filed: May 2, 2008
    Publication date: May 28, 2009
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Ja Yol Lee, Sang Heung Lee, Hae Cheon Kim, Hyun Kyu Yu
  • Patent number: 7535981
    Abstract: The present invention generates an output clock signal CLKreq having a frequency freq between the frequency fref/A of a divided clock signal CKL1 and the frequency fref/(A+1) of a divided clock signal CLK2. A clock divider circuit selectively generates divided clock signals CLK1, CLK2. A discrete value correction circuit controls the clock divider circuit so as to repeat C times the process of generating the clock signal CLK2 once and the clock signal CLK1 (Q?1) times and then to generate the clock signal CLK1 R times if C<D and so as to repeat D times the process of generating the clock signal CLK1 once and the clock signal CLK2 (Q?1) times and then to generate the clock signal CLK2 R times if C>D. A, B, and C are natural numbers satisfying freq=fref/(A+C/B). In D=B?C, Q is a quotient of B/C if C<D or a quotient of B/D if C>D.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: May 19, 2009
    Assignee: International Business Machines Corporation
    Inventors: Sohichi Tsukamoto, Shuhsaku Matsuse, Makoto Ueda
  • Publication number: 20090058539
    Abstract: A period signal generator comprises a first period signal generating unit for generating a first period signal of which period changes according to a temperature, a second period signal generating unit for generating a second period signal which has a constant period regardless of a temperature, and a period signal output control unit for comparing the first period signal with the second period signal and selecting and outputting the first period signal in case that the period of the first period signal is shorter than that of the second period signal.
    Type: Application
    Filed: April 22, 2008
    Publication date: March 5, 2009
    Applicant: Hynix Semiconductor, Inc.
    Inventor: Yun Seok Hong
  • Patent number: 7496155
    Abstract: A clock recovery circuit includes a crossover adjustment circuit operable to adjust a crossover point to adjust a corresponding duty cycle. The adjustment circuit comprises a feedback adjustment combining element which is implemented as summing elements and a crossover point control clock amplifier, an operational amplifier with a resistor in place of a low pass filter at an input of the operational amplifier and feedback driver. The summing element within the feedback adjustment combining element combines input clocks with feedback signals, the crossover point control clock amplifier includes adjustment driver, the two cross coupled PMOS along with the resistor connected between them, reshape input clocks, adjust cross over point and provide output clocks with DCD corrected. A modified Miller capacitor comprising a resistor in series with a capacitor across a drain and gate of a cascode transistor pair is utilized in an output stage to adjust corner frequencies.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: February 24, 2009
    Assignee: Xilinx, Inc.
    Inventors: Jinghui Lu, Yiqin Chen
  • Patent number: 7482888
    Abstract: A startup circuit 200 and method 700 is provided for quickly starting up a resonator based oscillator. Tunable oscillator 201 provides an impetus signal to oscillator 205 through capacitor 202. The impetus signal has a frequency that is an estimate of the resonant frequency of resonator 205. The circuit measures the frequency of oscillator 204 and the frequency of tunable oscillator 201. The circuit then adjusts the frequency of tunable oscillator 201 such that the frequency of the tunable oscillator is substantially equal to the resonant frequency of the resonator 205 and stores a data state necessary for the tunable oscillator 201 to generate a signal with this target frequency in the future. During an ensuing startup cycle the stored data state causes the impetus signal delivered by tunable oscillator 202 to be substantially equal to the target frequency of oscillator 204 which improves startup performance.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: January 27, 2009
    Assignee: ZeroG Wireless, Inc.
    Inventor: Bendik Kleveland
  • Publication number: 20090015342
    Abstract: A startup circuit 200 and method 700 is provided for quickly starting up a resonator based oscillator. Tunable oscillator 201 provides an impetus signal to oscillator 205 through capacitor 202. The impetus signal has a frequency that is an estimate of the resonant frequency of resonator 205. The circuit measures the frequency of oscillator 204 and the frequency of tunable oscillator 201. The circuit then adjusts the frequency of tunable oscillator 201 such that the frequency of the tunable oscillator is substantially equal to the resonant frequency of the resonator 205 and stores a data state necessary for the tunable oscillator 201 to generate a signal with this target frequency in the future. During an ensuing startup cycle the stored data state causes the impetus signal delivered by tunable oscillator 202 to be substantially equal to the target frequency of oscillator 204 which improves startup performance.
    Type: Application
    Filed: July 12, 2007
    Publication date: January 15, 2009
    Applicant: ZeroG Wireless, Inc.
    Inventor: Bendik Kleveland
  • Publication number: 20080224784
    Abstract: A method is provided for reducing inter modulation distortion products using multi-carrier phase alignment of the type where a combined carrier signal is generated from the combined output carried waves of a plurality of numerically controlled oscillators in which the frequency of the carrier wave can be altered by changing an input value into the oscillator. In particular the initial phase of the output carrier waves is adjusted so that the peak amplitude of the combined carrier signal is minimized so that compression of the higher amplitude portions of the combined signal is reduced.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 18, 2008
    Inventors: Gregory Clayton Whittet, Surinder Kumar
  • Patent number: 7420429
    Abstract: A source coupled differential complementary Colpitts oscillator is described, which enables a differential oscillation and also can improve phase noise performance by source-coupling a complementary Colpitts oscillator using an inductor. A differential complementary Colpitts oscillator includes: a plurality of complementary Colpitts oscillators and a source coupler which couples a source node of the plurality of complementary Colpitts oscillators, enables the Colpitts oscillators to differentially oscillate.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: September 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Choong-Yul Cha, Hoon Tae Kim, Chun Deok Suh
  • Publication number: 20080084248
    Abstract: In an oscillating apparatus or a frequency detecting apparatus in which a center frequency and a variable frequency range are freely or optionally established with a high stability and a high accuracy, a first frequency component of a signal from a first crystal oscillator and a second frequency component of another signal from a second crystal oscillator are subjected to a synthesizing operation in a synthesizer and to other operations to obtain a desired center frequency and a desired variable frequency range.
    Type: Application
    Filed: October 4, 2007
    Publication date: April 10, 2008
    Inventors: Seiji Heike, Tomihiro Hashizume
  • Patent number: 7342462
    Abstract: A voltage controlled oscillator unit is provided with cross coupled voltage controlled oscillators to generate quadrature phases. One control stage adjusts coupling between the oscillators. Another control stage adjusts the tail current that applies operating bias to the oscillators and to the couplers, respectively. The cross coupling and tail current control stages are arranged so that tuning one simultaneously and oppositely tunes the other for simultaneous adjustment in opposite directions. This limits the power consumption of the oscillator unit throughout the range of frequency control.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: March 11, 2008
    Assignee: Agere Systems, Inc.
    Inventor: Jinghong Chen
  • Patent number: 7342465
    Abstract: An apparatus and method for providing a stable gain over wide frequency range in a VCO are presented. A VCO uses a waveform generator along with a bias generator having a frequency select input. The frequency select input is used to adjust the amount of output current and/or gain of the bias generator. The output current of the bias generator determines the frequency of the output of the waveform generator. Multiple bias and waveform generators may be used to expand the frequency range of the VCO. A PLL may be programmed for a variety of output frequencies by using the frequency select input of the VCO.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: March 11, 2008
    Assignee: Honeywell International Inc.
    Inventor: James D. Seefeldt
  • Patent number: 7313369
    Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: December 25, 2007
    Assignees: Renesas Technology Corp., TTPcom Limited
    Inventors: Hirotaka Oosawa, Jiro Shinbo, Noriyuki Kurakami, Masumi Kasahara, Robert Astle Henshaw
  • Publication number: 20070268077
    Abstract: A radio frequency coil arrangement for magnetic resonance measurements as well as a probe head for measuring resonance signals by utilizing such a radio frequency arrangement are disclosed. The radio frequency coil arrangement comprises a scroll coil having a stripe being spirally wound about a longitudinal axis, and having ends being provided with terminals for feeding and/or receiving radio frequency signals. The stripe, as seen in a plane unwound view, is configured in a Z-shape with a middle, broad section as well as two lateral, narrow sections being offset with respect to each other in a lateral direction, such that the lateral sections do not overlap in the lateral direction when the stripe is wound.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 22, 2007
    Applicant: Bruker BioSpin GmbH
    Inventors: Heinz Zeiger, Baudouin Dillmann
  • Patent number: 7199671
    Abstract: In one embodiment, a clock generation system comprises first and second hot-swappable oscillator (HSO) devices that generate respective timing signals, a plurality of controllable attenuators for controllably attenuating one of the timing signals, a combiner for combining the timing signals, a redundant clock source (RCS) device for generating at least one clock for distribution to other circuits using an output of the combiner, and logic for switching which of the timing signals is attenuated in response to failure of one of the first and second HSO devices.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: April 3, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel Wissell, Daniel A. Strickland, Michael J. Tsuk
  • Patent number: 7034623
    Abstract: A voltage controlled oscillator includes two gain stages to split the bias current and reduce phase noise.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: April 25, 2006
    Assignee: Intel Corporation
    Inventor: Waleed Khalil
  • Patent number: 6995618
    Abstract: A phase adjustment module in a voltage controlled oscillator (VCO) samples a VCO oscillation to detect changes in the oscillation frequency and produces a corresponding correction voltage that is feedback to the VCO input to correct the frequency change. A plurality of sampling modules, each formed to start sampling at a different point on the oscillation cycle, charge a sampling module capacitor over the period of a full oscillation cycle. The samples are coupled to a low pass filter to produce a running average of all the samples. The charge on each capacitor is coupled to a first input of a plurality of operational amplifiers and the running average is coupled to a second input. The summed output of the operational amplifiers is substantially equal to a difference between the running average and a voltage representing the instantaneous time change or phase change of the oscillation frequency.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: February 7, 2006
    Assignee: Xilinx, Inc.
    Inventor: Charles W. Boecker
  • Patent number: 6970048
    Abstract: A circuit and method for generating quadrature signals with a deterministic phase relationship. Between two inductive-capacitive (LC) based quadrature voltage controlled oscillators (VCO), phase shift circuitry is interposed such that the individual LC VCO circuits produce signals with corresponding phase delays which ensure that the desired lead or lag phase relationship between the quadrature signals is achieved.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: November 29, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Varadarajan Devnath, Jitendra Mohan, Quyet Nguyen, Yongseon Koh
  • Patent number: 6922111
    Abstract: According to some embodiments, a clock signal having an adaptive frequency is provided.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: July 26, 2005
    Assignee: Intel Corporation
    Inventors: Nasser A. Kurd, Javed S. Barkatullah
  • Patent number: 6911870
    Abstract: A voltage controlled oscillator including a first oscillator circuit portion with at least one first inductor, and a second oscillator circuit portion with at least one second inductor, wherein the at least one first inductor and the at least one second inductor are electromagnetically coupled to each other.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: June 28, 2005
    Assignee: Agere Systems, Inc.
    Inventors: Sander L. Gierkink, Vito Boccuzzi, Robert C. Frye, Salvatore Levantino
  • Patent number: 6870432
    Abstract: According to some embodiments, unilateral coupling is provided for a quadrature voltage controlled oscillator. For example, a first voltage controlled oscillator may be provided with a 0 degree phase node and a 180 degree phase node A second voltage controlled oscillator may be provided with a 90 degree phase node and a 270 degree phase node. In addition, the first and second voltage controlled oscillators may be mutually coupled with substantially unilateral cascaded common-source common-gate amplifier coupling devices to create a quadrature voltage controlled oscillator.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: March 22, 2005
    Assignee: Intel Corporation
    Inventors: Shenggao Li, Issy Kipnis
  • Patent number: 6870429
    Abstract: Clock signals and digital data signals at a variable frequency are introduced to the input of a FIFO and are passed from the FIFO at a second (or intermediate) frequency controlled by a numerically controlled oscillator. To regulate the frequency of the signals from the numerically controlled oscillator, the phases of the clock signals at the variable frequency are compared in a phase detector with the phases of the signals from the numerically controlled oscillator to generate an error signal. The error signals and the signals at a fixed sampling frequency higher than the intermediate frequency regulate the frequency of the signals from the numerically controlled oscillator and thus the frequency of the digital data signals from the FIFO. The digital data signals from the FIFO are converted to a pair of signals at the second frequency.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: March 22, 2005
    Assignee: Broadcom Corporation
    Inventors: Robert A. Hawley, Robindra B. Joshi, Huan-Chang Liu
  • Patent number: 6850122
    Abstract: A quadrature oscillator includes a master tuned oscillator and two injection-locked slave tuned oscillators.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: February 1, 2005
    Assignee: Intel Corporation
    Inventors: Ashoke Ravi, Krishnamurthy Soumyanath
  • Patent number: 6791423
    Abstract: A quadrature coupled controlled oscillator comprising a first and a second circuit module, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103). The first circuit module is coupled with the second circuit module and the second circuit module is cross coupled with the first circuit module. Each of the circuit modules (100 and 100′) comprises a first and a second Voltage Controlled Current Source (101) (VCCS). In each of the circuit modules, each VCCS is coupled to a phase shifter (102) for shifting the phase of a current (110) supplied by the VCCS to a resonator (104) included in that circuit module. A communication arrangement (300) for communicating via a bi-directional communication channel (304), comprises an oscillator (303) as described above for generating a periodic signal. A receiving module (301) generates an output signal from the periodic signal and a receiving signal received from the channel (304).
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 14, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Dominicus Martinus Wilhelmus Leenaerts, Eise Carel Dijkmans
  • Patent number: 6788154
    Abstract: A phase-locked loop system and method are provided. The system may include an error detector configured to receive a reference signal, and a voltage-controlled oscillator subsystem coupled to the error detector. The voltage-controlled oscillator subsystem is typically configured to produce a primary output signal that tends toward a predefined frequency relationship with the reference signal, and to produce a feedback signal that is routed in a feedback loop back to the error detector. The voltage-controlled oscillator subsystem typically includes a multiple output voltage-controlled oscillator having a plurality of VCO outputs. The voltage-controlled oscillator subsystem is typically configured to form the feedback signal from a plurality of the VCO outputs.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: September 7, 2004
    Assignee: True Circuits, Inc.
    Inventor: John George Maneatis
  • Patent number: 6696897
    Abstract: A system and method are provided for controlling the phase of a voltage controlled oscillator output. The method comprises: accepting a plurality of VCO outputs coarsely differentiated by phase; selecting one of the VCO outputs; finely modifying the phase of the selected VCO output; and, supplying the phase modified VCO output. In one aspect, accepting VCO outputs coarsely differentiated by phase includes: accepting a first VCO output (I0); accepting a second VCO output (I1), differentiated approximately 90 degrees from the first VCO output; accepting a third VCO output (Q0), differentiated approximately 90 degrees from the second VCO output; and, accepting a fourth VCO output (Q1), differentiated approximately 90 degrees from the third VCO output. Finely modifying the phase of the selected VCO output includes modifying the selected VCO output in the range between +45 and −45 degrees. In one aspect, the output is modified in 16 discrete steps.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: February 24, 2004
    Assignee: Applied MicroCircuits Corp.
    Inventors: Shyang Kye Kong, Hongming An, Bruce Harrison Coy
  • Patent number: 6686806
    Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: February 3, 2004
    Assignee: Tropian, Inc.
    Inventor: Yves Dufour
  • Patent number: 6661297
    Abstract: A multi-octave, wideband voltage controlled oscillator has a plurality of high impedance current output individual voltage controlled oscillators coupled in parallel to form a bank of voltage controlled oscillators covering at least one high frequency octave. The outputs of the VCOs are wire-OR'd together and the VCOs are selected by a select signal that turns on the desired oscillator(s). A main limiter/divider selects a frequency octave at either the fundamental frequency of the selected VCO or a sub-harmonic thereof as the multi-octave, wideband voltage controlled oscillator output. A reference limiter/divider selects a reference frequency from the selected VCO for use in a phase locked loop. Each VCO has a tank circuit coupled across the bases of a pair of transistors, the emitters of which are coupled through respective current sources to ground. The collectors of the transistors are coupled to the wire-OR'd network.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: December 9, 2003
    Assignee: Tektronix, Inc.
    Inventor: Steven H. Pepper
  • Patent number: 6640311
    Abstract: A circuit includes a signal generator and a discriminator. The signal generator generates a plurality of reference signals where a majority of the reference signals have the same phase. The discriminator generates a regulated signal that has the same phase as the majority of the reference signals. Therefore, if an environmental disturbance such as a single-event transient (SET) shifts the phase or phases of a minority of the reference signals, the discriminator maintains the regulated signal at a stable frequency and phase by generating the regulated signal with reference to the undisturbed majority of the reference signals.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: October 28, 2003
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventor: Kenneth R. Knowles
  • Patent number: 6501583
    Abstract: Two sets of a high speed differential amplifier and a low speed differential amplifier are prepared, and frequency response speeds of these high speed/low speed differential amplifiers are different from each other. Both an oscillating frequency and a frequency modulation sensitivity of a ring oscillator type voltage-controlled oscillator circuit can be separately set by adding two outputs of these differential amplifiers to each other and by varying the selection ratio of these high speed/low speed differential amplifiers in a linear manner. Thus, the setting ranges for the oscillating frequency and the frequency modulation sensitivity are enlarged. At this time, since a summation of currents flowing through the high speed/low speed differential amplifiers is continuously made constant, the oscillating frequency depending characteristic of the output amplitude of the VCO circuit can be canceled.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: December 31, 2002
    Assignee: OpNext Japan, Inc.
    Inventors: Mitsuo Akashi, Hiroki Irie, Yasuhiro Yamada, Akihiro Hayami, Naohiko Baba, Tomonao Kikuchi
  • Patent number: 6501338
    Abstract: In a three-band switching oscillator, a switching circuit is provided to switch the operating conditions of a first and second voltage-controlled oscillator and to switch an oscillation frequency band of the first voltage-controlled oscillator. The switching circuit switches a first switch in accordance with a switching voltage inputted to a first switching terminal and switches an oscillation frequency band in accordance with a switching voltage inputted to a second switching terminal. Only when a high-level switching voltage is inputted to the second switching terminal, the second switch is placed into an open condition by a high-level switching voltage inputted to the first switching terminal and placed into a closed condition by a low-level switching voltage inputted thereto, and when a low-level switching voltage is inputted to the second switching terminal, the second switch is placed into the open condition irrespective of the switching voltage inputted to the first switching terminal.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: December 31, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventors: Kazuhiro Nakano, Hiroki Noumi, Isao Hasegawa
  • Patent number: 6483253
    Abstract: A light source device for use in image readout devices capable of light emission in which a dielectric barrier discharge fluorescent lamp is synchronized with an external synchronization signal without attendant fluctuation in optical power. A phase comparator compares the oscillation signal phase of a variable frequency oscillator divided by a frequency divider with an external synchronization signal. The phase comparator controls the oscillation frequency of a variable frequency oscillator as a function of the phase difference. Consequently, the oscillation phase of the variable frequency oscillator is phase locked by the external synchronization signal. The oscillation signal of the variable frequency oscillator is input to the gate signal generation circuit, and the switch devices of an inverter circuit are opened and closed by the output of a gate signal generation circuit.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: November 19, 2002
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventors: Masashi Okamoto, Takashi Asahina
  • Publication number: 20020113657
    Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.
    Type: Application
    Filed: December 14, 2000
    Publication date: August 22, 2002
    Inventor: Yves Dufour