Including Discrete Semiconductor Device Patents (Class 332/168)
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Patent number: 5973576Abstract: A low-powered mixer that is operable at a low voltage by a single positive power supply. A predetermined voltage and a first data signal Ss1 superimposed on the predetermined voltage are input into the drain D of an FET Q1, while a first carrier signal Sc1 is input into the FET Q1's gate G. The FET Q1 thus generates a first mixed signal So1 by mixing the first data signal Ss1 and the first carrier signal Sc1. A predetermined voltage and a second data signal Ss2 superimposed on the predetermined voltage are input into the FET Q2's drain D, while a second carrier signal Sc2 is input into the FET Q2's gate G. The FET Q2 thus generates a second mixed signal So2 by mixing the second data signal Ss2 and the second carrier signal Sc2. A capacitor C5 causes the sources S of the FETs Q1 and Q2 to float for DC and to be grounded for AC.Type: GrantFiled: November 7, 1997Date of Patent: October 26, 1999Assignee: Murata Manufacturing Co., Ltd.Inventor: Mitsuo Ariie
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Patent number: 5686870Abstract: A low-powered mixer that is operable at a low voltage by a single positive power supply. A predetermined voltage and a first data signal Ss1 superimposed on the predetermined voltage are input into the drain D of an FET Q1, while a first carrier signal Sc1 is input into the FET Q1's gate G. The FET Q1 thus generates a first mixed signal So1 by mixing the first data signal Ss1 and the first carrier signal Sc1. A predetermined voltage and a second data signal Ss2 superimposed on the predetermined voltage are input into the FET Q2's drain D, while a second carrier signal Sc2 is input into the FET Q2's gate G. The FET Q2 thus generates a second mixed signal So2 by mixing the second data signal Ss2 and the second carrier signal Sc2. A capacitor C5 causes the sources S of the FETs Q1 and Q2 to float for DC and to be grounded for AC.Type: GrantFiled: July 25, 1996Date of Patent: November 11, 1997Assignee: Murata Manufacturing Co., Ltd.Inventor: Mitsuo Ariie
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Patent number: 5434546Abstract: A method for simultaneously imposing a single modulating signal on a number of constant frequency carriers includes applying the single modulating signal and all of the carriers to a doubly-balanced mixer circuit that produces sideband signals that are uncontaminated by the carriers. The sideband signals thus produced are then combined with signals proportional to the carriers in a linear circuit to obtain an output signal equivalent to a signal that would result from combining separately modulated carriers.Type: GrantFiled: November 15, 1993Date of Patent: July 18, 1995Inventor: James K. Palmer
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Patent number: 5214397Abstract: A push-pull modulator stage 70 has two possible transmission paths, an electrically short path (7) and a phase delay path (6) with a phase delay element providing a phase shift of approximately 180.degree.. The phase delay element has the form of a low pass filter. In each of the two paths (6, 7) a semiconductor diode (D.sub.1, D.sub.2) is disposed in such a way that they sense the carrier (U.sub.c) with a phase shift of 180.degree. and, correspondingly, switch in unison if no modulation voltage (U.sub.m) is present, thus suppressing the carrier at the signal output (3). When a modulation signal (U.sub.m) is present, the push-pull balance is disturbed and the resistance of one of the two paths (6) becomes lower relative to the other path (7), which leads to the generation of the modulated carrier voltage (Umc). The modulator stage (70) can also be designed as a dual modulator stage and/or can be used as a mixer stage.Type: GrantFiled: September 6, 1991Date of Patent: May 25, 1993Assignee: Alcatel N.V.Inventor: Fred-Egon Muller
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Patent number: 5200715Abstract: A new method of modulating and demodulating signals and circuitry therefor is disclosed. The modulation circuit defines a non-linear voltage current transfer function wherein at low voltage levels the current voltage transfer function is substantially linear and at higher voltages, the transfer function is substantially exponential. The modulation circuit can be designed of three parallel branches, a resistive branch, and two diodes in the remaining branches, the anode of one diode being coupled to the cathode of the other diode. Demodulation circuitry is also disclosed that includes a circuit for determining the instantaneous phase and amplitude and then processing circuitry to decode the modulation information based upon the sampled phase and amplitude data.Type: GrantFiled: September 6, 1991Date of Patent: April 6, 1993Assignee: WavePhore, Inc.Inventors: Richard C. Gerdes, Mary K. Gerdes
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Patent number: 5172079Abstract: A balanced modulation circuit includes first, second, and third differential amplifiers. The first differential amplifier includes first and second transistors (Q11, Q12) having the emitters connected to first and second constant-current sources (CS11, CS12) and also connected with each other through a resistor, the collectors connected to the power supply line through respective base-collector-coupled transistors (Q13, Q14) used as diodes, and the bases connected to a first voltage source (V11) through respective resistors (R11, R12).Type: GrantFiled: March 16, 1992Date of Patent: December 15, 1992Assignee: Sharp Kabushiki KaishaInventor: Toshihiko Shigenari
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Patent number: 5153536Abstract: A modulator suitable for 16 quadrature amplitude modulation (QAM) is designed as a double modulator (1), wherein a 16 QAM modulator (39) consists of two double modulators (1). One double modulator (1) has two partial modulators (1',1") forming a bridge. Each partial modulator (1',1") has two possible transmission paths: (6',6") with a phase delay line (39',39") which causes a 180.degree. phase shift. On each of the two paths (6',6", 7',7"), a semiconductor diode (D.sub.1 ',D.sub.1 ",D.sub.2 ',D.sub.2 ") is disposed in such a way that they provide the carrier (U.sub.c) with a 180.degree. phase inversion and are accordingly rendered conductive in unison, if no modulation voltage (U.sub.m) is applied, whereby the carrier is suppressed at the signal output (3'). When a modulation signal (U.sub.m) is applied, the balance is changed to push-pull, and one of the two paths (6',6") assumes less impedance compared to the other path (7',7"), which leads to the generation of the modulated carrier voltage (U.sub.mc).Type: GrantFiled: December 14, 1990Date of Patent: October 6, 1992Assignee: Alcatel N. V.Inventor: Fred-Egon Muller