Abstract: A wireless device receives one or more messages comprising: a parameter indicating that uplink duplication is configured for a bearer corresponding to a first logical channel and a second logical channel; first mapping restrictions of the first logical channel to at least one first cell; and second mapping restrictions of the second logical channel to at least one second cell. A control element indicating activation or deactivation of duplication for the bearer is received. If the control element indicates activation of the duplication, the first mapping restrictions are applied to the first logical channel and the second mapping restrictions are applied to the second logical channel. If the control element indicates deactivation of the duplication, the first mapping restrictions are lifted from the first logical channel and the second mapping restrictions are lifted from the second logical channel.

Abstract: A controllable reflection type phase shifter that includes an adjustable hybrid coupler and controllable adjustable reflection load circuit is described and used in some embodiments to implemented a communication system. In some embodiments the communication system supports beam forming through the use of a plurality of TX/RX signal processing chains (SPCs), each SPC including at least one reflection type phase shifter, e.g., a controllable reflection type phase shifter. The controllable reflection type phase shifters in different SPCs of the array are configured, e.g., differently, based on the particular beam pattern being used to transmit or receive signals at a given time. Control information, e.g., control values, are stored in memory with the control values corresponding to an antenna pattern to be used at a given time being retrieved from memory and to control the circuits, e.g., controllable reflection type phase shifters, in the system.

Abstract: Miniature slow-wave transmission lines are described having an asymmetrical ground configuration. In some embodiments, the asymmetrical ground configuration facilitates a reduction in size. Non-uniform auxiliary conductors may be disposed above or below the co-planar waveguide to facilitate a reduction in the length of the miniature slow-wave transmission lines. Phase shifters may be implemented having a reduced size by including one or more miniature slow-wave transmission lines.

Abstract: An electronic circuit can include a gain adjustment circuit (e.g., a gain “equalizer” circuit), such as to compensate for a variation in insertion loss over a specified range of frequencies. For example, such a gain adjustment circuit can provide an insertion loss characteristic having a specified slope. Such a slope can include a positive slope where insertion loss increases with respect to frequency, or a negative slope where insertion loss decreases with respect to frequency, as illustrative examples. A gain equalization technique can be used to compensate for variation in insertion loss versus frequency between different circuit paths, such as in relation to a switchable delay line having two or more selectable paths, such as for phase shifting applications. A gain adjustment circuit can be configured to provide relatively flat or constant time-domain delay versus frequency, such as inhibiting or reducing dispersion.

Abstract: A system for non-destructively inspecting brazed joints that includes at least one matrix phased array probe that further includes plurality of ultrasonic transducer elements arranged in an array at one end of the probe, wherein the transducer elements are operative to both generate ultrasonic signals and to receive reflections thereof; and at least one tip adapted to be removably mounted over the array of ultrasonic transducer elements, wherein a region of the at least one tip has been shaped to correspond to the geometric characteristics of an item or a specific portion of an item that includes a brazed joint to be inspected; and a processor running software that includes at least one imaging algorithm for processing data received from the at least one matrix phased array probe and generating color coded ultrasonic C-scan images of inspected brazed joints.

Abstract: Devices and systems are disclosed for a Traffic Collision Avoidance system (TCAS) antenna. In some examples, the TCAS antenna includes two antenna elements, a first plurality of bolt holes, a second plurality of bolt holes, and a third plurality of bolt holes. The first plurality of bolt holes in conjunction with the second plurality of bolt holes enables the TCAS antenna to be mounted to an aircraft in a first orientation. The third plurality of bolt holes in conjunction with the first plurality of bolt holes enable the TCAS antenna to be mounted to the aircraft in a second orientation, and the second orientation is different than the first orientation.

Abstract: A superconducting switch system is provided that includes a filter network having an input portion and an output portion, and a variable inductance coupling element that couples the input portion to the output portion. The variable inductance coupling element has a first inductance that allows a desired portion of an input signal to pass from the input portion to the output portion as an output signal, and a second inductance state that suppresses the input signal from passing from the input portion to the output portion. The superconducting switch system further comprises a switch controller configured to control the switching of the variable inductance coupling element between the first inductance state and the second inductance state.

Abstract: A technique for driving a column of pixels that include light emitting elements. The technique incorporates feedback data provided from feedback data sources connected to the data line and to feedback line of the array, pixel driving circuit with feedback path. The technique can also include block of the reference elements for input signal corrections.

Abstract: A semiconductor device may include first conductive patterns and first interlayer insulating layers. Each of the first conductive patterns may include a first pad pattern extending in a first direction and first line patterns extending from the first pad pattern in a second direction crossing the first direction, widths of the first line patterns increasing as a distance from the first pad pattern decreases. The first conductive patterns and the first interlayer insulating layers may be stacked on top of each other.

Abstract: A rotating electromechanical apparatus includes a cylindrical ironless stator coil comprising a plurality of wires, a magnetic rotor arranged with the stator coil, wherein the magnetic field flux associated with the rotor interacts with the stator coil wires by electromagnetic induction, a cylindrical bobbin arranged to support the wires, a strand woven on at least the outer circumference of the wire-wrapped cylindrical bobbin, and a curable potting material potting the wires, bobbin and strand to provide an ironless composite stator coil when cured.

Abstract: A combination capacitor and inductor employ a common volume for energy-storing electrical and magnetic fields thereby reducing the bulk of these components with respect to separate components of comparable value.

Abstract: A passive integrated circuit formed on a substrate, including contact areas of a conductive material specifically capable of receiving bonding pads, wherein the conductive material further creates connections between regions of a lower metallization level.

Abstract: In general, in accordance with an exemplary aspect of the present invention, an electrical system configured to use power combining of microwave signals, such as those from monolithic microwave integrated circuits or MMICs is provided. In one exemplary embodiment, the system of the present invention further comprises a low loss interface that the circuits are directly connected to. In another exemplary embodiment, the circuits are connected to a pin which is connected to the low loss interface. In yet another exemplary embodiment of the present invention, a multi-layer power amplifier is provided that comprises two or more chassis and circuits attached to impedance matching interfaces according to the present invention. This multi-layered power amplifier is configured to amplify an energy signal and have a significantly reduced volume compared to existing power combiners.

Abstract: A phase-shift network may include a first capacitor connected between a first input node and a first output node, and a second capacitor connected between a second input node and a second output node. Further, a 5 first filter section may be connected between the first input node and the second output node, and a second filter section may be connected between the second input node and the first output node. One or both of the first and second filter sections may include an inductance and a high-pass network. The high-pass network may include third and fourth capacitors and a first inductor. The inductance and third and fourth capacitors may be connected in series between the respective input and output nodes. The first inductor may have a first end connected to an intermediate node between the third and fourth capacitors and a second end connected to a circuit ground.

Abstract: Embodiments of circuits, apparatuses, and systems for a lattice matching network are disclosed. Embodiments may include a power amplifier to provide single-ended amplification of a radio frequency signal. A lattice matching network may be coupled with the power amplifier and may transform a source impedance associated with an output of the power amplifier to a load impedance. In some embodiments, the lattice matching network may include first and second arms coupled in parallel between the power amplifier and an output node. The first arm may include a serial high-low network and the second arm may include a serial low-high network. The serial high-low network and the serial low-high network may provide a passband response with respect to the radio frequency signal. The serial high-low network and serial low-high network may include one or more Pi networks. Other embodiments may be described and claimed.

Abstract: A phase-shift network may include a lattice network including a first capacitor coupling a first circuit node to a second circuit node, a second capacitor coupling a third circuit node to a fourth circuit node, and a first inductor coupling the first circuit node to the fourth circuit node. A first coupled section may couple a single-ended input node to the lattice network. A second coupled section may couple the lattice network to a single-ended output node. Each coupled section may include a plurality of conductors that may form a transmission line, such as a coaxial transmission line or a stripline. A high-pass circuit may couple the input node to the first coupled section. A phase difference network may include a signal divider producing two intermediate signals coupled to respective phase-shift networks producing output signals having substantially constant phase difference over a frequency range.

Abstract: A phase-shift network may include a first capacitor connected between a first input node and a first output node, and a second capacitor connected between a second input node and a second output node. Further, a first filter section may be connected between the first input node and the second output node, and a second filter section may be connected between the second input node and the first output node. One or both of the first and second filter sections may include a first inductance and an high-pass network. The high-pass network may include third and fourth capacitors and a first inductor. The first inductance and third and fourth capacitors may be connected in series between the respective input and output nodes. The first inductor may have a first end connected to an intermediate node between the third and fourth capacitors and a second end connected to a circuit ground.

Abstract: An electrical signal transformation device configured for emulation of physical, for example, optical, phenomena and/or a mathematical or logical process. The device employs a first plurality, second plurality and third plurality of electrical components each having a first terminal and a second terminal. The first plurality and second plurality of electrical components are arranged along a first direction and a second direction respectively, to form a planar two dimensional lattice. The first plurality of electrical components are configured to provide at least one of a constant signal propagation velocity and/or amplitude while the second plurality of electrical components are configured to provide at least one of a varying signal propagation velocity and/or amplitude. The lattice includes at least two input signal nodes and at least one output signal node and is configured to transform and communicate a plurality of input signals from the input node to the output node.

Abstract: A miniaturized multilayer hybrid-phase signal splitter circuit is proposed, which is fully equivalent in function to a conventional rat-race coupler, but with a specialized circuit layout structure that allows its IC implementation to be more miniaturized than the conventional rat-race coupler. The proposed hybrid-phase signal splitter circuit features the use of a multilayer substrate for the layout of six transmission lines in such a manner that the transmission lines in the middle layer are inductively coupled to the transmission lines on the overlying layer as well as the transmission lines on the underlying layer to form a Marchand balun. In IC implementation, the required layout area is only about 10% of the layout area for the conventional rat-race coupler.

Abstract: In a band-pass filter of a delay line, an input terminal and a first resonator adjacent to the input terminal are coupled through a capacitor. The first resonator and a second resonator adjacent to the first resonator are coupled through a capacitor. The second resonator and a third resonator adjacent to the second resonator are coupled through an inductance. The third resonator and a fourth resonator adjacent to the third resonator are coupled through a capacitor. The fourth resonator and an output terminal adjacent to the fourth resonator are coupled through a capacitor.

Abstract: Provided are a phase shifter with a photonic band gap (PBG) structure using a ferroelectric thin film. The phase shifter includes a microstrip transmission line acting as a microwave input/output line and a plurality of tunable capacitors arranged in the microstrip transmission line at regular intervals. Electrodes disposed on a substrate apply DC voltages to the plurality of tunable capacitors. Radio frequency (RF) chokes and quarter wavelength radial-stubs are connected between the electrodes and the microstrip transmission line in order to prevent high frequency signals from flowing into a DC bias terminal. A plurality of PBGS are periodically arrayed on a ground plane of the substrate.

Abstract: A signal splitter for reducing noise ingress and a cable television network incorporating such splitters. A signal splitter has an input and a plurality of outputs, where alternate outputs are connected to phase shifting devices. Prevention circuitry is provided for at least preventing the generation of intermodulation products in the phase shifting devices. The prevention circuitry is provided with a pre-connected filter in the form of a high-pass filter for stopping voltage peaks through reflection of the energy contained in the voltage peaks.

Abstract: A signal transmission method suppresses a reflected wave of a transmission signal on a transmission line, by obtaining level and time information related to the reflected wave by computing a correlation between a data pattern of the transmission signal and the reflected wave, and correcting a waveform of the transmission signal based on the level and time information related to the reflected wave.

Abstract: A phase shifter circuit includes a plurality of first series circuits each comprised of a series connection of one capacitor and one resistor, a first circuit element including at least inductance connecting between a first end and a second end of a chain structure made by connecting the plurality of first series circuits in series, the first circuit element and the chain structure together constituting a first loop circuit, a plurality of second series circuits each comprised of a series connection of one capacitor and one resistor, a second circuit element including at least inductance connecting between a first end and a second end of a chain structure made by connecting the plurality of second series circuits in series, the second circuit element and the chain structure together constituting a second loop circuit, and a plurality of connection lines connecting between the first loop circuit and the second loop circuit.

Abstract: An inductor including a primary coil coaxially arranged and operated in parallel with isolated secondary coils each including at least one loop winding with two open-circuited ports. At least one phase shifting device is arranged between open-circuited ports of at least one secondary coil. A method to operate an inductor by combining primary and secondary coils with phase shifting devices to get a wide tuning range is also provided. The method includes the step of phase shifting open-circuited ports of at least one secondary coil.

Abstract: Provided is a delay line that prevents reflection signals output from a test signal generator from being superimposed as noise. The delay line delays an electrical signal input into a signal line and outputs the thus delayed signal, and includes three or more passive elements that are provided on the signal line and delay the signal. Each section of the signal line between pairs of adjacent passive elements has a different electrical length. The reflection signals reflected by the passive elements are superimposed on each other at different phases. It is desirable that the reflection signals reflected by adjacent passive elements differ by 180 degrees.

Abstract: There is provided a timing generator for generating a timing signal based on a given reference clock, having a delaying circuit section for outputting each pulse of the reference clock by delaying by a value of delay given per each of the pulse and a pulse selecting and outputting section for passing and outputting only pulses to be outputted as the timing signal among the pulses outputted out of the delaying circuit section.

Abstract: A phase shifter includes a metal plate, a support portion, a slot, a coupling portion, and a ground portion. The phase shifter effectively improves signal coupling efficiency, and inhibits noise generated with the change of phase shift due to signal transmission. The phase shifter is advantageous in smaller volume, easy to assemble, and low cost.

Abstract: A full range phase shifter circuit includes a power divider, a hybrid coupler, a differential phase shifter, a power combiner and switched attenuators. The power divider, hybrid coupler, differential phase shifter and power combiner comprise lumped elements and can be integrated in semiconductor processes, decreasing the circuit size of the full range phase shifter.

Abstract: A method for producing a superconducting inductive component having at least two plots, the component including at least one line segment incorporating at least one plot of the component, the line segment constituting a conducting or superconducting layer within a stack of alternately superconducting and insulating films.

Abstract: A phase shifter fabricated by a simple process and having a simple structure, a method of fabricating the same, and a duplexer having the same are disclosed. The duplexer includes a transmitting-end filter capable of passing only a signal in the range of a transmission frequency, a receiving-end filter capable of passing only a signal in the range of a reception frequency, and a phase shifter interposed between the transmitting-end filter and the receiving-end filter to isolate a transmitted signal of the transmitting-end filter and a received signal of the receiving-end filter from each other. The phase shifter includes a substrate provided with an input port and an output port, an inductor formed on the substrate and connected to the input and output ports, and a capacitor provided on the substrate, wherein the capacitor and inductor share a region of the substrate.

Abstract: A phase shifter circuit includes a plurality of first series circuits each comprised of a series connection of one capacitor and one resistor, a first circuit element including at least inductance connecting between a first end and a second end of a chain structure made by connecting the plurality of first series circuits in series, the first circuit element and the chain structure together constituting a first loop circuit, a plurality of second series circuits each comprised of a series connection of one capacitor and one resistor, a second circuit element including at least inductance connecting between a first end and a second end of a chain structure made by connecting the plurality of second series circuits in series, the second circuit element and the chain structure together constituting a second loop circuit, and a plurality of connection lines connecting between the first loop circuit and the second loop circuit.

Abstract: A delay line is constructed using a lossless (or low loss) transmission line which, in turn, can be constructed using an auxiliary conductor inductively coupled to the primary conductor. The auxiliary conductor is driven by the primary conductor through an active shunt network distributed along the transmission line. The auxiliary conductor is placed close enough to the primary conductor so that the two conductors have a substantial amount of mutual inductance compared to their self-inductance. In one embodiment, a combination of conductance and transconductance are used to cancel losses and control dispersion in the transmission line for high frequency signal transmission. In one embodiment, an FIR filter is constructed using the delay line.

Abstract: The length of a transmission line delay circuit is halved by inserting a directional coupler in the signal path ahead of the transmission line and either open circuiting or short circuiting the other end of the transmission line. The signal traveling through the directional coupler and through the transmission line is reflected back at the end of the transmission line, and the reflected signal is carried to the coupled output of the directional coupler. Since the signal travels through the transmission line twice, the delay time is doubled. Therefore, for a given delay requirement, the length of transmission line required is only half of the length required for prior art transmission delay lines.

Abstract: A converter includes an input circuit to receive a single-ended input signal to generate a number of control signals. The control signals have a delay different from one another relative to the single-ended input signal. The converter also includes a first output circuit and a second output circuit. The first output circuit responds to the control signals to generate a first output signal. The second output circuit responds to the control signals to generate a second output signal. The first and second output signals are non-overlapping and form a complimentary signal pair.

Abstract: A phase shift circuit and a phase shifter are achieved which are small in size and wide in bandwidth. The phase shift circuit includes a capacitor, and a series circuit composed of a switching element which exhibits capacitivity when it is in an off-state and an inductor connected in series with this switching element, the series circuit being connected in parallel with the capacitor. The capacitor and one terminal of the series circuit are connected with a high frequency signal input/output terminal, and the other terminal thereof is connected with ground.

Abstract: A phase shifter comprises: a phase shift unit including a reactance unit having a first variable capacitance device, and a susceptance unit having a second variable capacitance device, T-connected to the reactance unit; and a control unit for outputting a control signal continuously changing the capacitance of the first variable capacitance device and the second variable capacitance device to the phase shift unit. The amount of phase shift can be continuously changed by changing these variable capacitance devices continuously. Moreover, these devices can be formed on a semiconductor, thereby realizing low-voltage driving and high-speed response. Furthermore, the variance of impedance can be prevented by adjusting these two variable capacitance devices, whereby transmission efficiency can be improved.

Abstract: A semiconductor device with integrated circuits includes superimposed layers provided at different levels on a substrate, and including a metal strip (3) formed in a reference layer and through which an electric current passes, a metal ground plane (4) formed in a layer situated at a level lower than the reference layer and having a slit (5) which lies below the strip while running alongside it, an electrostatic shield (6) formed in a layer located at a level lower than the ground plane and comprising a multiplicity of spaced out bands (7), made of an electrically-conducting material, that extends across the slit, and conducting junctions (4a, 4b) making it possible to electrically connect the ends of each band to the parts of the ground plane situated on either side of its slit.

Abstract: A passive filter arrangement and a method of providing such a filter is described. The frequency response of the filter arrangement is substantially the same as the frequency response of a first filter of an order having a first value, the frequency response of the first filter being representable by a first set of one or more poles and/or one or more zeros. Descriptions of a plurality of second filters are generated, each second filter having an order lower than the order of the first value, each second filter having a frequency response representable by a one or more poles and/or one or more zeros, the one or more poles and/or one or more zeros of each lower order filter being a subset of the first set. The lower order filters are cascaded.

Abstract: The invention relates to a system and a method for applying a continuously tuned phase shift to a periodic signal. In order to avoid distortions in the output phase shifted periodic signal, it is proposed that a phase shifting according to a first control signal and a phase shifting according to a second control signal are applied to the periodic signal in parallel. Both control signals are identical to each other, but shifted in time against each other. Both control signals are varying within a specific range and are jumping between their maximum and minimum value whenever a boarder of this range is reached. The first phase shifted periodic signal and the second phase shifted periodic signal are selected alternately in a way that phase shifts which are based on a portion of a control signal close to its jumping between its maximum and minimum values are excluded.

Abstract: The invention relates to a system and a method for applying a continuously tuned phase shift to a periodic signal. In order to avoid distortions in the output phase shifted periodic signal, it is proposed that a phase shifting according to a first control signal and a phase shifting according to a second control signal are applied to the periodic signal in parallel. Both control signals are identical to each other, but shifted in time against each other. Both control signals are varying within a specific range and are jumping between their maximum and minimum value whenever a boarder of this range is reached. The first phase shifted periodic signal and the second phase shifted periodic signal are selected alternately in a way that phase shifts which are based on a portion of a control signal close to its jumping between its maximum and minimum values are excluded.

Abstract: A miniaturized phase shifter and a multi-bit phase shifter are provided, in which filters are constructed using capacitors at FET pinch-off and pass phase can be shifted by turning the FET on and off, the phase shifter including: a first FET having a drain electrode connected to an input terminal and a source electrode connected to an output terminal; a second FET, in which one of a drain electrode and a source electrode thereof is connected to the source electrode of the first FET and the other is connected to ground via a first inductor; and a third FET, in which one of a drain electrode and a source electrode thereof is connected to the drain electrode of the first FET and the other is connected to ground via a second inductor.

Abstract: An apparatus comprising a first calibration circuit and a phase shift network stage. The first calibration circuit may be configured to generate a control signal. The phase shift network stage may comprise one or more tunable phase shift elements and be configured to provide a tunable impedance. The phase shift network stage may be tuned in response to the control signal and a conductance of the tunable phase shift elements.

Abstract: An artificial line, particularly an artificial electric line, and specifically an artificial line having a constant group delay in a wide frequency range (octave bandwidths). The artificial line comprises two identical inductors of the magnitude L connected in series and having a mutual inductance M, and a capacitor of the magnitude C1 over the inductors and a shunt capacitor C2 to earth. The element values as a function of the cut-off frequency fc and the characteristic impedance Z0 are selected according to specific equations. The artificial line can then be realized as a continuously tunable artificial line or as a self-switched artificial line. The two types of artificial lines can also be cascade-coupled.

Abstract: An improved accuracy phase shifter having cascaded phase shifting modules is provided for phase shifting a pulse train which rather than utilizing two pairs of control voltage leads for each phase shifting module, utilizes only one pair to significantly reduce the electromagnetic interference between the cascaded phase shifting modules. The result is that the phase of an incoming pulse train can be shifted from 0 to 360° in 3° increments with +/−1° accuracy. When the subject phase shifter is utilized in long haul fiber-optic cable networks operating at 10 gigabits/sec. for correcting phase offsets of data streams transmitted over ultra long distances, the utilization of the subject phase shifter plays a part in obviating the necessity of having regeneration units every 70 to 100 miles, thus permitting error-free transmission over as many as 2500 miles without the requirement for regeneration.

Abstract: An improved accuracy phase shifter having cascaded phase shifting modules is provided for phase shifting a pulse train which rather than utilizing two pairs of control voltage leads for each phase shifting module, utilizes only one pair to significantly reduce the electromagnetic interference between the cascaded phase shifting modules. The result is that the phase of an incoming pulse train can be shifted from 0 to 360° in 3° increments with +/−1° accuracy. When the subject phase shifter is utilized in long haul fiber-optic cable networks operating at 10 gigabits/sec. for correcting phase offsets of data streams transmitted over ultra long distances, the utilization of the subject phase shifter plays a part in obviating the necessity of having regeneration units every 70 to 100 miles, thus permitting error-free transmission over as many as 2500 miles without the requirement for regeneration.

Abstract: An electronic warfare system for detecting missiles which appear as points in an IR image. The system includes a point detect filter with two stages. The first stage produces a characteristic rabbit ear pattern in response to a pulse. The second stage produces a pulse in response to the rabbit ear pattern.

Abstract: ? Device for cancelling the effects of the reflection in a signal transmission system (10) including a driver (12) and a plurality of n receivers (14, 16) wherein signals are sent according to a multipoint topology from the driver to the receivers, each receiver having an internal capacitance and sending back reflection signals to the driver each time a signal is transmitted thereto by the driver. The device comprises circuit means causing the signal resulting from the sequential reflections due to a given receiver and then due to the driver to have the same magnitude but the reverse sign as the sum of all signals received in the given receiver resulting from the reflections due to all receivers, and the net linking the driver to each receiver comprises delay means (40) enabling the propagating time of a signal sent from the driver to this receiver to be identical for each receiver, whereby the total sum of all reflection signals arriving in the given receiver at the same time is equal to zero.

Abstract: A signal amplification system involves transforming at least one signal to be amplified into at least one transformed signal which is amplified and the resulting amplified transformed signal(s) can be used to produce a version(s) of the at least one original signal. The at least one transformed signal can be produced from the at least one original signal by using the at least one original signal to amplitude and/or angle (phase or frequency) modulate the at least one original signal. After amplification of the at least one transformed signal, the resulting at least one amplified transformed signal is de-modulated to produce a version(s) of the at least one signal. In transforming the at least one original signal to produce the at least one transformed signal, the at least one original signal is transformed into a more desirable form, such as a more power efficient form, for amplification.

Abstract: A non-mechanical electrically adjustable delay device which does not suffer from interruptions in impedance inherent in multiple-tap delay lines. The wide band electrical delay line is capable of delaying a wide band of signals without significant distortion, e.g., up into the microwave range, and allows continuous transmission of a signal between the input port and the output port. The exemplary wide band electrical delay line comprises two transmission lines, preferably parallel to one another, and having different propagation velocities. A plurality of electrical cross connect circuits are connected between the two transmission lines. The electrical cross connect circuits are spaced along the lengths of the two transmission lines, e.g., preferably to form evenly spaced distances therebetween. The total delay through the wide band electrical delay line is adjusted by selectively activating an appropriate one of the plurality of cross connect circuits between the two transmission lines.