Abstract: A variable equalization system is disclosed, in which a plurality of amplification cells having a plurality of filter groups with natural frequencies progressively increased four times are connected in series or in parallel, thereby making possible a variable equalization over a wide range of cable length.

Abstract: A first operational amplifier (OP AMP) is connected at the positive input terminal to a signal input terminal. The positive output terminal of the first OP AMP is connected to a ground through a first capacitor, and to the positive input terminal of a second OP AMP. The positive output terminal of the second OP AMP is connected to positive input terminal of the first OP AMP via a second capacitor, and to the input terminal of a buffer. The output terminal of the buffer is connected to the negative input terminal of the first OP AMP, and to the positive input terminal of the first OP AMP via the connected series of the first and second resistors. The connection point of these resistors is connected to the negative input terminal of the second OP AMP. The output terminal of the buffer is connected to a signal output terminal. When the resistances of these resistors are equal, the circuit has a phase equalizer characteristic.

Abstract: A phase equalizer with a pair of ceramic resonators with different resonant frequencies than each other provides convex group delay time characteristics, which compensates for the concave group delay time characteristics of a ceramic filter. Thus, the flat group delay time characteristics in the combination of a ceramic filter and a phase equalizer is obtained, and excellent speech quality in analog signal transmission and/or excellent error rate in data transmission is obtained, while keeping excellent selectivity in a wireless communication system.

Abstract: In one embodiment, the video signal generator outputs a standardized analog video signal. The signal generator includes a clock controlling a sequential address generator. The address generator activates a memory device that is, for example, a ROM. A distortion conditioned standardized digital video signal is stored in the ROM. This distortion conditioned signal has distortion correction characteristics matching an output filter. Following the ROM is a D to A converter that converts the conditioned digital video signal into a conditioned analog video signal. A simple filter follows the D to A converter. The filter introduces distortion into the signal applied at its input but since that signal already has distortion correction characteristics therein, the distortion correction characteristics of the input signal match and substantially cancel the distortion introduced into that signal by the filter. Therefore, a standardized analog video signal is produced at the output of the filter.

Abstract: In a waveform equalizer of the present invention, first and second Hilbert-transform signals are formed from a parallel-reproduced signal, and a desired signal is obtained from these signals by an operational amplifier. The waveform equalizer includes a reflecting section having a plurality of resistors, and a switching section for selecting one of the resistors in accordance with a control signal. Therefore, the waveform equalizer can process a plurality of reproduced signals which have different ratios of the longitudinal signal component to the perpendicular signal component without being affected by inphase noise.

Abstract: A circuit and method are provided to compensate for the non-linear delay characteristics of a digital audio system introduced by the systems anti-aliasing filter. The circuit and method provide for introducing time delay to the digital system at the low and mid range frequencies, and adding decreasing amounts of time delay at the high frequency ranges to produce an overall composite time delay for the digital system which is relatively constant over its operating frequency range. The delay equalizer used to achieve such delay compensation is made up of active delay equalizer sections which are non-interactive, and which are independently tunable in terms of each sections center frequency and Q. An active delay equalizer section with a second order bandpass transfer functions has been devised to achieve this capability. It is comprised of an operational amplifier having input resistance and feedback resistance connected to its inverting input and a twin-T network connected in its non-inverting input.

Abstract: An equalizer is provided with a branching device for branching a digitally modulated signal into two outputs. A series of weighting devices weights one of the outputs of the branching means, and a series of second weighting devices equal to or fewer in number than the first weighting devices weights the remaining output of the branching means. Combining elements equal in number to the first weighting devices combine two or three inputs, and delaying means fewer in number than the combining elements are interconnected with the combining elements in a sequential, alternating manner. The outputs of the first weighting devices are respectively applied to the combining elements while those of the second weighting devices are respectively applied to selected ones of the combining elements. The invention provides a construction where the number of taps of the equalizer may be easily increased without creating the necessity of combining circuits having an increased number of inputs.

Abstract: In a data transmission system including a transmission medium that is subject to fast fades of duration longer than individual data symbols to be transmitted, a chirp filter is provided for time-spread processing the data signals prior to transmission. The processing spreads the energy of each symbol over an interval longer than the length of expected individual fades. In a receiving terminal inverse processing is provided to remove the chirp effect.

Abstract: A constant resistance loss/slope filter circuit has a plurality of cascaded circuit sections. Each circuit section has a fixed resistive pad and a slope equalizer. Each circuit section also has a switch for switching inputs and outputs of the circuit sections between the fixed resistive pad and the slope equalizer. Each of the circuit sections has a fixed resistive pad with a different predetermined value loss and a slope equalizer with a different predetermined value of a slope.

Abstract: An arrangement for the equalization of attenuation and time delay in a microwave filter utilizing waveguide technology. An equalizer composed of a multi-circuit cavity resonator is coupled via a first coupling aperture to a waveguide which is connected to the filter. The resonator includes at least two individual waveguide sections coupled to each other via a second coupling aperture. The coupling apertures are dimensioned so that the resonator is critically coupled with respect to time delay characteristics. The resonator includes a power-absorbing tuning device for tuning all of the waveguide sections to substantially the same quality factor. The second coupling aperture presents a stepped cross section defining a first area and a second area having a larger cross section than the first area. The resonator further includes at least two screws arranged symmetrically with respect to the longitudinal axis of the resonator and protruding laterally into the second area of the second coupling aperture.

Abstract: Cabling (10) is provided for interconnecting amplifier (12) having a positive side (14) and a return side (16) to a load (18) having a positive side (20) and a return side (22). The cabling comprises a first open circuited conductor (24) having a first end (26) connected to a selected one of the amplifier positive side (14) and the amplifier return side (16) and having a second end (28) extending towards and terminating free from connection to the load (18). A second open circuited conductor (30) is provided which has a first end (32) connected to a respective one of the load positive side (20) and the load return side (22), said respective one being of a different polarity than the polarity of the selected one of the amplifier positive side (14) and amplifier return side (16) to which the first open circuited conductor (24) is connected and having a second end (34) extending towards and terminating free from connection to the amplifier (12).

Abstract: An automatically variable all-pass circuit includes a variable impedance circuit for changing the shape of the phase characteristic of the output signal of the all-pass circuit as a function of the amplitude of the output signal of the circuit.

Abstract: An equalizer equalizes a reproduced waveform reproduced by a thin film magnetic head by reproducing information recorded magnetically on a medium. In the equalizer, the reproduced waveform is delayed to a position of an undershot portion, and is attenuated to an amplitude corresponding to a magnitude of the undershot portion, and the resultant waveform is superposed on the reproduced waveform, to thereby eliminate the undershot portion. Furthermore, by superposing a waveform obtained by inverting the reproduced waveform and amplifying or attenuating the inverted waveform, on the reproduced waveform at a half power position thereof, the width is narrowed.

Abstract: In order to remove at least one of amplitude and delay distortions which tend to occur during signal transmission, the invention features circuitry wherein a received IF digital signal is fed through an equalizer circuit to a demodulator and wherein the demodulator outputs a series of data and error signals to a control signal generator. The control signal generator produces in-phase and quadrature control signals which are appropriately added and subtracted and subsequently averaged in an adder and subtracter circuit before being applied to a series of equalizers in the equalizer circuit.

Abstract: A voltage controlled equalizer has two parallel signal paths. A first signal path is provided by a delay line coupled to an input of an amplifier. A control circuit is coupled between an input of the delay line and an output of the amplifier, via a second, parallel signal path. A control signal is applied to the control circuit to adjust the gain of the second signal path, thereby adjusting an amplitude versus frequency response characteristic of the equalizer. Signal delays caused by the control circuit are preferably selected substantially equal to those of the amplifier to compensate for undesired phase shifts of high frequency signals in the second signal path.

Abstract: A method is disclosed for eliminating group delay distortion resulting from filtering an information-carrying analog signal. The method allows an analog signal to be converted to digital form and back again with zero group delay distortion. The analog signal is first band or low pass filtered with a filter having a pass band substantially larger than that required to filter only the signal of interest. The filtered signal is then digitized at a rate appropriate to the filtered signal, digitally filtered to remove all but the signal of interest, and down sampled to the transmission rate. A substantially reversed process is described for reconverting the digital signal to analog form. The method is shown to be equally effective with a multiplexed signal.

Abstract: A bandpass filter has a plurality of cascade wave-guide cavities each resonating in three independent orthogonal modes. The cavities can be cylindrical or have a square cross-section. Where the cavities are circular, each cavity resonates in TE.sub.111 or TE.sub.010 modes simultaneously. Where the cavities have a square cross-section, each cavity resonates in TE.sub.011 and TM.sub.110 modes simultaneously. Between each triple-mode cavity, there is located an iris having an aperture with four separate radial slots that are offset from a center of the iris. The filter is capable of producing an elliptic function response. In a variation of the invention, an allpass filter has an output that is short circuited and, when used in conjunction with a circulator, it functions as a group delay equalizer. Previous triple-mode filters are not capable of producing an acceptable result relative to dual-mode filters.

Abstract: A bandpass filter has a plurality of cascade waveguide cavities each resonating in three independent orthogonal modes. The cavities can be cylindrical or have a square cross-section. Where the cavities are circular, each cavity resonates in TE.sub.111 or TE.sub.010 modes simultaneously. Where the cavities have a square cross-section, each cavity resonates in TE.sub.011 and TM.sub.110 modes simultaneously. Between each triple-mode cavity, there is located an iris having an aperture with four separate radial slots that are offset from a center of the iris. The filter is capable of producing an elliptic function response. In a variation of the invention, an allpass filter has an output that is short circuited and, when used in conjunction with a circulator, it functions as a group delay equalizer. Previous triple-mode filters are not capable of producing an acceptable result relative to dual-mode filters.

Abstract: Apparatus and method for phase scatter detection and reduction in a digital signal transmitted over a channel, for example a magnetic recording and reproducing channel. The transmitted signal is equalized to compensate for a non-constant amplitude response and/or non-linear phase response of the channel. A bit synchronization circuit, employing a controllable frequency reference clock signal generator and a digital phase detector, provides a reference clock synchronized with the transmitted data. The amount of phase scatter in the equalized signal is determined by monitoring the switching frequency of the phase detector. The equalizer may be adjusted to minimize that frequency, thereby reducing phase scatter.

Abstract: A graphic equalizer comprises an equalizer for separately level adjusting the input signal for each of a number of divided frequency bands which are different from each other, control knobs provided one for each of the divided frequency bands, which are operated for carrying out level adjusting of the equalizer, a spectrum analyzer supplied with the output signal of the equalizer and having a display for displaying the level of each of the divided frequency bands, and a casing provided with a panel face having the control knobs and the display section of the spectrum analyzer disposed in a corresponding relationship to each other and accommodating the equalizer and the spectrum analyzer therein.

Abstract: A delay equalizer includes an amplifier with differential inputs, to which an input of the equalizer is coupled via first and third impedance circuits, and which are coupled to circuit ground via second and fourth impedance circuits, respectively. One of the first and second impedance circuits is constituted by a resistor, the other by a frequency-dependent network consisting of one or more tuned network sections. The third and fourth impedance circuits can similarly be a frequency-dependent network and a resistor or, desirably, two resistors. The amplifier can be a bipolar transistor whose base and emitter form the differential inputs. The equalizer can also include input and output impedance-matching amplifier stages, which may also provide amplitude equalization.

Abstract: An audio apparatus includes a signal generating circuit for generating a first electrical audio frequency signal corresponding to audio information received from a source, such as a phonograph turntable, tape recorder or FM/AM tuner. A loudspeaker generates an acoustic signal in response to the first audio frequency signal, and a microphone pick-up receives the acoustic signal for generating a corresponding second electrical audio frequency signal. A filter network then separates the first and second audio frequency signals into respective low, mid and high-frequency ranges, and three comparator circuits compare the first and second audio frequency signals in each frequency range and produce a respective error signal in each frequency range.

Abstract: In a transversal filter equalizer, such as one using a tapped delay line, the present invention combines the symmetrically located pairs of tap signals, by means of adders and subtracters, to provide partial output signals which are separately controlled in amplitude and phase. These partial output signals, which have no d.c. components, are then summed with a partial signal derived from the center tap reference signal to reinsert the d.c. component and to provide the equalized output signal.

Abstract: An equalization circuit with switched capacitor filters, each having variable filter characteristics, that is adapted to provide power equalization on digital transmission lines that are subject to power losses for high frequency signals. The power equalization is provided automatically by switching in or out of a filter one or more of its capacitors in response to detected variations in line power levels. Identical filters are connected in parallel and alternatively applied within the equalizer circuit, the capacitor switching occurring only in a filter circuit that is not actively applied within the equalizer circuit.

Abstract: The active equalization circuit utilizes an electronic potentiometer inserted between the output of an addition amplifier and the input of the equalization structure, wherein the controlled output signal of the potentiometer is supplied to the addition input of the addition amplifier via the series circuit of an impedance transformer and of an impedance. A control network with at least one current controlled circuit functions as the electronic potentiometer. This current controlled circuit being inserted between the input of the impedance transformer and the output of the addition amplifier, and/or between the input of the impedance transformer and the input connection of the equalization structure. The active equalization circuit can be advantageously inserted in a hybrid arrangement between the output of a hybrid circuit connected to a two-wire line and the input of an echo compensator, where the echo compensator is controlled via a control circuit by the output signal of the echo compensator.

Abstract: The invention involves a self-adjusting equalizer configuration which automatically adjusts to the cable length. The equalizer configuration has band limitation for the transmission of digital signals and consists of an equalizing amplifier, a correction filter, and an amplitude control loop with a comparison of actual and nominal values. The object of the invention is to specify a circuit in which the correction filter is not located in the signal path. This object is achieved in such a way that the equalizing amplifier is located in the signal path, and the correction filter is placed in the amplitude control loop so that the output signal of this correction filter represents the actual value for the amplitude control loop.

Abstract: A video signal processing device including emphasis and/or de-emphasis circuit being arranged to have a circuit to emphasize a high frequency component of a video signal which has been introduced at a time of frequency modulation in a linear phase. Further, the circuit clips an output of the emphasis circuit with a prescribed amplitude and at the same time supplies a frequency modulated video signal to a de-emphasis circuit which has a characteristic of being contrary to the frequency characteristic of the emphasis circuit.

Abstract: In a circuit arrangement for automatically correcting frequency response so as to set a desired frequency response in view of a frequency response of a sound field, a frequency response control circuit is improved such that precise level control at a number of bands is effected with a simple structure. A microcomputer is used to determine the difference between a desired frequency response curve and a frequency response curve obtained by measuring the sound pressure level in a sound field, to which pink noise or the like is emitted through the frequency response control circuit, so as to produce a control signal used in the frequency response control circuit to give a desired frequency response to an audio signal.

Abstract: The adaptive auto-orthogonalizing equalizer in the discrete frequency domain comprises a filter with N cells operating by the overlap-save method, a decision element which assigns one of the possible levels to the filtered samples, and a control circuit which at each iteration varies the cell gains on the basis of the input samples, the output samples and the decided symbols, and which comprises an estimator (S.sub.A) for estimating the gradient of the mean square error, an estimator (S.sub.B) for estimating a matrix which modifies said gradient such that its direction always passes as close as possible to the minimum to be sought, a projector (P.sub.S) for projecting said corrected gradient into a constraint region, and a circuit for adjusting the filter cell gain vector at each iteration.

Abstract: A circuit for adaptively equalizing a digital signal to compensate for distortion introduced by a transmission medium. The circuit includes a first feedback path for modifying the input signal which is to be equalized to an extent controlled by a control input signal. A second feedback path modifies the input signal to an extent which tends to overcompensate the signal for the transmission distortion. Further, means are provided to modify the signal so as to undercompensate it for the transmission distortion. Error detectors detect pseudo bit errors in the overcompensated and the undercompensated signal, and a control input signal is generated for the first feedback path, dependent on the difference between the errors detected in the overcompensated and undercompensated signal.

Abstract: An auto-equalizer for passing data pulses of the type which tries to restore the relative amplitude of the first and third harmonics of the data signal frequency while deemphasizing the amplitude of other higher harmonics. The present invention accomplishes the relative harmonic amplitude restoration by controlling the resistance in a tuned circuit element affecting the gain of a signal passing amplifier. The adjustment of the resistance directly affects the Q of the tuned circuit involved.

Abstract: A variable amplitude delay equalizer network comprising generally a 90.degree. hybrid matrix consisting of toroidal transformer and two capacitors and having an input, an output and two reference ports. A reactive network at the first reference port forms a network which allows input energy to be shifted in phase and returned to the hybrid, thus providing envelope delay correction. An amplitude corrective network at the second port permits adjustment of the amplitude response essentially independent of envelope delay adjustment.

Abstract: A time constant circuit capable of switching the characteristic, which is realized by a combination of an equivalent resistor made up of a switched capacitor and an ordinary capacitor, comprises a capacitor of the switched capacitor or the time constant circuit connected in parallel to a series circuit including a switching device and an additional capacitor. The characteristic is switched by turning on and off the additional capacitor by the switching device. The direct connection of a plurality of equivalent resistors with a plurality of switched capacitors and ordinary capacitors makes up an equalizer. The capacitor making up a switched capacitor is connected with a switching device and an additional capacitor so that the frequency characteristic of the equalizer is switchable by turning on and off the switching device. Each of the capacitors making up the switched capacitors, the capacitors making up the time constant circuits and the additional capacitors has an end thereof grounded.

Abstract: A circuit for providing decision feedback equalization uses a variable gain differential amplifier as a level detector and variable gain adjustment to provide nondelayed positive feedback and bit time delayed intersymbol interference compensating feedback to both enhance the amplitude of the present bit and reduce the intersymbol interference of one or more prior bits in a pulse bit stream.

Abstract: An adjustable slope equalizer is disclosed for maintaining a predetermined output level at a predetermined frequency. An equalizer comprises: an adjustable input means; a first voltage divider means having an output and having an input operatively connected to the low impedance input means; a second voltage divider means having an output and having an input operatively connected to the low impedance input means; an adjustable high impedance means having an output and having at least two inputs operatively connected to the outputs of the first and second voltage divider means; and a SAG correction means operatively connected to the output of the adjustable high impedance means. The output of the SAG correction means has the predetermined output level at the predetermined frequency for any setting of the adjustable high impedance means.

Abstract: An equalizer designed to correct both precursor and postcursor distortion in signal samples periodically obtained from a train of digital symbols comprises two parallel circuit branches each including a delay line preceded by a linear upstream filter for postcursor suppression in the case of the first branch and precursor suppression in the case of the second branch. A decision stage in parallel with the delay line of the first branch works into a nonlinear downstream filter delivering a precursor-correcting signal to an adder which also receives precorrected earlier signals from the two delay lines. A second decision stage connected to an output of the adder feeds back to that adder a postcursor-correction signal via another nonlinear downstream filter. The purged signal emitted by the second decision stage may be subjected to additional filtering and precursor/postcursor correction with the aid of another adder and a third decision stage provided with a further feedback loop.

Abstract: A line equalizer including a .sqroot.f equalizer for compensating a .sqroot.f-characteristic of a transmission line, a BT equalizer connected in series with the .sqroot.f equalizer for removing an echo component caused by a bridged tap (namely, BT) on the transmission line, and a circuit for controlling the .sqroot.f equalizer is disclosed. A signal applied to the .sqroot.f equalizer is subjected to over-equalization to make the time domain length of impulse response at the output of the .sqroot.f equalizer small. The equalization state of the output of the .sqroot.f equalizer is judged by signals formed in the BT equalizer, and the gain of the .sqroot.f equalizer is controlled on the basis of the result of judgement. In this manner, the .sqroot.f equalizer is controlled without suffering any interference between a control loop of the .sqroot.f equalizer and a control loop of the BT equalizer.

Abstract: An equalizer for non-loaded telephone lines comprises an active switched-capacitor biquadratic filter including two differential amplifiers. An unswitched capacitor connected between the output and inverting input of one amplifier is variable to vary the equalizer response, the output being derived from the output of the other amplifier. One or more through-switched input capacitors can be simultaneously variable to provide a fixed equalizer gain at a predetermined frequency. The variable capacitors are constituted by fixed capacitors selectively switched in parallel with one another.

Abstract: An equalizer circuit for use in a communication unit comprises a variable amplitude equalizer (VAE) and a variable group delay equalizer (VDE). The variable amplitude equalizer (VAE) is able to vary only an amplitude frequency response continuously without varying a group delay frequency response, while the variable group delay equalizer (VDE) is able to vary only a group delay frequency response continuously without varying an amplitude frequency response, both being able to adjust the amplitude and group delay frequency responses, respectively, in an independent manner. Preferably, the variable group delay equalizer (VDE) includes an amplitude correcting portion and is structured such that amplitude distortion caused in a delay portion can be corrected by a signal from the amplitude correcting portion.

Abstract: An equalization network is disclosed combining negative slope equalization with low pass filtering and low frequency compensation. The network is for use on electrical lines transmitting electrical signals in the voice frequency range and includes circuitry for inputting and equalizing the electrical signal on an incoming line. A circuit for reverse equalizing the electrical signal, first and second circuits for equalizing the signal, circuits for low pass filtering the signal followed by a supplemental equalization circuit and then a circuit for outputting the signal to the outgoing electrical line are provided.

Abstract: A group delay compensation circuit for a television transmitter comprises a signal source coupled to a series resonant circuit. A means is present for changing the resonant circuit Q without changing the amplitude of an output signal derived from the resonant circuit. A difference amplifier is coupled to the resonant circuit and to the signal source. The means can be a voltage divider and a variable resistor coupled to the divider. Changing the Q varies the group delay.

Abstract: An equalizer arrangement comprises a fixed-characteristic equalizer which is supplemented by a variable-amplitude notch equalizer to enable proper equalization of signals transmitted via cables of arbitrarily mixed cable gauges. Automatic control of the notch amplitude is provided by detecting a predetermined signal level in the equalized signal, comparing this with its correct value, and controlling an up/down counter accordingly. The count of the counter determines a current flow through a diode which constitutes a variable resistance of the equalizer.

Abstract: An equalizer apparatus suitable for use in a MODEM for receiving a signal having passed through a number of carrier-band lines is disclosed in which the number of carrier-band lines is detected from a training signal, and electrical connection of a fixed equalizer to a variable equalizer is controlled on the basis of the number of carrier-band lines, in order to form a precise, simple automatic equalizer apparatus.

Abstract: An equalizer circuit is provided which has a high D.C. stability without degrading the equalization characteristic. The equalizer circuit comprises an equalizer amplifier, an equalizer element, a direct current component detecting circuit, and a negative feedback circuit. The equalizer amplifier amplifies an input signal of the equalizer circuit in accordance with RIAA equalization characteristic. The output of the equalizer amplifier is applied to the equalizer element which has an impedance corresponding to an inversed RIAA equalization characteristic. The output from the equalizer element, which is not subject to the RIAA equalization characteristic due to the provision of the equalizer element, is supplied to the direct current component detecting circuit in order to derive a direct current component from the output. The derived direct current component is negative fed-back to the equalizer amplifier as a negative feedback signal thereof.

Abstract: An equalizer apparatus for audio equipment capable of selecting between a 2-speaker system and a 4-speaker system, including a display device indicating proper operation of the control knobs of the equalizer. The display device includes a first illuminable element of a first color for indicating operation of one channel of stereophonic sound reproduction, a second illuminable element of a second color for indicating operation of the other channel of stereophonically reproduced sound, and color coded means corresponding to said first and second colors for indicating which of the control knobs produce data signals for the first channel and which of the control knobs produce data signals for the second channel. Further, the color coded means may indicate which of the control knobs produce data signals for each of the divided frequencies of the respective channels during operation of the audio equipment in the manner simulating quadriphonic sound.

Abstract: An equalization amplifier (30) is disclosed which includes two amplifier stages (32, 34) connected in cascade. The first amplifier stage (32) includes a low pass filter amplifier (40) having a pole frequency of F1 and a feed forward path (36) bypassing the low pass filter amplifier. The feed forward path provides the input signal to an adder circuit (42) where it is added to the output of the low pass filter amplifier. The effect of this addition is to provide the first amplifier with a zero frequency of F2, where F2 is greater than F1. The resulting sum signal is applied to the second amplifier stage (34) which also has a low pass filter characteristic. The second filter has a pole frequency of F3, where F3 is greater than F2. The equalization amplifier is particularly useful for providing RIAA equalization of phono cartridge output signals.

Abstract: An equalizer of a transversal filter type is given a substantially constant gain at a preselected frequency (f.sub.p) in a predetermined frequency band of an input and an output signal. For this purpose, the output signal is given by multiplying the routine transversal filter output by a reciprocal of an absolute value of a sum of complex tap gains (C.sub.1 to C.sub.N+1). Alternatively, the input signal and successively delayed signals (IN and D.sub.1 to D.sub.N) may be multiplied by the reciprocal before summation. It is possible to approximate the reciprocal by omitting those of the tap gains which are near both ends (as C.sub.1 and C.sub.N+1).

Abstract: A switched capacitor all pass filter which provides an output signal having substantially linear magnitude and phase response is provided. A transfer function which represents an all pass filter and which has a predetermined phase response is provided. A filter/phase equalizer structure having integrating operational amplifiers and various feedback portions which represent the transfer function is also provided.

Abstract: The odd order auto-corrected electric filter comprises first input matching means for receiving the input signal and transmitting it to filter means for bringing about a broad band filtering of the signal and transmitting it to second output matching means. Correction means placed between at least two filter members bring about a self-correction of the envelope delay and/or an amplitude correction.

Abstract: An equalizer for loaded telephone lines comprises a switched-capacitor summing amplifier which sums the input to and output from the filter in proportions which vary with the capacitances of two variable capacitors. The variable capacitors are constituted by a plurality of fixed capacitors which are switched to form part of one varibale capacitor or the other, so that the sum of the capacitances of the variable capacitors is constant.