Readily Severable Into Independent Resistors Patents (Class 338/203)
  • Patent number: 11302462
    Abstract: A method of manufacturing resistor units that each comprise a carrier comprising resistor elements including ends with a respective first and second electrical terminal is disclosed. The method includes: a) providing a carrier plate; b) forming strips of a resistor material at the lower side of the carrier plate in a regular pattern such that a respective row of strips of the resistor material is formed along a longitudinal direction; c) forming a plurality of zones of an electrically conductive material at the lower side of the carrier plate in a regular pattern such that a respective row of zones of the electrically conductive material is formed along the longitudinal direction; and d) cutting through the carrier plate by regular transverse incisions, first longitudinal incisions, and second longitudinal incisions such that a respective resistor unit and a respective residual section are alternately formed along a transverse direction.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: April 12, 2022
    Assignee: VISHAY ELECTRONIC GMBH
    Inventors: Bertram Schott, Ondrej Sobora, Kerstin Tillmann
  • Patent number: 10984927
    Abstract: A PTC thermistor switch for electric motors includes an insulating casing and a PTC thermistor housed in a housing seat made in the insulating casing. The PTC thermistor has a first face and a second face opposite the first face. A first electric terminal is housed in the insulating casing and has two protrusions in direct contact with the first face of the PTC thermistor in two opposite contact points with respect to the center of the first face. The switch also includes a second electric terminal housed in the insulating casing and an elastic arm portion in direct contact with the second face of the PTC thermistor in an intermediate contact point between the contact points of the protrusions. The second electric terminal is arranged so that the elastic arm portion presses against the second face of the PTC thermistor.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: April 20, 2021
    Assignee: ELECTRICA S.R.L.
    Inventors: Fabrizio Rotulo, Pietro Cecconi
  • Patent number: 10418157
    Abstract: Resistors and a method of manufacturing resistors are described herein. A resistor includes a resistive element and a plurality of conductive elements. The plurality of conductive elements are electrically insulated from one another via a dielectric material and thermally coupled to the resistive element via an adhesive material disposed between each of the plurality of conductive elements and a surface of the resistive element. The plurality of conductive elements is coupled to the resistive element.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: September 17, 2019
    Assignee: Vishay Dale Electronics, LLC
    Inventors: Clark Smith, Todd Wyatt
  • Patent number: 10121574
    Abstract: The resistor includes a chip resistive element which includes a resistive element and metal electrodes and which is formed on first surface of a ceramic substrate, metal terminals electrically joined to the metal electrodes, and an Al member formed on the second surface side of the ceramic substrate, wherein the ceramic substrate and the Al member are joined using an Al—Si-based brazing filler metal, the metal electrodes and the metal terminals are joined to each other using a solder, and a degree of bending of an opposite surface of the Al member opposite to a surface on the ceramic substrate side is in a range of ?30 ?m/50 mm to 700 ?m/50 mm.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: November 6, 2018
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventors: Toshiyuki Nagase, Masahito Komasaki
  • Patent number: 9645174
    Abstract: A resistive voltage divider includes a first resistor and a second resistor electrically connected in series. Each of the resistors is made of an electrically resistive film material and applied in the form of a trace onto an insulating substrate. The divider's voltage ratio has a value between one hundred and one million, where two ends of the trace of the second resistor overlap at least in part with a first and a second) contacting terminal, respectively, and two ends of the trace of the first resistor overlap at least in part with the first and third contacting terminal, respectively. In order to decrease the parasitic capacitance between the first contacting terminal and the third contacting terminal, the second contacting terminal is placed with at least a screening part between the first and the third contacting terminals.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: May 9, 2017
    Assignee: ABB AG
    Inventors: Adrian Hozoi, Rolf Disselnkötter
  • Patent number: 9583242
    Abstract: A resistive voltage divider includes at least a first and a second resistor electrically connected in series. The resistors are made of an electrically resistive film material and each resistor is applied as a trace onto an insulating substrate. The divider's voltage ratio has a value between one hundred and one million. In order to achieve these high voltage ratios, a third resistor is electrically connected in parallel with the second resistor. The trace of the second and of the third resistor each overlap on one end at least in part with a first contacting terminal and on the respective other end at least in part with a second contacting terminal. A compact size of the divider is maintained by arranging the first and second contacting terminals in an interdigitated manner.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: February 28, 2017
    Assignee: ABB AG
    Inventors: Adrian Hozoi, Rolf Disselnkotter
  • Patent number: 8367986
    Abstract: A positive temperature coefficient (PTC) superimposed impedance polymeric (SIP) compound including an electrically insulating matrix essentially consisting of a siloxane polymer in addition to first and second electrically conductive particles having different properties with respect to surface energies and electrical conductivities. A multi-layered, ZPZ, foil including a PTC SIP compound of the invention present between two metal foils, thereby forming a conductive composite body. A multi-layered device, including an essentially flat composite body made up from a PTC SIP compound according to the invention, two electrode layers adhering to the surfaces of the composite body, the electrode layers being metal foils prepared to connect to electrodes.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: February 5, 2013
    Assignee: Conflux AB
    Inventors: Fredrik Von Wachenfeldt, Per-Göran Mikael Mortenson, Gunnar Nyberg, Lars-Ove Nilsson, Joachim Sjöstrand
  • Patent number: 7414514
    Abstract: The invention relates to resettable chip-type over-current protection devices and methods of making the same, characterized by directly forming upper and lower electrode conductor and connection electrode conductor on a PPTC substrate so as to constitute a simplified three-layer structure of “electrode conductor-PPTC substrate-electrode conductor.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: August 19, 2008
    Assignee: Inpaq Technology Co., Ltd.
    Inventors: Kang-Neng Hsu, Kun-Huang Chang
  • Patent number: 7334318
    Abstract: A method of manufacturing an inexpensive fine resistor which do not require dimensional classifications of discrete substrates is disclosed. The method eliminates a process of replacing a mask according to a dimensional ranking of each discrete substrate. The method includes: dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; forming a top electrode layer on a top face of the discrete substrate; forming a resistor layer such that a part of the resistor layer overlaps the top electrode layer; forming protective layers so as to cover the resistor layer; and forming side electrode layer on a side face of the discrete substrate such that the side electrode layer is electrically coupled to the top electrode layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: February 26, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 7205880
    Abstract: A trimmer resistance component of the present invention has a trimmer resistor constructed of a p-type diffusion layer formed on the surface of an n-type epitaxial layer. A first electrode is connected to a portion located on one end side of this trimmer resistor, while a first connection portion, a second connection portion and a third connection portion of the second electrode are connected to portions located on the other end side. By cutting a portion of the first connection portion and a portion of the second connection portion by laser trimming, a resistance value between the first electrode and the second electrode can be trimmed without changing a parasitic capacitance between the trimmer resistor and the n-type epitaxial layer.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: April 17, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Naoki Fukunaga
  • Patent number: 7203049
    Abstract: The over-current protection device of the present invention uses the unbalanced properties of the thermal expansion coefficients between the outer and inner sides for an upper metallic conductive sheet and a lower metallic conductive sheet to generate a torque to deform outwardly. The torque is used to pull a current-sensing element and present with at least a cracking face, so as to introduce an electrically open effect similar to a fuse. Thus, the present invention can achieve the object for preventing the danger of circuit system by the short circuit during the burning of over-current protection device.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: April 10, 2007
    Assignee: Polytronics Technology Corporation
    Inventors: Edward Fu-Hua Chu, David Shau-Chew Wang, Yun-Ching Ma
  • Patent number: 7188404
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: March 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 7165315
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: January 23, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 6935016
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: August 30, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 6895660
    Abstract: The present invention discloses a manufacturing method of an over-current protection device, characterized in that the PTC plaque is conducted by punching under frozen state to form the over-current protection devices so as to reduce the heating and temperature rising in the PTC plaque due to punching and temperature difference between the metal foil and the conductive composite material. Relatively, the deformation and stress of the over-current protection device caused by punching will also be reduced. Therefore, there is no need for additional process to increase the temperature sensitivity and electrical property stability of the over-current protection device.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: May 24, 2005
    Assignee: Polytronics Technology Corporation
    Inventors: Edward Fu-Hua Chu, David Shau-Chew Wang, Chih-Ming Yu
  • Patent number: 6856235
    Abstract: A method of making resistors includes providing a sacrificial layer. Conductive material is then formed over a region of the sacrificial layer. Resistive material is then deposited over the first surface of the sacrificial layer such that the resistive material covers the sacrificial layer and the conductive material. A portion of the sacrificial layer is then removed to expose the conductive material. A method of making resistors includes the steps of providing a sacrificial layer, removing at least a portion of the sacrificial layer from regions of the sacrificial layer so as to create a plurality of cavities within the sacrificial layer, plating said cavities with a conductive material, disposing resistive material over the first surface of the sacrificial layer such that resistive material covers the sacrificial layer and said conductive material, and removing at least a portion of said sacrificial layer to expose the conductive material.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: February 15, 2005
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Publication number: 20040252009
    Abstract: A chip resistor includes a resistor element in the form of a chip, and at least two electrodes formed on the resistor element. The resistor element includes an upper surface, a lower surface, and two end surfaces extending between the upper and the lower surfaces and spaced from each other. The two electrodes are provided on the lower surface of the resistor element. Each of the end surfaces of the resistor element is formed with a conductor film integrally connected to a corresponding one of the electrodes. The conductor film is made of copper, for example, and is higher in solder-wettability than the resistor element.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 16, 2004
    Applicant: ROHM CO., LTD.
    Inventor: Torayuki Tsukada
  • Publication number: 20040233035
    Abstract: A microelectronic assembly, including a microelectronic element such as a semiconductor chip and a dielectric material covering the chip and forming a body having a bottom surface. The assembly includes conductive units having portions exposed at the bottom surface, posts extending upwardly from said exposed portions and top flanges spaced above the bottom surface.
    Type: Application
    Filed: June 30, 2004
    Publication date: November 25, 2004
    Applicant: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Publication number: 20040216303
    Abstract: A thick film current sensing resistor is provided having an input terminal for receiving an electrical current, and an output terminal for outputting the electrical current. A film of resistive material extends between the input and output terminals and is electrically coupled to the input and output terminals so that current flows through the film of resistive material. A pair of sensing terminals are provided to sense a voltage potential across the film of resistive material. The sensed voltage provides an indication of the current. An gap is formed in the film of resistive material between the input and output terminals and the sensing terminals. The length of the gap defines a voltage sensing point of the sensing terminals.
    Type: Application
    Filed: May 1, 2003
    Publication date: November 4, 2004
    Inventors: Carl W. Berlin, Dwadasi H. Sarma, Joel F. Downey, James R. Morken, William Hart, Kevin J. McGirr
  • Publication number: 20040113750
    Abstract: A multiple chip resistor is manufactured in the following method. First electrode layers are formed on a first surface of a substrate. Resistor elements electrically connected to the first electrode layers, respectively, are formed on the first surface of the substrate. Slits are formed in the substrate for separating the first electrode layers. Edge electrodes connected to the first electrode layers at the edges of the slits, respectively, are formed on respective edges at the slits of the substrate. The substrate is divided at the slits into strip substrates. Portions of the edge electrodes are removed for electrically isolating the resistor elements from each other. The method provides the edge electrodes on each strip substrate with an improved dimensional accuracy, hence allowing the edge electrodes to be isolated electrically from each other. Consequently, the multiple chip resistor is prevented from being mounted defectively when the resistor is surface-mounted.
    Type: Application
    Filed: October 9, 2003
    Publication date: June 17, 2004
    Inventors: Toshiki Matsukawa, Yasuharu Kinoshita, Shoji Hoshitoku, Masaharu Takashi, Yoshinori Ando
  • Patent number: 6704997
    Abstract: Organic thermistor devices are produced by a first step of molding an organic thermistor material by covering a plurality of electrically conductive members to form a conductor-containing member, which is elongated in a longitudinal direction, has a pair of mutually oppositely facing side surfaces, having the conductive plates buried parallel to one another inside the organic thermistor material, each mutually adjacent pair of these conductive members being externally exposed on different ones of the side surfaces, a second step of forming a pair of electrodes elongated in the longitudinal direction on the side surfaces of the conductor-containing member, and a third step of thereafter cutting this conductor-containing member transversely at specified positions so as to divide into individual units.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: March 16, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shinichi Osada, Tomozo Yamanouchi, Yuichi Takaoka, Takashi Shikama
  • Patent number: 6653927
    Abstract: The scribe line is constituted by a large number of depressed portions of desired depth formed by radiation of a laser beam in a surface of the raw substrate corresponding to a boundary line between adjacent insulating substrates so that the depressed portions are arranged in a line at fixed pitch intervals along the boundary line, and a portion where the pitch intervals of the depressed portions are reduced is provided over a desired length on the way of the scribe line, or a portion where the depth of the depressed portions is increased is provided over a desired length on the way of each of the scribe lines.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: November 25, 2003
    Assignee: Rohm Co., Ltd.
    Inventors: Hiroshi Fukumoto, Tokihiko Kishimoto
  • Patent number: 6636143
    Abstract: The present invention relates to a resistor and a manufacturing method of the same. The invention aims at providing the resistor and the manufacturing method thereof that can reduce a soldering area that occupies a mount area, when the resistor is mounted on a mount board. In order to achieve the foregoing object, a resistor comprises a substrate (21), a pair of first upper surface electrode layers (22), each provided on a side portion of an upper surface toward a portion of a side surface of the substrate (21), a pair of second upper surface electrode layers (23) provided in a manner to make electrical connections with the first upper surface electrode layers (22), a resistance layer (24) provided in a manner to make electrical connections with the second surface electrode layers (23), and a protective layer (25) provided to cover at least an upper surface of the resistance layer (24).
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: October 21, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Hiroyuki Yamada, Seiji Tsuda
  • Publication number: 20030132828
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate (11) made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer (12) formed on a top face of discrete substrate (11); resistor layer (13) formed such that a part of resistor layer (13) overlaps top electrode layer (12); protective layers (14, 16) formed so as to cover resistor layer (13); side electrode layer (17) formed on a side face of discrete substrate (11) such that side electrode layer is electrically coupled to top electrode layer (12).
    Type: Application
    Filed: October 22, 2002
    Publication date: July 17, 2003
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Publication number: 20030121141
    Abstract: The present invention discloses a manufacturing method of an over-current protection device, characterized in that the PTC plaque is conducted by punching under frozen state to form the over-current protection devices so as to reduce the heating and temperature rising in the PTC plaque due to punching and temperature difference between the metal foil and the conductive composite material. Relatively, the deformation and stress of the over-current protection device caused by punching will also be reduced. Therefore, there is no need for additional process to increase the temperature sensitivity and electrical property stability of the over-current protection device.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 3, 2003
    Inventors: Edward Fu-Hua Chu, David Shau-Chew Wang, Chih-Ming Yu
  • Patent number: 6577225
    Abstract: An array resistor network that has a high density of resistors per unit area. The array resistor network includes a ceramic substrate having a top and bottom surface. Apertures extend through the substrate between the top and bottom surfaces. Recesses are located on opposite edges of the substrate. Resistors are located on the top surface. Each resistor is located between a recess and an apertures. Inner conductors are connected to one end of the resistors. The Inner conductors are located on the top surface and extend through the aperture onto the bottom surface. Outer conductors are connected to another end of the resistors. The outer conductors are located on the top surface and extend along the recess onto the second surface.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: June 10, 2003
    Assignee: CTS Corporation
    Inventor: David L. Poole
  • Patent number: 6469614
    Abstract: A printed circuit board has a conductor path applied to a substrate having an electrically insulating surface, the conductor path preferably being constructed in the shape of a meander and containing connection areas with holes to which small contact plates are applied for the purpose of later bonding with connection leads. The small contact plates are applied in a hard soldering process with the aid of solder paste to the connection areas of the conductor paths and to the surface area of the substrate surface which is made of ceramic and exposed by the holes. It is consequently possible, dispensing with so-called bonding wires, to directly connect connection leads or bonding lugs electrically with the conductor path and mechanically with the printed circuit board. The printed circuit board is preferably designed as a measuring resistor, wherein the conductor path is applied as a resistance layer of platinum or platinum group metal in a thin film process to a small ceramic plate of aluminum oxide.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: October 22, 2002
    Assignee: Heraeus Electro-Nite International N.V.
    Inventors: Matthias Muziol, Karlheinz Wienand
  • Patent number: 6297722
    Abstract: A process for manufacturing surface mountable electrical devices includes the steps of preparing a PTC resistive plate, covering the plate with first and second conductive layers to form a laminate, forming a plurality of spaced apart bores of cross-shaped cross-section in the laminate along intersecting cutting lines at locations where the cutting lines intersect, electroplating the first and second conductive layers and the cross-shaped bores, and cutting the laminate along the cutting lines to form a plurality of polygonal elements with each of the bores being divided into four parts, each having a substantially L-shaped cross-section.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: October 2, 2001
    Assignee: Fuzetec Technology Co., Ltd.
    Inventor: Ching-Chiang Yeh
  • Patent number: 6242713
    Abstract: Disclosed is a plane heating element and a manufacturing method thereof, particularly the plane heating element without external electromagnetic waves and a manufacturing method thereof, wherein magnetic fields formed by the currents that flow through heat generation lines and an input terminal are eliminated to thus get rid of electromagnetic frequencies(EMF) harmful to the human body.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: June 5, 2001
    Assignee: Solco Biomedical Co., Ltd.
    Inventors: Seo-Kon Kim, Kun-Ho Yang, Sung-Nam Ju, Cheol-Sang Kim, Young-Joung Yoo, Jae-Soon Hwang
  • Patent number: 6238992
    Abstract: A method for manufacturing resistors comprising the steps of forming a top electrode layer on a top face of a substrate, a resistance pattern connected to the top electrode layer, a protective layer covering the resistance pattern, a thin metal film side electrode layer on a side face of the substrate which is electrically connected to the top electrode layer, and a concavity by removing a part of the side electrode layer and substrate.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: May 29, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiroyuki Yamada
  • Patent number: 6223423
    Abstract: A conductive polymer PTC device includes upper, lower, and center electrodes, with a first PTC conductive polymer layer between the upper and center electrodes, and a second PTC conductive polymer layer between the center and lower electrodes. Each of the upper and lower electrodes is separated into an isolated portion and a main portion. The isolated portions of the upper and lower electrodes are electrically connected to each other and to the center electrode by an input terminal. Upper and lower output terminals are provided, respectively, on the main portions of the upper and lower electrodes and are electrically connected to each other. The resulting device is, effectively, two PTC devices connected in parallel, thereby providing an increased effective cross-sectional area for the current flow path, and thus a larger hold current, for a given footprint.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: May 1, 2001
    Assignee: Bourns Multifuse (Hong Kong) Ltd.
    Inventor: Steven Darryl Hogge
  • Patent number: 6211771
    Abstract: Electrical devices, particularly circuit protection devices, contain conductive polymer elements whose edges are formed by breaking the conductive polymer element, along a desired path, without the introduction of any solid body into the element. The resulting cohesive failure of the conductive polymer produces a distinctive fractured surface. One method of preparing such devices involves etching fracture channels in the electrodes of a plaque containing a PTC conductive polymer element sandwiched between metal foil electrodes, and then snapping the plaque along the fracture channels to form individual devices.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: April 3, 2001
    Inventors: Michael Zhang, Mark S. Thompson, James Toth, William Cardwell Beadling
  • Patent number: 6130597
    Abstract: An electrical device in which a resistive element composed of a conductive polymer composition and two electrodes is made by a method in which the device is cut from a laminate of the conductive polymer composition and the electrodes, is exposed to a thermal treatment at a temperature above the melting temperature of the conductive polymer composition, and is then crosslinked.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: October 10, 2000
    Inventors: James Toth, Mark F. Wartenberg, Mark Bannick
  • Patent number: 5929746
    Abstract: A surface mounted thin film precision voltage divider is provided by incorporating two resistors on a single base of the same size and configuration as prior art surface mounted thin film precision resistors. Because the resistors were made at the same time, using the same materials and under the same conditions, the resistors react substantially equally to changes in temperature, aging, thermal shock, short time overload, high temperature exposure, resistance to bond exposure, moisture resistance, load life and low temperature operation. The voltage divider replaces two conventional surface mounted thin film precision resistors at a fraction of the cost.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: July 27, 1999
    Assignee: International Resistive Company, Inc.
    Inventors: Aaron William Edwards, Jr., Jerry Lee Seams, L. William Bos
  • Patent number: 5864281
    Abstract: Electrical devices, particularly circuit protection devices, contain conductive polymer elements whose edges are formed by breaking the conductive polymer element, along a desired path, without the introduction of any solid body into the element. The resulting cohesive failure of the conductive polymer produces a distinctive fractured surface. One method of preparing such devices involves etching fracture channels in the electrodes of a plaque containing a PTC conductive polymer element sandwiched between metal foil electrodes, and then snapping the plaque along the fracture channels to form individual devices.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: January 26, 1999
    Assignee: Raychem Corporation
    Inventors: Michael Zhang, Mark S. Thompson, James Toth, William Cardwell Beadling
  • Patent number: 5831510
    Abstract: Laminar electrical devices, in particular circuit protection devices, contain two laminar electrodes, with a PTC element between them, and a cross-conductor which passes through the thickness of the device and contacts one only of the two electrodes. This permits connection to both electrodes from the same side of the device. The device also includes layers of solder on the areas of the device through which connection is made, and separation and/or masking members which (a) reduce the danger of short circuits formed by solder flow during installation of the device and/or (b) provide a site for permanent marking of the device.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: November 3, 1998
    Inventors: Michael Zhang, Shou-Mean Fang
  • Patent number: 5757076
    Abstract: A chip type electronic component is provided which includes a chip substrate having an opposite pair of end edges and an opposite pair of side edges between the pair of end edges. An opposite pair of first electrodes is formed in a layer on the chip substrate to extend from the end edges toward each other. Each first electrode has a narrower root portion closer to a corresponding end edge of the chip substrate and a wider head portion spaced from the corresponding end edge. An electronic element is formed in another layer on the chip substrate in electrical conduction with both of the first electrodes, and an insulating protective coating is formed on the chip substrate to entirely cover the electronic element together with the entire wider head portion of each electrode.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: May 26, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Shigeru Kambara
  • Patent number: 5710538
    Abstract: In accordance with the present invention, trim pads used in trimming on-chip resistive elements are formed in the scribe channels interposed between respective dice on a wafer. Metal traces connect the trim pads to their associated resistive elements formed on the dice. Thus, each trim pad formed within the scribe channels results in a corresponding increase in the usable silicon surface area of the dice, thereby saving valuable silicon real estate.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: January 20, 1998
    Assignee: Micrel, Inc.
    Inventors: Raymond D. Zinn, Lawrence R. Sample, Michael J. Mottola
  • Patent number: 5606302
    Abstract: An electronic component device includes an electronic component element 13 that is interposed between a pair of spring terminals 14 and 15. The electronic component element 13 is resiliently held by the spring terminals 14 and 15, and contact portions 17 and 18 of the spring terminals 14 and 15, which are respectively brought into contact with electrodes 13b and 13c of the electronic component element 13, are positioned on both major surfaces of the electronic component element 13 so as not to be opposed to each other. At least one groove of a set of grooves 16a to 16c is formed on at least one of the major surfaces of the electronic component element 13 for guiding the direction in which the electronic component element 13 is divided when the electronic component element 13 is destroyed by, for example, an abnormal voltage.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: February 25, 1997
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Shigehiro Ichida
  • Patent number: 5563572
    Abstract: A resistor of SMD (Surface Mounted Device) construction includes a film of a resistive alloy as a resistive track on two electrically separated carrier plate elements of copper, which are constructed as contact elements solderable to the terminals of a printed circuit board to thereby ensure good heat dissipation into a printed circuit board. In order to manufacture such resistors, a resistive film sufficient for a plurality of individual resistors is adhered to but electrically isolated from a large copper plate and the laminate formed thereby is split into the individual resistors after producing the individual resistive tracks and their electrical connections to the copper plate and after producing gaps between the plate elements for each track.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: October 8, 1996
    Assignee: Isabellenhutte Heusler GmbH KG
    Inventor: Ullrich Hetzler
  • Patent number: 5493148
    Abstract: A semiconductor device includes a resistor network having a plurality of trimming polysilicon resistors. The polysilicon resistors have the same width and different lengths and can be selectively fused according to the value of current which is caused to flow therein. The resultant resistance of the resistor network is changed by selectively fusing the polysilicon resistors. The output characteristic of the semiconductor device can be adjusted by changing the resultant resistance.
    Type: Grant
    Filed: October 2, 1992
    Date of Patent: February 20, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yu Ohata, Koichi Kitahara, Yosuke Takagi
  • Patent number: 5352870
    Abstract: A resistance strip heater includes a pair of elongated, mutually parallel electrical conductors or buses lying on a dielectric substrate. Each bus includes a conductive region extending toward the other conductor, and the locations of the conductive regions of the two buses alternate along the lengths thereof. An elongated resistance arrangement has its axis of elongation parallel to the buses, is physically supported between the buses, and is electrically connected to mutually adjacent ones of the conductive regions, so that the resistance arrangement is electrically connected across the buses. In a particular embodiment of the invention, the resistance arrangement is a plurality of elongated chip resistors arranged in an array. The substrate may be a polyimide sheet, and a corresponding cover sheet may be used. The strip heater can be cut virtually anywhere along its length without affecting its operability.
    Type: Grant
    Filed: July 29, 1993
    Date of Patent: October 4, 1994
    Assignee: Martin Marietta Corporation
    Inventors: Joseph P. Daugherty, Harold C. Wright, Clement A. Berard, Jr.
  • Patent number: 5206624
    Abstract: An intermediate product is provided and includes a substrate having at least one thick-film circuit formed thereon. An outer surface of a first portion of the thick-film circuit is coated with a readily removable protective material such as ethyl cellulose to protect the first portion from hot-slag substrate material generated during a laser scribing operation. The substrate also includes at least one uncoated portion which can be laser scribed for separation of the thick-film circuit from the remainder of the substrate. After laster scribing, the protective material is removed to permit visual inspection of the thick-film circuit.
    Type: Grant
    Filed: February 27, 1992
    Date of Patent: April 27, 1993
    Assignee: Ford Motor Company
    Inventors: Daxesh K. Patel, Jay D. Baker
  • Patent number: 5206623
    Abstract: An electrical resistor which is fabricated from traces of resistive material on a substrate of insulating material. The traces are interconnected electrically in series by first links and in parallel by second alternating links, which are connected to different terminals on the substrate. The second links are cut, preferably by laser trimming, so as to select the value of resistance of the resistor by reducing the number of traces connected in parallel and increasing the number of traces connected in series. Where the resistance of each trace is "R", the value of the resistance is adjustable by severing the second links from R/n to nR, where n is the number of traces.
    Type: Grant
    Filed: May 2, 1991
    Date of Patent: April 27, 1993
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Michel Rochette, Paul R. Simon
  • Patent number: 4924205
    Abstract: A chip resistor comprising a cuboid resistor body of a ceramic material and solderable, metal, current-supply strips at a first pair of opposing side faces of the resistor body, can readily and accurately be manufactured in that a second pair of opposing side faces of the resistor body is covered completely with electrically insulating layers and in that the metal strips around the edges of the resistor body in such a way that the electrically insulating layers are partly covered by the metal strips.
    Type: Grant
    Filed: January 10, 1989
    Date of Patent: May 8, 1990
    Assignee: U.S. Philips Corporation
    Inventors: Didier Y. F. Caporali, Frans L. A. Geernickx
  • Patent number: 4788523
    Abstract: A viad chip resistor made from an insulative wafer and having a via formed near end of the wafer. Conductive pads surround the vias on both sides of the wafer. A resistive element is formed on one side of the wafer between the vias and is electrically connected to the conductive pads on that side. An array of viad chip resistors, from which said individual viad chip resistors are cut, is also shown.
    Type: Grant
    Filed: December 10, 1987
    Date of Patent: November 29, 1988
    Assignee: United States of America
    Inventor: William L. Robbins
  • Patent number: 4714820
    Abstract: An electrically heatable hair wrapper capable of being cut to any predetermined length from a flat, elongated, flexible base carrying a plurality of parallel resistance heating circuits. The circuits extend along the length of the base in a periodic serpentine pattern with the opposite ends of each pattern being electrically connected to continuous parallel buses extending along the longitudinal edges of the base. The flexible base is provided with indicia for indicating where the base and buses may be cut intermediate each adjacent pair of serpentine patterns so as not to destroy the continuity of the selected resistance heating circuits. A bendable, shape-retaining, cuttable wire along each longitudinal edge of the base outwardly of the parallel buses holds the wrapper in any desired shape. A longitudinally flexible flap integrally formed with at least one longitudinal edge of the base is foldable over the base to retain a hair tress between the base and flap during use of the wrapper.
    Type: Grant
    Filed: August 22, 1985
    Date of Patent: December 22, 1987
    Assignee: Clairol Incorporated
    Inventors: Herbert M. Morrison, Jorge Del Mar
  • Patent number: 4646056
    Abstract: A method is disclosed for matching the sensitivities of different-sized resistors to changes in resistance due to changes in width resulting from a systematic manufacturing error. In order to produce sets of resistors which can be deployed in predetermined ratios of resistance, the sensitivities of a matching resistor and a reference resistor are equalized by forming the matching resistor as a plurality of parallel strips as opposed to a unitary rectangular section.
    Type: Grant
    Filed: February 24, 1986
    Date of Patent: February 24, 1987
    Assignee: Analog Devices, Inc.
    Inventor: Adrian P. Brokaw
  • Patent number: 4586019
    Abstract: A method is disclosed for matching the sensitivities of different-sized resistors to changes in resistance due to changes in width resulting from a systematic manufacturing error. In order to produce sets of resistors which can be deployed in predetermined ratios of resistance, the sensitivities of a matching resistor and a reference resistor are equalized by forming the matching resistor as a plurality of parallel strips as opposed to a unitary rectangular section.
    Type: Grant
    Filed: August 15, 1985
    Date of Patent: April 29, 1986
    Assignee: Analog Devices, Incorporated
    Inventor: Adrian P. Brokaw
  • Patent number: H415
    Abstract: A multilayer thermistor and a method of making it are disclosed. The thertor has a positive temperature coefficient of resistance (PTCR) and a room temperature resistance lower than prior art thermistors of the same size. The thermistor is comprised of a plurality of layers of material having the PTCR characteristic laminated in alternation with layers of electrodes, the outer two layers of the thermistor being PTCR layers. Alternate electrodes are electrically connected in common to a pair of conductors forming thereby parallel resistance paths across each layer. The more resistance paths the thermistor has, the lower the overall resistance of the device.
    Type: Grant
    Filed: April 27, 1987
    Date of Patent: January 5, 1988
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Robert E. Newnham, Basavaraj V. Hiremath