Abstract: A decompression circuit for decompressing data includes a first decompression unit and a second decompression unit. The data sequentially includes a compressed first string, a compressed distance-length pair and a compressed second string. The first decompression unit performs a first decompression on the data to obtain a first string, a distance-length pair and a second string. The second decompression unit receives and decompresses the first string, the distance-length pair and the second string. The first decompression unit does not involve data associated with the distance-length pair when decompression the second string.

Abstract: A decompression circuit includes a first decompression unit and a second decompression unit. The first decompression unit performs a first decompression operation on data to generate first decompressed data. The first decompressed data includes a plurality of literals and a distance-length pair. The second decompression unit receives the first decompressed data, and sequentially performs a second decompression operation on the literals and the distance-length pair to generate second decompressed data. After the second decompression unit receives the distance-length pair from the first decompression unit and before the second decompression unit completes decompressing the distance-length pair, the second decompression unit transmits data required for the subsequent first decompression operation performed by the first decompression unit to the first decompression unit according to the distance-length pair.

Abstract: According to one embodiment, a computer-implemented method of decompressing compressed data is described. A first decompression dictionary is analyzed, the first decompression dictionary including a plurality of chains each with uncompressed data portions distributed in a non-contiguous manner within the first decompression dictionary based on an addressing scheme, where the uncompressed data portions of each chain form a corresponding uncompressed version of compressed data. A second decompression dictionary is generated by combining the uncompressed data portions of each of the chains in the first decompression dictionary to form uncompressed versions of compressed data and instructions are inserted within the second decompression dictionary to decompress compressed data. The compressed data are decompressed by applying the compressed data to the second decompression dictionary.

Abstract: A system reads a metadata byte in a compressed data fragment. The metadata byte includes information pertaining to a sequence of instruction sets to decode data in the compressed data fragment. The sequence of instruction sets follows the metadata byte and one or more literal data sets corresponding to the sequence of instruction sets follows the sequence of instruction sets. The system determines a location of the one or more literal data sets in the compressed data fragment using the metadata byte prior to reading the sequence of instruction sets. The system determines the lengths of the one or more literal data sets based on the sequence of instruction sets and copies the one or more literal data sets, as a batch job for the sequence of instruction sets, to an in-memory data store based on the location and using the lengths.

Abstract: Coding/decoding of a digital signal, consisting of successive blocks of samples, the coding being of the transform with overlap type and comprising, upon analysis, the application of a weighting window to two blocks of M successive samples. In particular, this weighting window is asymmetric and comprises four distinct portions extending successively over the two aforesaid blocks, with: a first portion, increasing over a first interval of samples, a second portion, constant at a value of 1 over a second interval, a third portion, decreasing over a third interval, and a fourth portion, constant at a value of 0 over a fourth interval.

Abstract: A compression method applies a selection rule to input symbols and generates a reduced partial set of symbols. The partial set is checked against a dictionary-index for a match. A match identifies a range of matching symbols in a dictionary. The length of the matching range is iteratively increased by checking previous and next symbols in the input data and the dictionary until a matching range length meets a threshold limit or the length of the matching range cannot be increased further. Compressed data corresponding to the input symbols is provided where input symbols are copied over and symbols in a matched range of data are replaced with a representation of their corresponding start location and length in the dictionary.

Abstract: Methods and apparatus intelligently switching between line coding schemes based on context. In one exemplary embodiment, an High Definition Multimedia Interface (HDMI) system is configured to transmit control and video data according to an 8B/10B line coding protocol, and data island data according to TERC4 (TMDS (Transition Minimized Differential Signaling) Error Reduction Coding 4-bit). Various elements of the disclosed HDMI devices are configured to determine when a context switch occurs, and thereafter seamlessly transition between the appropriate line code protocol.

Abstract: Methods and apparatus are provided for Lempel-Ziv data compression with shortened hash chains based on repetitive multi-byte runs. Data is compressed by processing a sequence of data to identify a repetitive pattern, such as a multi-byte run; and providing indicators associated with the sequence of data of a start position and an end position of the repetitive pattern. The indicators of the start and end positions of the repetitive pattern may comprise, for example, flags associated with the positions. The indicators of the start and end positions of the repetitive pattern are processed to determine a sequence length of the repetitive pattern. In addition, a match can be identified in the sequence of data having a length that is greater than or equal to an offset of s bytes to identify a run comprised of an s-byte sequence.

Abstract: Techniques for encoding data based at least in part upon an awareness of the decoding complexity of the encoded data and the ability of a target decoder to decode the encoded data are disclosed. In some embodiments, a set of data is encoded based at least in part upon a state of a target decoder to which the encoded set of data is to be provided. In some embodiments, a set of data is encoded based at least in part upon the states of multiple decoders to which the encoded set of data is to be provided.

Abstract: A decoder arrangement (10) includes a processor (12) programmed to decode multiple streams (111-11n), including multiple streams of different formats. In terms of functionality, the decoder arrangement includes a routing stage (13) routes each streams to different decoder stages (141-14n), each capable of decoding a stream of a particular format to yield an uncompressed stream at its output. Each of plurality of buffer stages (161-16n) stores a successive frame of an uncompressed stream output by an associated decoder stage. An output stage scales and the frames stored by the buffer stages to a common size for input to a display device (22).

Abstract: A binary allocation in a hierarchical coding/decoding comprising a coding/decoding of a digital signal enhancement layer. The signal comprises a succession of L samples, each sample being represented by a mantissa and an exponent. The method comprises the allocation of a predetermined number Nb of enhancement bits to a part at least of the L samples of highest exponent values. In particular, the method comprises the steps: a) enumerating the exponents of the L samples each having a given value, b) calculating at least one aggregate of enumerations of exponents by decreasing values of exponent until the predetermined number Nb is approximated from above, for c) determining a threshold value of largest exponent iexp0 of sample for which no more enhancement bit is available, and allocating the Nb enhancement bits, according to chosen rules, to the samples whose exponent is greater than the aforesaid threshold value iexpo.

Abstract: There is described a method of making a linear periodically time varying system shift-invariant, comprising the following steps implemented for each input signal the sampling rate of which has to be converted: —generating a set of polyphase components based on the input signal, —feeding the generated set of polyphase components to the system, and —generating an output signal by performing interleaving, shifting and addition on signals output by the system corresponding to the generated set of polyphase components processed by the system.

Abstract: Aspects of the invention are provided for decoding a selected span of data within a compressed code stream. A selection of data within the compressed code stream from an arbitrary position is presented for decompression. The arbitrary position is the starting point in the compressed code stream for decompression, and a phrase within the compressed code stream containing the starting point is identified. From the arbitrary starting point, a back pointer may provide direction to the literal. The literal is extracted as a decoding of the compressed data associated with the starting point.

Abstract: System, computer program product, and computer-implemented method to improve a running disparity of an encoded bit stream in a distributed network switch, the distributed network switch comprising a plurality of switch modules including a first switch module, by receiving, at the first switch module, a raw data stream comprising a plurality of bits, receiving a bit sequence, encoding at least a first bit of the raw data stream using a corresponding at least a first bit of the bit sequence, transmitting the encoded first bit, inverting the first bit of the bit sequence, and encoding a second bit of the raw data stream using the inverted first bit.

Abstract: A de-mapping circuit for de-mapping input words of a first length into output words of a second length different from the first length. In one embodiment, the circuit includes a word register of the first length and temporary registers of the second length. The word register successively stores each of the inputs words in response to cycles of a clock. The temporary registers temporarily store the output words. Multiplexers configured by address signals select bits from stored input words and store the selected bits into the temporary registers to form temporarily stored output words.

Abstract: Mechanisms are provided for decoding a variable length encoded data stream. A decoder of a data processing system receives an input line of data. The input line of data is a portion of the variable length encoded data stream. The decoder determines an amount of bit spill over of the input line of data onto a next input line of data. The decoder aligns the input line of data to begin at a symbol boundary based on the determined amount of bit spill over. The decoder tokenizes the aligned input line of data to generate a set of tokens. Each token corresponds to an encoded symbol in the aligned next input line of data. The decoder generates an output word of data based on the set of tokens. The output word of data corresponds to a word of data in the original set of data.

Abstract: Mechanisms are provided for decoding a variable length encoded data stream. A decoder of a data processing system receives an input line of data. The input line of data is a portion of the variable length encoded data stream. The decoder determines an amount of bit spill over of the input line of data onto a next input line of data. The decoder aligns the input line of data to begin at a symbol boundary based on the determined amount of bit spill over. The decoder tokenizes the aligned input line of data to generate a set of tokens. Each token corresponds to an encoded symbol in the aligned next input line of data. The decoder generates an output word of data based on the set of tokens. The output word of data corresponds to a word of data in the original set of data.

Abstract: A parallel test payload includes a bit sequence configured to be segmented into a plurality of sub-sequences having variable bit length carriers. Respective carriers are represented uniformly in each one of the plurality of sub-sequences.

Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate (i) a compressed representation of an input sequence of characters and (ii) statistics regarding one or more types of information in the compressed representation of the input sequence of characters. The second circuit may be configured to generate a compressed bitstream representation of the input sequence of characters in response to the compressed representation of the input sequence of characters and one or more of the statistics regarding the one or more types of information in the compressed representation of the input sequence of characters. The bitstream values encoding the one or more types of information are generally determined based upon a frequency of occurrence of the one or more types of information in the compressed representation of the input sequence of characters.

Abstract: An aspect of the present invention provides for lossless compression of an input stream using variable width codes. In an embodiment, in each of a sequence of iterations, an output code is emitted (to an output stream) corresponding to a longest string from a present symbol based on entries in a dictionary. In each iteration, two entries are thereafter added to the dictionary, with the first entry associating (the longest string+symbol succeeding said longest string in said input stream) to a first available code in the dictionary, and a second entry associating a (previous token+symbol succeeding said previous token in said input stream) to a second available code in the dictionary, wherein the previous token represents the token of a first entry in a previous iteration, and wherein ‘+’ represents a text appending operation.

Abstract: Techniques for representation and verification of data are disclosed. The techniques are especially useful for representation and verification of the integrity of data (integrity verification) in safe computing environments and/or systems (e.g., Trusted Computing (TC) systems and/or environments). Multiple independent representative values can be determined independently and possibly in parallel for respective portions of the data. The independent representative values can, for example, be hash values determined at the same time for respective distinct portions of the data. The integrity of the data can be determined based on the multiple hash values by, for example, processing them to determine a single hash value that can serve as an integrity value.

Abstract: A method implemented in a computer system may include reading a first set of data byte values, providing a reproducible first array that includes at least one of each data byte value in the first set, identifying in the first array a first contiguous pathway that defines a set of data byte values matching the first set, and creating a second set of command byte values representing the first contiguous pathway. The method may further include providing a reproducible second array that includes at least one of each command byte value in the second set, identifying in the second array a second contiguous pathway that defines a set of command byte values matching the second set, and creating a third set of command byte values representing the second contiguous pathway.

Abstract: Textual transcription of speech is generated and formatted according to user-specified transformation and behavior requirements for a speech recognition system having input grammars and transformations. An apparatus may include a speech recognition platform configured to receive a user-specified transformation requirement, recognize speech in speech data into recognized speech according to a set of recognition grammars; and apply transformations to the recognized speech according to the user-specified transformation requirement. The apparatus may further be configured to receive a user-specified behavior requirement and transform the recognized speech according to the behavior requirement. Other embodiments are described and claimed.

Abstract: Parallel compression is performed on an input data stream by processing circuitry. The processing circuitry includes hashing circuitry, match engines, pipeline circuitry and a match selector. The hashing circuitry identifies multiple locations in one or more history buffers for searching for a target data in the input data stream. The match engines perform multiple searches in parallel for the target data in the one or more history buffers. The pipeline circuitry performs pipelined searches for multiple sequential target data in the input data stream in consecutive clock cycles. Then the match selector selects a result from the multiple searches and pipelined searches to compress the input data stream.

Abstract: The invention is directed at a method and apparatus for determining compression state information which is to be used in the compression of data being transmitted between two communicating parties. The method of determining the compression state information for use in interactively compressing data comprises the steps parsing the data to determine a hierarchical data structure of the data; traversing a shared hierarchical node index to determine common compression state information entries between the hierarchical data structure and the hierarchical node index; and selecting at least one of the common compression state information entries for use in compressing the data.

Abstract: In an RF source, a digital waveform synthesizer comprises a computational module to synchronously determine a desired periodic function, f(?), within a first bandwidth portion, to which computational result there is combined an injected digital noise increment in an adjustable range of bounded amplitude, specifically selected to average over discontinuities of the DAC transfer characteristic. The combination is effected after passing the injected noise increment through a programmable digital filter forming a composite tuning word having a total bandwidth at a selected Nyquist zone and thence passing the composite tuning word through a truncation component to a DAC. The programmable digital filter is constructed to displace the spectral distribution of the injected noise increment to a portion of the total bandwidth remote from the first bandwidth portion.

Abstract: A method for compressing a plurality of coordinates includes obtaining a plurality of approximately-zero polynomials of dimension dim for a plurality of coordinate parameters. The method further includes selecting dim+1 non-approximately-zero polynomials, and providing a compressed data set that includes the approximately-zero polynomials, the dim+1 non-approximately-zero polynomials, and evaluations of the selected dim+1 non-approximately-zero polynomials based on the coordinates.

Abstract: There is provided an entropy modifier which is operable to encode, alternatively decode, a stream of input data bits having a first entropy for generating corresponding entropy-modified output data having a second entropy, wherein the entropy modifier is operable to process the stream of input data bits to handle groups of mutually similar bits and the value of the first bit, and one or more maximum run lengths of the groups of mutually similar bits. Optionally, the entropy modifier is operable to control one or more maximum run lengths of the groups of mutually similar bits by using at least one escape code.

Abstract: A method and apparatus for low complexity combinatorial coding and decoding of signals is described herein. During operation, an encoder and a decoder will utilize a first function in determining a codeword or vector when the size of the function is small. The encoder and the decoder will also utilize a second function in determining the codeword or vector when the size of the function is large.

Abstract: A method is described for encoding N variables onto less than 2N channels by forming a respective signal for each of the channels by combining inverted and/or non inverted forms of the variables, such that, each of the N variables is balanced across the channels, and, combination on any particular channel is not the polar opposite of a combination on any other channel.

Abstract: The transmission of broadcast data, such as financial data and news feeds, is accelerated over a communication channel using data compression and decompression to provide secure transmission and transparent multiplication of communication bandwidth, as well as reduce the latency. Broadcast data may include packets having fields. Encoders associated with particular fields may be selected to compress those particular fields.

Abstract: According to an example implementation, at least one non-transitory computer-readable storage medium may include instructions stored thereon. When executed by at least one processor, the instructions may be configured to cause a computing system to select at least one function type to approximate an interval of data points within a time series, the at least one function type being less than all of a plurality of functions available to approximate the interval, while the first function type will approximate the interval of data points within a maximum allowable error, add data points from the time series to the interval, and when the first function type will no longer approximate the interval with the added data points within the maximum allowable error, select a function of a different type or a function of a different term from the plurality of functions to approximate the interval with the added data points.

Abstract: A delay controller includes an acquiring section that acquires synchronization timings indicating timings when a plurality of controllers, which control via a line a plurality of transmitters that transmit data, synchronously control the transmitters, a determining section that determines a reference synchronization timing serving as a reference for synchronization between the controllers, on the basis of the synchronization timings acquired by the acquiring section, and a synchronization information transmitting section that transmits synchronization information to the controllers, the synchronization information being used when the controllers receive data from each of the transmitters at the reference synchronization timing determined by the determining section.

Abstract: The present invention first provides adaptive binarization in which a binarizer outputs binary symbol in length, which is variable adaptively to the probability of the source. When the probability is low, it is desirable to decrease the length of the binary symbols to improve the efficiency of arithmetic coding and reduce the complexity of coding calculation. On the other hand, when the probability is high, it is desirable to increase the length of the binary symbols to improve the overall process speed of a decoder. Specifically, a binarizer, according to the present invention, binarizes mapping unit values from a non-binary symbol into binary symbols. The number of binary symbols is inversely proportional to the size of the mapping unit value. In the present invention, the mapping unit value is made variable adaptively to the probability. Thus, the number of binary symbols from the binarizer is also variable adaptively to the probability parameter.

Abstract: A method for determining a parity check matrix utilized in a flash memory system is disclosed. The parity check matrix comprises M×N blocks. The method includes generating a first set of candidate blocks as candidates of a first set of blocks of the M×N blocks; calculating a plurality of first estimated results corresponding to the first set of candidate blocks; determining content of a first block of the M×N blocks according to a best result of the first estimated results; generating a second set of candidate blocks as candidates of a second set of blocks of the M×N blocks; calculating a plurality of second estimated results corresponding to the second set of candidate blocks by considering the content of the first block; determining content a second block of the M×N blocks according to the second estimated results.

Abstract: A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.

Abstract: A method and apparatus for data compression, particularly applicable to spectral signals such as Fast Fourier Transforms of vibration data. The data is merged to remove redundant frequencies when recorded at multiple sample rates, thresholded with respect to a noise floor to remove even more redundant data, and then the positions of non-zero signal values, with respect to the noise floor, are recorded in a first dataword and the non-zero signal values themselves are all recorded concatenated to form a second dataword. The compressed data set consists of the first and second datawords, together with the value of the noise floor, maximum original amplitude and the broadband power. In the event of successive data sets having the same or similar locations for non-zero signal values a re-use flag may be set and the locations dataword discarded. Preferably the signal values are non-linearly quantized to further reduce the amount of data.

Abstract: A method and apparatus for encoding structured data by fragmenting the structured data into fragments according to a configuration of the structured data and encoding the fragments to generate encoded fragments using a string table including strings contained in the structured data.

Abstract: The transmission of broadcast data, such as financial data and news feeds, is accelerated over a communication channel using data compression and decompression to provide secure transmission and transparent multiplication of communication bandwidth, as well as reduce the latency. Broadcast data may include packets having fields. Encoders associated with particular fields may be selected to compress those particular fields.

Abstract: The present invention discloses a method and a device for pulse encoding, and a method and a device for pulse decoding. The method for pulse encoding includes: calculating an index value of an input pulse; selecting an adjustment threshold value according to the number of pulses, and comparing the index value of the pulse with the adjustment threshold value; if the index value is smaller than the adjustment threshold value, adopting the first number of encoding bits to encode the index value, if the index value is not smaller than the adjustment threshold value, adopting the second number of encoding bits to encode the index value plus an offset value, where the first number is smaller than the second number, the first number and the second number are both positive integers, and the offset value is greater than or equal to the adjustment threshold value.

Abstract: The transmission of broadcast data, such as financial data and news feeds, is accelerated over a communication channel using data compression and decompression to provide secure transmission and transparent multiplication of communication bandwidth, as well as reduce the latency. Broadcast data may include packets having fields. Encoders associated with particular fields may be selected to compress those particular fields.

Abstract: Systems and methods for providing fast and efficient data compression using a combination of content independent data compression and content dependent data compression. In one aspect, a method for compressing data comprises the steps of: analyzing a data block of an input data stream to identify a data type of the data block, the input data stream comprising a plurality of disparate data types; performing content dependent data compression on the data block, if the data type of the data block is identified; performing content independent data compression on the data block, if the data type of the data block is not identified.

Abstract: Embodiments of the present invention provide a rate matching method and apparatus. The method includes: receiving bit data of a first, a second, and a third input subblock, inserting dummy data into bit data in each subblock to respectively form even-numbered rows and odd-numbered rows of a matrix to be buffered for each subblock; inputting bit data of the even-numbered rows in the even-numbered row buffer and bit data of the odd-numbered rows in the odd-numbered row buffer of each subblock to a second buffer, and forming a matrix by using the bit data of the even-numbered rows and the bit data of the odd-numbered rows; controlling the second buffer to send data at the specified address; selecting data sent by the second buffer; and deleting the dummy data from the selected data to obtain valid output data.

Abstract: A plurality of samples are vector-quantized to obtain a vector quantization index and quantized values; bits are assigned in a predetermined order of priority based on auditory perceptual characteristics to one or more sets of sample positions among a plurality of sets of sample positions, each set having a plurality of sample positions and being given an order of priority based on the auditory perceptual characteristics, the number of bits not being larger than the number of bits obtained by subtracting the number of bits used for a code corresponding to the vector quantization index from the number of bits assigned for the code corresponding to the vector quantization index; and index information indicating a group of coefficients that minimizes the sum of the error between the value of each sample included in each of the sets of sample positions to which the bits are assigned and the value obtained by multiplying the quantized value of each sample included in the set of sample positions by a coefficient co

Abstract: An encoder performs context-adaptive arithmetic encoding of transform coefficient data. For example, an encoder switches between coding of direct levels of quantized transform coefficient data and run-level coding of run lengths and levels of quantized transform coefficient data. The encoder can determine when to switch between coding modes based on a pre-determined switch point or by counting consecutive coefficients having a predominant value (e.g., zero). A decoder performs corresponding context-adaptive arithmetic decoding.

Abstract: A method of compressing digital data includes the steps of (i) reading digital data as a series of binary coded words representing a context and a code word to be compressed, (ii) calculating distribution output data from the input data and assigning variable length code words to the result; and (iii) periodically recalculating the code words in accordance with a predetermined schedule, in order to continuously update the code words and their lengths.

Abstract: A system including a binarization module, a prediction module, and a shifting module. The encoding module is configured to encode symbols using context-adaptive binary arithmetic coding, in which the symbols are generated by binarizing a syntax element. The prediction module is configured to generate a prediction for a number of renormalizations to be performed to renormalize an interval range when encoding one of the symbols. The shifting module is configured to generate a renormalized interval range by shifting the binarized syntax element R times, where R is a number of leading zeros before a 1 in the binarized syntax element. The encoding module is configured to encode a next symbol following the one of the symbols based on the renormalized interval range.

Abstract: A mechanism is provided in a data processing system for pipelined compression of multi-byte frames. The mechanism combines a current cycle of data in an input data stream with at least a portion of a next cycle of data in the input data stream to form a frame of data. The mechanism identifies a plurality of matches in a plurality of dictionary memories. Each match matches a portion of a given substring in the frame of data. The mechanism identifies a subset of matches from the plurality of matches that provides a best coverage of the current cycle of data. The mechanism encodes the frame of data into an encoded output data stream.

Abstract: An encoding method includes searching a search target symbol string within a specific range from the end of a symbol string, which has been utilized for encoding, for a match symbol string corresponding to a beginning symbol string of a symbol string to be encoded, encoding the beginning symbol string based on a distance between the match symbol string and the beginning symbol string, and a length of the match symbol string.

Abstract: According to one embodiment, the present invention includes a method for numerically encoding and representing data that includes providing a representation of data and separating the representation into a scale header and an additional precision packet. Separating the representation includes identifying the location of the highest-order non-zero bit and encoding the location of the highest-order non-zero bit to form the scale header. The balance of the bits following the highest-order non-zero bit, or a truncated set of these bits, is encoded to form the additional precision packet, and a matched representation space (MRS) representation is composed of the paired data structures of a scale header and a corresponding additional precision packet, if any.