Multiple Conversions Using Same Converter Patents (Class 341/88)
  • Patent number: 8866649
    Abstract: Method and system for partially cloning a data container with compression is provided. A storage operating system determines if a portion of a source data container that is to be cloned includes a plurality of compressed blocks that are compressed using a non-variable compression group size. The operating system clones the plurality compressed blocks with the non-variable compression group size and de-compresses a plurality of blocks of the data container that are not within the non-variable compression group size. The plurality of compressed blocks and the plurality of blocks that are not within the non-variable compression group size are then stored as a partially cloned copy of the source data container.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 21, 2014
    Assignee: Netapp, Inc.
    Inventors: Sandeep Yadav, Dnyaneshwar Pawar, Anand Natarajan
  • Patent number: 8745145
    Abstract: The disclosure discloses a method and system for transmitting a large message mode CPM message, both of which enable the respective establishment of Message Session Relay Protocol (MSRP) links between a CPM client of a sender and an originating participation function entity, between the originating participation function entity and a terminating participation function entity, and between the terminating participation function entity and an inter-working function entity, wherein the establisher of each segment of MSRP link obtains the MSRP connection parameters of the opposite end through media negotiations and establishes the MSRP link according to the MSRP connection parameters; the CPM client of the sender sends the large message mode CPM message to the inter-working function entity through each segment of established MSRP link in sequence, the inter-working function entity performs a protocol conversion on the received the large message mode CPM message and then transmits the converted message to a non-CPM
    Type: Grant
    Filed: November 27, 2009
    Date of Patent: June 3, 2014
    Assignee: ZTE Corporation
    Inventors: Yan Lu, Ghazanfar Ali
  • Publication number: 20140070967
    Abstract: Provided is an electronic signal conversion apparatus and an operation method of the electronic signal conversion apparatus, including: a first converter to perform a compression and conversion of an input signal to a digital signal based on a first sampling; a second converter to perform a compression and conversion of the input signal to the digital signal based on a second sampling different from the first sampling; and a processor to restore the input signal using an output signal of the first converter and an output signal of the second converter.
    Type: Application
    Filed: September 9, 2013
    Publication date: March 13, 2014
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Woo Yong LEE, Jin Kyeong KIM
  • Patent number: 8587459
    Abstract: A method is provided for encoding data to be sent to at least one receiver, including at least two identical encoding steps and at least one permutation step. Each encoding step associates a block of encoded data with a block of data to be encoded, using at least two basic codes, each code processing a subset of the data block to be encoded. The permutation step is inserted between two encoding steps, i.e. a current encoding step and a previous encoding step, such that the order of the data in a data block to be encoded by the current encoding step is different from the order of the data encoded by the previous encoding step. The permutation step implements, for a data block, a rotation applied to the data of the data block and a reversal of the order of the data of the data block. The operations can be implemented by an interleaving matrix.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: November 19, 2013
    Assignee: Institut Telecom/Telecom Bretagne
    Inventors: Jorge Perez Chamorro, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel
  • Publication number: 20130141257
    Abstract: Disclosed are various embodiments that provide turbo decoding implemented as at least a portion of baseband processing circuitry. A turbo decoder may obtain a data block associated with a transmission time interval, the data block comprising a sequence of bits, the data block being encoded according to a coding rate. An alpha operation is performed on the data block for a first decoding iteration to generate first alpha decode data, the alpha operation for the first decoding iteration being performed continuously. An alpha operation is performed on the data block for a second decoding iteration to generate second alpha decode data, the alpha operation for the second decoding iteration being performed according to a set of alpha evaluation windows. The initialization of the alpha windows during the second alpha decode may be derived from the alpha state data that is stored in memory from the first alpha decode.
    Type: Application
    Filed: September 21, 2012
    Publication date: June 6, 2013
    Applicant: BROADCOM CORPORATION
    Inventor: BROADCOM CORPORATION
  • Publication number: 20100314874
    Abstract: A system and method for operating a wind energy installation or wind farm. The system includes a control unit configured to process control variables and a transfer module. The transfer module has an input interface for receiving control commands and an output interface for transmitting control variables to the control unit. The transfer module has multiple transfer logic elements each configured to convert a control command to a control variable. The transfer module has a switching device for switching between the transfer logic elements. As a result, the wind energy installation or wind farm can be connected to an electrical grid in which the control commands are transmitted in a different format than that of the control variables of the control unit.
    Type: Application
    Filed: October 13, 2008
    Publication date: December 16, 2010
    Applicant: REpower Systems AG
    Inventors: Roman Bluhm, Sebastian Friederich, Jens Altemark
  • Publication number: 20100253555
    Abstract: A decoder, an encoder, a decoding method and an encoding method are provided. The encoding method includes receiving data; generating a set of first codewords by applying a first encoding process on the received data; and performing a second encoding process on a folded version of each first codeword to provide a set of second codewords, wherein a folded version of a first codeword is representative of a storage of the first codeword in a two dimensional memory space, wherein the second codeword comprises redundancy bits.
    Type: Application
    Filed: January 4, 2010
    Publication date: October 7, 2010
    Inventors: Hanan WEINGARTEN, Ofir Avraham Kanter, Avi Steiner, Erez Sabbag
  • Patent number: 7512616
    Abstract: An apparatus, system, and method are disclosed for communicating binary data using a self-descriptive binary data structure. The binary data structure also may be referred to as a microcode reconstruct and boot (MRB) image. The binary data structure includes a plurality of data segments, a target data set, and a data structure descriptor. Each of the data segments has a data segment header and data field. The target data set is stored within the data field and may be an executable. The data structure descriptor is descriptive of the binary data structure and identifies the location of the target data set within the data field. The binary data structure is self-descriptive in that the location of an individual target data set may be identified by the data structure descriptor.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Brian Jeffrey Corcoran, Lourdes Magally Gee, Matthew Joseph Kalos, Ricardo Sedillos Padilla
  • Publication number: 20080030385
    Abstract: A method for transforming a digital signal from the time domain into the frequency domain and vice versa using a transformation function comprising a transformation matrix, the digital signal comprising data symbols which are grouped into a plurality of blocks, each block comprising a predefined number of the data symbols. The method includes the process of transforming two blocks of the digital signal by one transforming element, wherein the transforming element corresponds to a block-diagonal matrix comprising two sub matrices, wherein each sub-matrix comprises the transformation matrix and the transforming element comprises a plurality of lifting stages and wherein each lifting stage comprises the processing of blocks of the digital signal by an auxiliary transformation and by a rounding unit.
    Type: Application
    Filed: May 6, 2004
    Publication date: February 7, 2008
    Inventors: Haibin Huang, Xiao Lin, Susanto Rahardja, Rongshan Yu
  • Patent number: 6473008
    Abstract: A sampling system includes an input terminal for receiving a data signal having a signal component and possibly a noise component. A sampler samples the data signal at a sample rate set in responsive to a control signal. A noise detector detects the presence of a noise component, and if a noise component is detected, generates the control signal conditioning the sampler to sample the data signal at a first sample rate satisfying the Nyquist criterion for the data signal including the noise component, and otherwise generating the control signal conditioning the sampler to sample the data signal at a second data rate satisfying the Nyquist criterion for the data signal including only the signal component.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: October 29, 2002
    Assignee: Siemens Medical Systems, Inc.
    Inventors: Clifford Mark Kelly, Marc Auerbach, Jonathan Fitch
  • Patent number: 6408076
    Abstract: In order to descramble sections of scrambled data interleaved with sections of unscrambled data in a transport stream of broadcast video data, while leaving the sections with the original timing relationship in the transport stream, a common data flow path (1-5) is provided both for sections of scrambled data and sections of unscrambled data and signal path loops (6,7; 8,9) including cipher means (62,64) to enable the descrambling of scrambled data, and a control state machine for controlling the flow of data through said common data flow path and said signal path loops to enable passage of unscrambled data sections and descrambling of scrambled data sections, while maintaining the desired relative positions of the data sections.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: June 18, 2002
    Assignee: LSI Logic Corporation
    Inventor: Simon Bewick
  • Patent number: 6347123
    Abstract: A low power sample rate converter adapted for use with a telecommunications system transceiver. The sample rate converter includes a first circuit that provides an input signal characterized by a first sample rate and a delayed version of the input signal. A second circuit periodically multiplies, at a second sample rate, samples in the input signal by a first predetermined coefficient in accordance with a predetermined transfer function and provides a first signal in response thereto. A third circuit periodically multiplies, at the second sample rate, samples in the delayed version of the input signal by a second predetermined coefficient in accordance with the predetermined transfer function and provides a second signal in response thereto. A fourth circuit combines the first signal and second signal providing a rate-converted version of the input signal as an output signal in response thereto.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: February 12, 2002
    Assignee: Qualcomm Incorporated
    Inventors: Lennart Mathe, Daniel T. Macek
  • Patent number: 6211802
    Abstract: A semiconductor integrated circuit for performing data transfer integrated circuit includes a first circuit, a second circuit, and first and second data converters. The first circuit outputs data of a plurality of bits. The second circuit receives the data from the first circuit via a data bus. The first data converter converts the data from the first circuit by a first conversion rule and outputs the data to the data bus. The second data converter converts the data from the data bus back to original data by a second conversion rule and outputs the data to the second circuit.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: April 3, 2001
    Assignee: NEC Corporation
    Inventor: Tadaomi Sakata
  • Patent number: 5805931
    Abstract: A programmable bandwidth I/O port using a DRAM connected to a plurality of serial access memories. Data is synchronously transferred between the DRAM and the serial access memories and is asynchronously transferred between the serial access memories and a plurality of single or multiple bit I/O ports. The bus widths of the I/O ports may be easily programmed to provide a wide variety of I/O port configurations.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: September 8, 1998
    Assignee: Micron Technology, Inc.
    Inventors: Christopher K. Morzano, Charles L. Ingalls
  • Patent number: 5703658
    Abstract: An apparatus and a method for receiving television signals can display a television signal of a novel signal format, even at a low cost, without addition of any hardware.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: December 30, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Yasutaka Tsuru, Takumi Okamura, Shoji Kimura, Yuji Yamamoto, Toshinori Murata, Kenji Katsumata, Moriyoshi Akiyama, Takanori Eda
  • Patent number: 5638070
    Abstract: N-bit digital signals are transformed into M-bit digital signals (M>N), the N-bit signals being obtained by converting an analog signal into digital signals. Detected are transition points on a time axis and intervals between the transition points at which successive digital signals of the N-bit signals vary. (M-N) bit additional signals are generated which correct errors of the N-bit signals within a range of .+-.0.5 least significant bit of the N-bit signals in response to the transition points and the intervals. The additional signals are delayed so as to correspond to least significant bit of the N-bit signals. The delayed additional signals are combined with the N-bit signals to generate the M-bit signals. Instead of the transition points and intervals, detected are transition patterns of successive digital signals of the N-bit signals over transition points. (M-N) bit additional signals are generated which correct errors of the N-bit signals within a range of .+-.0.
    Type: Grant
    Filed: August 15, 1995
    Date of Patent: June 10, 1997
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Toshiharu Kuwaoka
  • Patent number: 5608759
    Abstract: In a digital communication network in which pieces of information having different PCM coding rules are present, an information storage apparatus includes a control unit, a storage unit, and at least one transconverter. The control unit includes a comparator which compares the coding rule identifier read from the storage unit with a coding rule identifier of the read destination, when the control unit receives the information read request signal transmitted with the coding rule identifier of the read destination, so that if the coding rule identifier read out from the storage unit coincides with the coding rule identifier of the read destination, the PCM-coded information read out from the storage unit is transmitted without code conversion, and if the coding rule identifier read out from the storage unit does not coincide with the coding rule identifier, the PCM-coded information is transmitted through a selected transconverter to produce code-converted PCM-coded information.
    Type: Grant
    Filed: June 29, 1994
    Date of Patent: March 4, 1997
    Assignee: NEC Corporation
    Inventor: Naoto Fujiwara
  • Patent number: 4841298
    Abstract: A bit pattern conversion system for converting a sequence of a bit pattern between a central processing unit and a peripheral circuit, including a data bus line connected between the central processing unit and the peripheral circuit, and a conversion circuit provided in the peripheral circuit for converting the sequence of the bit pattern from a most significant bit to a least significant bit, and vice versa, in accordance with a conversion signal.
    Type: Grant
    Filed: December 14, 1987
    Date of Patent: June 20, 1989
    Assignees: Fujitsu Limited, Fujitsu Microcomputer Systems Limited
    Inventors: Joji Murakami, Syogo Sibazaki, Junya Tempaku
  • Patent number: 4782387
    Abstract: A video codec is used to reduce the bandwidth of a video signal for storage and/or transmission. To transmit an uncoded quality color NTSC television signal is digitized form requires channel bandwidth typically 90-120 Mb/s for the signal in the composite format and 216 Mb/s for the signal in the component format. The proposed video codec achieves a reduction of the required transmission bandwidth by a factor of 2-3 by splitting the imput signal into two channels, a main and a complementary channel, and by applying different coding techniques in each. In the main channel the input signal is subsampled and DPCM encoded using a fixed-rate companded quantization, whereas VWL and block coding is used to encode the complementary channel carrying the interpolation error signal. This arrangement seeks to ensure high picture quality while being easily adaptable to different transmission rates and signal formats.
    Type: Grant
    Filed: December 9, 1986
    Date of Patent: November 1, 1988
    Assignee: Northern Telecom Limited
    Inventors: Mohamed S. Sabri, Albert Golembiowski, Birendra Prasada