Abstract: Embodiments of the present disclosure provide an erasing unit for image sticking in a liquid crystal display device, a control method thereof and a liquid crystal display device. A first controlling signal may be generated by dividing a voltage at a DC power supply terminal. A controlling circuit may output a second controlling signal and a third controlling signal in responding to the voltage of the first controlling signal being smaller than or equal to a reference voltage. A charging and discharging circuit may discharge under the control of the second controlling signal and output a high-level voltage signal to an outputting circuit. The outputting circuit may supply the high-level voltage signal outputted by the charging and discharging circuit to TFTs in the liquid crystal display device, controlling the TFTs to be turned on.

Abstract: An embodiment relates to a temperature sensor having a correction function and is able to reduce errors in measurement by the temperature sensor by calibrating a correlation between temperature and voltage.

Abstract: A display driving device, which adjusts a brightness of an image on the basis of an ambient illumination even without an increase in amount of power consumption, includes a controller determining a clipping ratio for clipping input image data by using an ambient illumination value when the ambient illumination value is input thereto, a gain calculator calculating a frame gain which is to be applied to the input image data, based on the clipping ratio, an input image clipping unit clipping the input image data by applying the frame gain in the input image data, and a gamma converter gamma-converting clipped input image data to generate output image data.

Abstract: A display device capable of improving image quality is provided. A storage node is provided in each pixel and first data can be held in the storage node. Second data is added to the first data by capacitive coupling, which can be supplied to a display element. Thus, the display device can display a corrected image. A reference potential for the capacitive coupling operation is supplied from a power supply line or the like, and thus the first data and the second data can be supplied from a common signal line.

Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and a display device are provided. The shift register unit includes: a first input circuit, a second input circuit, an output circuit, and a compensation circuit, the first input circuit is configured to write a first input signal to the first node in response to a first control signal; the second input circuit is configured to input a second input signal to the second node in response to a detection control signal and configured to transmit a level of the second node to the first node in response to a second control signal; the compensation circuit is configured to compensate the level of the second node; and the output circuit is configured to output a composite output signal to the output terminal under control of a level of the first node.

Abstract: Display devices and methods for driving display devices are provided. The method may include, in a first stage of the data writing phase, always turning on m1 first switch units of each multiplexer under a control of m1 corresponding clock signal lines, and sequentially turning on m2 second switch units for a preset time in a preset order; in a second stage of the data writing phase, keeping the m1 first switch units always on, turning off the m2 second switch units, and writing corresponding data voltage signals to the row of sub-pixels to cause the row of sub-pixels to display; and in the display maintaining phase, displaying same as in the second stage of the data writing phase. At least one first switch unit is always turned on under the control of a corresponding clock signal line when at least two continuously scanned rows of sub-pixels are displaying.

Abstract: The present disclosure relates to a pixel compensation method and device, a storage medium, and a display screen, and belongs to the field of display technologies. The method includes: sensing a plurality of subpixels in a first target grayscale of a display screen by using a plurality of photosensitive units, to obtain an actual luminance value of each subpixel; determining a theoretical luminance value of each subpixel in the first target grayscale based on a compensation sensing model, where the compensation sensing model is used to record a correspondence between target grayscales and theoretical pixel data, and the theoretical pixel data includes a reference luminance value of each subpixel; and performing pixel compensation on each subpixel based on the actual luminance value of each subpixel and the theoretical luminance value of each subpixel.

Abstract: A pixel circuit includes a first switching element including a control electrode connected to a first node, an input electrode which receives a first power voltage and an output electrode connected to a third node, a second switching element including a control electrode which receives a compensation gate signal, an input electrode connected to a second node and an output electrode connected to the third node, a third switching element including a control electrode which receives a write gate signal, an input electrode connected to the first node and an output electrode connected to the second node, a storage capacitor including a first electrode which receives an initialization voltage and a second electrode connected to the first node, a program capacitor which receives a data voltage and connected to the second node, and an organic light emitting element connected to the third node and which receives a second power voltage.

Abstract: An organic light emitting diode (OLED) display panel and a driving method thereof are provided. The OLED display panel includes a plurality of pixel unit circuits and an external compensation unit connected to all of the pixel unit circuits. The external compensation unit performs external compensation on each of the pixel unit circuits, obtains an initial threshold voltage of a corresponding driving thin film transistor (TFT) of each of the pixel unit circuits, adds the initial threshold voltage to a predetermined initial potential, and then inputs a sum of the initial threshold voltage and the predetermined initial potential to each of the pixel unit circuits Each of the pixel unit circuits performs internal compensation based on the sum of the initial threshold voltage and the predetermined initial potential.

Abstract: Various embodiments relate to an electronic device and, according to one embodiment, the electronic device comprises a display and a processor, wherein the processor can be configured to detect at least one outline corresponding to at least one graphic object included in a first image to be displayed through the display, generate a second image in which the at least one outline has been adjusted to a first designated color and areas excluding the at least one outline in a first image have been adjusted to a second designated color, and display the second image by using the display. Other additional embodiments are possible.

Abstract: Embodiments of the present disclosure provide a method and a device for controlling a timing sequence, a drive circuit, a display panel, and an electronic apparatus. In this method, a frame scan timing sequence for a display signal may be set according to a frame rate of the display signal, wherein the frame scan timing sequence includes an active period and a blanking period. The frame scan timing sequence may be arranged to increase the active period as the frame rate of the display signal decreases.

Abstract: A signal line capacitance compensation circuit and a display panel are provided, a signal line capacitance compensation circuit includes: a plurality of signal lines; at least one control line, a compensation capacitor being provided between the control line and at least one of the plurality of signal lines; and a signal source configured to send a charging signal to one or more control lines of the at least one control line, the charging signal being used to charge the compensation capacitor between the one or more control lines receiving the charging signal and the at least one signal line.

Abstract: A light emitting apparatus and a display device are provided. The light emitting apparatus includes a light emitting unit and a pixel circuit. The pixel circuit is electrically connected to the light emitting unit. The pixel circuit includes a first driving transistor and a second driving transistor. The first driving transistor and the second driving transistor are configured to provide a first driving current and a second driving current to the light emitting unit at the same time, respectively. The first driving transistor includes a first gate terminal. The second driving transistor includes a second gate terminal. The first gate terminal and the second gate terminal are electrically connected to different nodes. The display device includes the light emitting apparatus.

Abstract: A panel control circuit configured to control a display panel includes a plurality of pixels. The panel control circuit includes a controller configured to output an image data and a source driver, including an output circuit and an output control circuit, configured to generate data signals based on the image data. The controller is configured to output an output change signal for changing an output of the source driver. The output circuit is configured to output the data signals to the display panel, and the output control circuit is configured to output an adjusting current to the output circuit in a signal transition section of the output change signal.

Abstract: A shift register circuit comprises a shift register, and a signal output circuit including J number of scan signal output circuits (J is an integer of 2 or more) operating by being connected with the shift register to respectively output J number of scan signals. The J number of scan signal output circuits share a first QB node and a second QB node of the shift register, a common output terminal of the shift register, and a first voltage line, operate based on a potential of the first QB node, a potential of the second QB node, a common output signal output through the common output terminal, a first voltage transferred through the first voltage line, and an Ith clock signal transferred through an Ith clock signal line, and output the J number of scan signals through output terminals which are respectively divided.

Abstract: A processing unit includes compute units partitioned into one or islands that are provided with operating voltages and clock signals having clock frequencies independent of providing operating voltages or clock signals to other islands of compute units. The processing unit also includes dynamic voltage and frequency scaling (DVFS) hardware configured to compute one or more numbers of active memory barriers in the one or more islands. The DVFS hardware is also configured to modify the operating voltages or clock frequencies provided to the one or more islands in response to a change in numbers of active memory barriers in the one or more islands. In some cases, the operating voltage or clock frequency provided to an island is increased in response to the number of active memory barriers in the island decreasing. The operating voltage or clock frequency provided to the island is decreased in response to the number of active memory barriers in the island increasing.

Abstract: A shift register circuit and a method of driving the same, a gate driver circuit, an array substrate and a display device. The shift register circuit includes an input subcircuit and a signal output subcircuit. The input subcircuit includes: a control module, which is configured to output a signal of the first voltage terminal to a voltage dividing node under a control of an input signal; an input module configured to output a signal of the voltage dividing node to the signal output subcircuit under a control of the control module; and a voltage dividing module, a resistance value of the voltage dividing module having a negative relationship with a temperature, and the signal output subcircuit is connected with an output terminal of the input module and configured to output a gate scan signal from an output signal terminal under a control of the input module.

Abstract: The present disclosure provides an organic light-emitting diode (OLED) display panel and a driving method thereof. The OLED display panel includes a plurality of pixel circuits and an external compensation unit connected to the plurality of pixel circuits. The external compensation unit externally compensates the pixel circuits, obtains initial threshold voltages of driving thin-film transistors (TFTs) of each pixel circuits, obtains a sum data signal by summing up each of the initial threshold voltages and an input signal corresponding to each pixel circuits, and transmits the sum data signal to each pixel circuits. The external compensation compensates non-uniformity initial threshold voltages of each driving TFTs caused from manufacture of OLED display panel and compensates the permanent drift of the actual threshold voltage caused from external stress.

Abstract: According to one embodiment, a display device includes a first common electrode and a second common electrode arranged in a first direction, a first switch unit selectively supplying a first drive signal or a second drive signal different from the first drive signal to the first common electrode, and a second switch unit selectively supplying the first drive signal or the second drive signal to the second common electrode, wherein the second common electrode and the first switch unit are arranged in a second direction intersecting the first direction, the first switch unit comprises a first switch circuit and a second switch circuit arranged in the second direction.

Abstract: An apparatus and a method for transmitting and/or receiving data in an electronic device are provided. According to an embodiment, an electronic device includes a communication interface and a processor. When the electronic device outputs content, the processor can transmit the content to an external electronic device using the communication interface, detect a state of the electronic device in relation to the output, select substitute content for the content at least based on the detection, determine a schedule corresponding to the substitute content, and transmit the substitute content to the external electronic device based on the schedule.

Abstract: An imaging device having first and second pixels is described. The first pixel includes a first transfer transistor, a first reset transistor, a first amplifier transistor and a first select transistor. The second pixel includes a first photoelectric conversion element, a second transfer transistor, a second reset transistor, a second amplifier transistor and a second select transistor.

Abstract: The present application discloses a method for driving a pixel circuit. The method includes initializing a voltage setting in a pixel circuit including at least a driving transistor coupled to a light-emitting device and obtaining a first threshold voltage of the driving transistor. The method further includes inputting a first data voltage to the pixel circuit to generate a first driving current independent of the first threshold voltage, to drive light emission of the light-emitting device in a current cycle. Additionally, the method includes generating a compensation voltage via a feedback sub-circuit based on a change of the first driving current upon a second threshold voltage of the light-emitting device. Furthermore, the method includes inputting a second data voltage combined with the compensation voltage as a negative feedback to generate a second driving current to drive light emission of the light-emitting device in a next cycle.

Abstract: A display device, a power supply circuit and a power supply method are provided. The power supply circuit includes a control sub-circuit and a delay sub-circuit. The control sub-circuit is configured to provide a first preset voltage and a second preset voltage and output the first preset voltage to a first power supply terminal; and delay sub-circuit is configured to delay the second preset voltage and output the delayed second preset voltage to a second power supply terminal.

Abstract: Embodiments relate to a display device that includes a control circuit, an array of light emitting diode (LED) zones, and an array of driver circuits that are distributed in the display area. An integrated LED and driver circuit includes one or more LEDs of a LED zone and one or more driver circuits integrated on a substrate in a single package with the LED and driver circuit vertically stacked over a substrate. An addressing scheme configures addresses of the driver circuits using address lines that connect between adjacent driver circuits. Control data is provided to the driver circuits via a power line communication signal that provides both a supply voltage and digital data modulated onto the supply voltage.

Abstract: An interface system including: a receiver; a transmitter configured to transmit a signal including a common mode voltage to the receiver through transmission lines; and a plurality of bias circuits configured to adjust the common mode voltage of the signal, wherein the bias circuits are configured to receive a bias control bit to generate a biased common mode voltage.

Abstract: A display device includes a pixel driving circuit and a light-emitting element. The pixel driving circuit includes an initialization signal terminal, a data signal terminal, a first initialization unit, a driving module and a first light-emitting control unit. The first initialization unit is electrically connected between the initialization signal terminal and an anode of the light-emitting element. In a write frame, the first initialization unit is configured to, under control of a first scan signal, provide the anode of the light-emitting element with a first initialization voltage signal Vref1. In a maintenance frame, the first initialization unit is configured to, under the control of the first scan signal, provide the anode of the light-emitting element with a second initialization voltage signal Vref2 which is different from the first initialization voltage signal Vref1.

Abstract: A pixel driving circuit is disclosed. A first electrode, a second electrode, and a third electrode of a driving sub-circuit respectively receives a first voltage signal, is coupled to the light-emission control sub-circuit, and to a first electrode of a second storage sub-circuit. A first electrode and second electrode of a first storage sub-circuit is coupled to a first node and receives a second voltage signal respectively. A second electrode of the second storage sub-circuit is coupled to a second node. A writing-compensation control sub-circuit is coupled to the first node and the second node, and receives a data signal, a gate signal, and a third voltage signal. A light-emission control sub-circuit is coupled to the first node, the second node, a second electrode of the driving sub-circuit, and the light-emission sub-circuit, and receives a light-emission control signal.

Abstract: Systems and methods are presently disclosed that compensate for temperature-based parasitic capacitance variation of a pixel of a display by causing a driver transistor of the pixel to enter an ohmic or linear region. A lookup table is generated based on temperatures at the pixel, diode voltages, and target diode currents or luminances at a diode of the pixel. A correction voltage is determined based on a target diode current or luminance, a temperature at the pixel, and the lookup table. A data voltage is applied corresponding to the target diode current or luminance and the correction voltage to the driver transistor.

Abstract: A display driving apparatus includes a first bias circuit configured to provide a first bias current; a second bias circuit configured to provide a second bias current; a selection circuit configured to select and output the first bias current as a bias current during a first period in which a change in a driving current occurs, and select and output the second bias current as the bias current during a second period from after the first period to until a next change in the driving current occurs; and an output buffer configured to drive a first input current or a second input current by the bias current, and output the driving current for driving a panel, in correspondence to the first input current or the second input current.

Abstract: The present disclosure provides a charging control method for a display panel, including the following steps: controlling a source charging voltage waveform provided by a data line when touch and display on the display panel are simultaneously performed to enable the source charging voltage waveform to consistently vary with a voltage waveform of a common electrode of the display panel. The present disclosure further provides a display panel and a liquid crystal display.

Abstract: Disclosed is a shift register unit, including a first input circuit, an input control circuit, a pull-down control circuit, a pull-down circuit, an output circuit and a second input circuit. The first input circuit includes a first input sub-circuit, and is configured to, under control of the first signal input terminal, cause a voltage of the first voltage terminal to be output to a second terminal of the first input sub-circuit and output to the pull-up node via a first terminal thereof. The input control circuit is configured to pull down a potential of the second terminal to the potential of a first power supply voltage terminal under control of an enable signal terminal.

Abstract: A display device includes a scan line extending in a first direction, a data line and a driving voltage line extending in a second direction crossing the first direction, a switching thin film transistor (“TFT”) connected to the scan line and the data line, a driving TFT connected to the switching TFT and including a driving semiconductor layer and a driving gate electrode, a storage capacitor connected to the driving TFT and including first and second storage capacitor plates, a node connection line between the data line and the driving voltage line and connected to the driving gate electrode, and a shielding portion between the data line and the node connection line.

Abstract: An electrostatic discharge unit, an array substrate and a display panel are provided. The electrostatic discharge unit includes: an active layer; a first gate electrode and a second gate electrode which are spaced apart from each other and are insulated from the active layer; and a first electrode and a second electrode which are spaced apart from each other and are respectively connected to the active layer. The first gate electrode is electrically connected to the first electrode, and the second gate electrode is electrically connected to the second electrode.

Abstract: Certain exemplary embodiments relate to entertainment systems that interact with users to provide access to media appropriate to and/or customized for a particular user using the entertainment system, the location at which the entertainment system is being accessed, and/or a predefined event. For example, in certain exemplary embodiments, an entertainment system in a location is configured to provide jukebox-related and entertainment system mediated services that are accessible from within and from the outside of the location, and provide (1) attract or flight media operations, (2) browsing services, and/or (3) search screens appropriate to and/or customized for a particular user using the entertainment system, the location at which the entertainment system is being accessed, and/or a predefined event. Such screens may be provided with a three-dimensional look-and-feel in certain exemplary embodiments.

Abstract: In some examples, a display includes a plurality of display pixels, an integrated timing controller and driver circuit to drive the display pixels, and a de-multiplexer circuit including one or more transistors coupled to the integrated timing controller and driver circuit and coupled to one or more of the plurality of display pixels.

Abstract: A first receiver receives serial data including multiple odd-numbered pixels arranged horizontally at odd-numbered positions in a frame. A second receiver receives serial data including multiple even-numbered pixels arranged horizontally at even-numbered positions in a frame. A signal processing unit integrates the multiple odd-numbered and even-numbered pixels, so as to generate line data. A first reception abnormal state detector detects an abnormal state in the first receiver. A second reception abnormal state detector detects an abnormal state in the second receiver. When the first reception abnormal state detector detects an abnormal state, the signal processing unit restores odd-numbered pixels using even-numbered pixels. When the second reception abnormal state detector detects an abnormal state, the signal processing unit restores even-numbered pixels using odd-numbered pixels.

Abstract: The disclosure discloses a method and apparatus for driving a display panel, and a display device. A method for driving a display panel according to an embodiment of this disclosure includes: determining a charging length of time of the current row of pixels; determining a common voltage value corresponding to the charging length of time; and driving the current row of pixels using the common voltage value.

Abstract: An electronic device includes a housing, which may be deformable or may include hinges to allow a display, which is flexible, to be deform by bending or other operations. One or more flex sensors detect when the electronic device is deformed at a deformation portion. One or more processors, which include an application processor, reconfigure a presentation of content along the flexible display in response to detecting deformation at the deformation portion, where the reconfiguring includes a content aspect ratio transition from a first predefined aspect ratio to a second predefined aspect ratio.

Abstract: A display device and a display control method are provided. The display device is applicable to a display panel. The display device includes a display driver integrated circuit (IC), a gate driver in panel (GIP) circuit and a GIP check circuit. The GIP circuit includes a plurality of shift registers connected in series, and the shift registers may generate a plurality of gate driving signals to control operations of a plurality of rows of display units within the display panel, respectively. The GIP check circuit may sequentially check whether a plurality of specific gate driving signals among the gate driving signals are available. The display driver IC may generate a check result according to at least one signal from the display panel, and selectively adjust display data corresponding to an image to make the display panel display an adjusted image according to the check result.

Abstract: A display panel and an image data compensation method thereof are provided. The display panel includes a first data driving module and a second data driving module. The first data driving module is configured to provide image data signals for a first display area and perform De-Mura compensation. The second data driving module is configured to provide image data signals for a second display area and perform De-Mura compensation. The first data driving module is configured to obtain image data of the second display area after De-Mura compensation, and adjust image data of a first compensation area adjacent to the second display area in the first display area. The second data driving module is configured to obtain image data of the first display area after De-Mura compensation, and adjust image data of a second compensation area adjacent to the first display area in the second display area.

Abstract: Embodiments of the present disclosure provide an array substrate, a display device. The array substrate comprises first power lines and second power lines disposed on a substrate, wherein the first power line crosses the second power line to define a pixel region, wherein the first power lines crosses the second power lines at intersection points, and the intersection points include a first intersection point where the first power line is electrically connected to the second power line and a second intersection point where the first power line is insulated from the second power line are insulated; the first intersection points for each of the first power supply lines and/or the first intersection points for each of the second power supply lines are distributed at intervals.

Abstract: A pixel circuit and a driving method thereof, and a display device and a driving method thereof are disclosed. The pixel circuit includes a drive circuit, a reset circuit, and a sensing circuit. A control terminal of the drive circuit is configured to receive a data voltage, a first terminal of the drive circuit is configured to receive a first voltage, and a second terminal of the drive circuit is configured to be electrically connected to a light-emitting element. The reset circuit is electrically connected to the second terminal of the drive circuit, and is configured to reset the second terminal of the drive circuit in response to a first scanning signal. The sensing circuit is electrically connected to the second terminal of the drive circuit, and is configured to connect the second terminal of the drive circuit to a sensing signal line in response to a second scanning signal.

Abstract: The present disclosure discloses a pixel driving circuit and a method of driving the same, a display panel and a display apparatus. The pixel driving circuit includes: a driving circuit, an energy storage circuit, a data and sensing line, a first initialization circuit, a second initialization circuit and a data writing circuit.

Abstract: A method for controlling a charging time of a display panel includes: during t0+k?t in a (k+1)-th blanking time, writing a data voltage to a gate of a driving transistor, and detecting a voltage Vk_(j,i) of a second electrode of the driving transistor; during a t0+(k+r)?t in a (k+1+r)-th blanking time, writing the data voltage to the gate of the driving transistor, and detecting a voltage Vk+1_(j,i) of the second electrode of the driving transistor; determining whether ?Vj,i=Vk+1_ji?Vk_ji is less than or equal to a target voltage difference VT; if ?Vj,i?VT, taking the T=t0+k?t as an expected charging time of a sub-pixel; if ?Vj,i>VT, cyclically performing the charging step described above to obtain ?Vj,i=Vk+p+1_(j,i)?Vk+p_(j,i), and comparing ?Vj,i with the target voltage difference VT, until ?Vj,i?VT, taking t0+(k+p+r?1)?t as the expected charging time of the sub-pixel. p is taken from 1, and increases by 1 for each cycle.

Abstract: A method of displaying an image and an image display device are disclosed. The method is implemented by calculating a total current value of subpixels of an image to be displayed, and comparing the total current value of the subpixels with a total current threshold, thereby to output a gain factor for adjusting brightness of an image to be displayed, so that an original subpixel dataset can be adjusted according to the gain factor, enabling power consumption to be correspondingly limited at the time when an image is displayed to meet a high brightness requirement.

Abstract: A charge release circuit, a display substrate, a display device and a charge release method thereof are provided. The charge release circuit including: a controller, a charge release sub-circuit and a first conductor, wherein the charge release sub-circuit is respectively connected with the controller, the first conductor and a second conductor in an active area of an array substrate, and the charge release sub-circuit is configured to conduct the first conductor and the second conductor under a control of the controller, so as to allow charges on the second conductor to move to the first conductor. The charge release circuit can solve the problem that the display panel in the black-screen state displays bright spots so as to reduce the number of bright spots on the display panel in the black-screen state.

Abstract: Disclosed are a pixel circuit and a driving method thereof, an array substrate and a display device. The pixel circuit includes: a driving circuit, including a control terminal, a first terminal and a second terminal, and configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; and input circuit, configured to transmit a reset voltage and a data signal in response to a first scan signal; a reset circuit, configured to apply the reset voltage to the control terminal in response to a second scan signal; a compensation circuit, configured to store the data signal and to electrically connect the control terminal with the second terminal in response to a third scan signal; and a data writing circuit, configured to apply the data signal to the compensation circuit in response to the third scan signal.

Abstract: A display substrate, a display panel, and a manufacturing method and a driving method of a display substrate are provided. The display substrate includes a base substrate, a pixel circuit, and a photosensitive unit. The pixel circuit and the photosensitive unit are on the base substrate, the pixel circuit includes a first transistor, and an orthographic projection of the photosensitive unit on the base substrate at least partially overlaps with an orthographic projection of the first transistor on the base substrate.

Abstract: A display device includes pixels, a scan driver, an emission driver, and a data driver. A pixel of an i-th horizontal line includes a light emitting element, a first transistor including a first electrode connected to a first node, a second transistor including a gate electrode connected to an (i+x)-th emission control line and connected to one of the data lines, a third transistor including a gate electrode connected to an (i+y)-th emission control line, and connected between the second transistor and the first node, a fourth transistor connected between a third node connected to a second electrode of the first transistor and a second node, and turned on by a scan signal supplied to an i-th scan line, and a fifth transistor connected between the first power and the first node, and turned off by the emission control signal supplied to an i-th emission control line.

Abstract: The present disclosure relates to a gate driving circuit applied to a foldable display panel comprising B display areas arranged in order. The gate driving circuit may include B gate driving subcircuits and a control circuit. Each of the gate driving subcircuits may correspond to one of the display areas and each of the gate driving subcircuits may comprise a plurality of stage gate driving units. The control circuit may be configured to, when the foldable display panel is in a full screen display state, control a type of an input signal in a last stage gate driving unit of a bth gate driving subcircuit to be the same as a type of an input signal in a first stage gate driving unit of a (b+1)th gate driving subcircuit, where B is an integer greater than 1 and b is a positive integer less than B.