Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.

Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.

Abstract: What is disclosed are systems and methods of compensation of images produced by active matrix light emitting diode device (AMOLED) and other emissive displays. Sub-sampling of pixel measurement data utilized in compensation of the display is utilized to reduce the data bandwidth between memory and a compensation module where the data is locally interpolated.

Abstract: When switching sources, resolutions or refresh rates in a video distribution network, switching times are reduced by maintaining video lock and security authentication between a video switcher and a video sink. The scaler maintains video lock and security authentication by continuing to generate video timing data during switching events. The scaler also facilitates an aesthetically pleasing transition by generating image content data prior to and after the switching event.

Abstract: Methods and apparatus for providing multiple graphics processing capacity, while utilizing unused integrated graphics processing circuitry on a bridge circuit along with an external or discrete graphics processing unit is disclosed. In particular, a bridge circuit includes an integrated graphics processing circuit configured to process graphics jobs. The bridge circuit also includes an interface operable according to interface with a discrete graphics processing circuit. A controller is included with the bridge circuit and responsive whenever the discrete graphics processing circuit is coupled to the interface to cause the integrated graphics processing circuit to process a task of the graphics job in conjunction with operation of the discrete graphics processing circuit that is operable to process another task of the graphics job. Corresponding methods are also disclosed.

Abstract: A data processor is configured to perform first processing to acquire data that is included in reception signals received by an antenna and is transmitted in accordance with a first wireless communication scheme and second processing to acquire data that is included in the reception signals and is transmitted in accordance with a second wireless communication scheme. The data processor has, as an operating mode, a first operating mode and a second operating mode. The first operating mode is a mode in which, when the first processing is performed, the second processing is intermittently performed in place of the first processing. The second operating mode is a mode in which, when the first processing is performed, the second processing is intermittently performed in place of the first processing at intervals longer than intervals in the first operating mode.

Abstract: Examples of GPU resource sharing among distributed applications in a distributed computing environment are disclosed. In one example, a method includes receiving a first request from a first distributed application of the plurality of distributed applications for first requested GPU resources. The method may further include receiving a second request from a second distributed application of the plurality of distributed applications for second requested GPU resources. The method may also include receiving response from each of the plurality of computing nodes indicating an availability of GPU resources for each of the plurality of computing nodes. Additionally, the method may include, responsive to determining that at least one of the first and second requests can be fulfilled by at least one of the plurality of computing nodes, allocating a first set of GPU slices for the first application and allocating a second set of GPU slices for the second application.

Abstract: Examples of GPU resource sharing among applications are disclosed. In one example, a method includes receiving a first request from a first application of the plurality of applications for first requested GPU resources, and receiving a second request from a second application of the plurality of applications for second GPU resources. The method also includes, responsive to determining that the first requested GPU resources are available, allocating a first slice of the GPU resources with a first requested amount of resources to the first application and, responsive to determining that the second requested GPU resources are available, allocating a second slice of the GPU resources with a second requested amount of resources to the second application. Further, the method includes enabling the first application and the second application to execute concurrently within the first slice of the GPU and the second slice of the GPU respectively.

Abstract: Systems, methods, and non-transitory computer readable media configured to select a code. An image on which the code is superimposed is selected. A block of the code is associated with a corresponding part of the image. A desired value of opacity of the block of the code is determined based on the corresponding part of the image. A personalized code is generated based on the desired value of opacity of the block of the code.

Abstract: The invention in particular relates to the execution control of protected internal functions and applications embedded in a mobile terminal microcircuit card. The control of a protected internal function is directly carried out in the microcircuit card. After having detected (400) a command for placing the card on standby, on the basis of an item of information received from a mobile terminal into which is connected the card, at least one indication relative to the execution of the protected internal function is analyzed (415). If the protected internal function is liable to be affected by the execution of the command for placing on standby, the execution of the command for placing on standby is deferred (410).

Abstract: In an embodiment, at least one computer readable storage medium has instructions stored thereon for causing a system to send, from a processor to a task execution device, a first call to execute a first subroutine of a set of chained subroutines. The first subroutine may have a first subroutine output argument that includes a first token to indicate that first output data from execution of the first subroutine is intermediate data of the set of chained subroutines. The instructions are also for causing the system, responsive to inclusion of the first token in the first subroutine output argument, to enable the processor to execute one or more operations while the task execution device executes the first subroutine. Other embodiments are described and claimed.

Abstract: One embodiment of the present invention includes a method for processing graphics objects. The method includes receiving a first draw-call and a second draw-call. The method also includes dividing the first draw-call into a first set of sub-draw-calls and the second draw-call into a second set of sub-draw-calls. The method further includes identifying a first screen tile. The method also includes identifying a first group of sub-draw-calls included in the first set of sub-draw-calls that overlap the first screen tile and a second group of sub-draw-calls included in the second set of sub-draw-calls that overlap the second screen tile. The method further includes causing the first group of sub-draw-calls and the second group of sub-draw-calls to be processed together.

Abstract: A display device and method of driving the same are disclosed. The display device that transmits signals between a system board section and a circuit board section through an interface and uses Panel Self-Refresh (hereinafter, abbreviated as ‘PSR’) to reduce power consumption, the circuit board section comprising a PSR controller that, when a PSR On signal is supplied from the system board section, changes the operating frequency of a gate driver and data driver to a frequency higher than a reference frequency for driving the panel with PSR On, set by the system board section.

Abstract: A computing device is disclosed. The computing device includes a housing having electrical plug blades for insertion into an electrical outlet, an AC/DC electrical converter contained within the housing, a system on a chip (SoC) powered by the converter and contained within the housing, at least one data storage device in data communication with the SoC and contained within the housing, a networking device in data communication with the SoC and contained within the housing, an input receiving device in data communication with the SoC and contained within the housing, and at least one output port in data communication with the SoC and contained within the housing.

Abstract: A method, system and computer program product are provided for detecting and configuring an external input/output (IO) enclosure in a computer system. A PCIE Host Bridge (PHB) in a system unit is connected to a plurality of PCIE add-in card slots. One or more cables are connected between the PHB and the external enclosure. System firmware including detecting and configuring functions uses sideband structure for detecting a PCIE cable card and configuring the external input/output (IO) enclosure.

Abstract: A method, system and computer program product are provided for detecting and configuring an external input/output (IO) enclosure in a computer system. A PCIE Host Bridge (PHB) in a system unit is connected to a plurality of PCIE add-in card slots. One or more cables are connected between the PHB and the external enclosure. System firmware including detecting and configuring functions uses sideband structure for detecting a PCIE cable card and configuring the external input/output (IO) enclosure.

Abstract: A method, system and computer program product are provided for implementing health check for optical cable attached Peripheral Component Interconnect Express (PCIE) enclosures in a computer system. System firmware is provided for implementing health check functions. One or more optical cables are connected between a host bridge and a PCIE enclosure. A PCIE link to the PCIE enclosure is reset responsive to a predefined event. After a set delay, a PCIE link health check is performed verifying PCIE link width and speed.

Abstract: A method, system and computer program product are provided for implementing health check for optical cable attached Peripheral Component Interconnect Express (PCIE) enclosures in a computer system. System firmware is provided for implementing health check functions. One or more optical cables are connected between a host bridge and a PCIE enclosure. A PCIE link to the PCIE enclosure is reset responsive to a predefined event. After a set delay, a PCIE link health check is performed verifying PCIE link width and speed.

Abstract: A wireless transmission and video integrated apparatus includes a hub module, a video module and a wireless module. The hub module includes a hub unit, a first expansion interface, a second expansion interface and a transmission interface. The video module includes a first connection interface, an image processing unit, an image acquisition unit and a microphone unit. The video module is electrically connected to the first expansion interface of the hub module through the first connection interface. The wireless module includes a second connection interface, a wireless communication unit and an antenna unit. The wireless module is electrically connected to the second expansion interface of the hub module through the second connection interface. The video module and the wireless module are integrated as a whole through the hub module, and then electrically connected to an electronic apparatus through the transmission interface to help with the assembly.

Abstract: Efficient power conservation is enabled using a configuration having multiple processors. A printing device has a first processor unit that runs a program stored in a first memory, and a second processor unit that runs a program stored in a second memory, and has operating modes including a normal mode in which the first processor unit and the second processor unit operate according to a normal clock, and a first power conservation mode in which, after going to a state enabling the first processor unit to execute some processes of the second processor unit, the first processor unit operates according to the normal clock, and the second processor operates according to a slow clock having an operating frequency lower than the normal clock.

Abstract: A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

Abstract: In one embodiment, the present invention includes a method for directly communicating between an accelerator and an instruction sequencer coupled thereto, where the accelerator is a heterogeneous resource with respect to the instruction sequencer. An interface may be used to provide the communication between these resources. Via such a communication mechanism a user-level application may directly communicate with the accelerator without operating system support. Further, the instruction sequencer and the accelerator may perform operations in parallel. Other embodiments are described and claimed.

Abstract: Embodiments herein provide a method for managing an incoming notification. The method includes displaying, on a secondary display of a wearable device, an indication of the incoming notification, wherein the secondary display is located on a strap of the wearable device. The method includes receiving, by the wearable device, an input on the indication of the incoming notification displayed on the secondary display. The method includes performing, on a primary display of the wearable device, at least one action associated with the incoming notification based on the input.

Abstract: Methods and apparatus to provide heterogeneous I/O (Input/Output) using RDMA (Remote Direct Memory Access) and/or Active Message are described. In an embodiment, information is exchanged between an embedded system and a storage device via a source device. The embedded system and the storage device exchange information over a first link and a second link instead of a third link in response to a transfer rate of the first link (coupled between the embedded system and the source device) being faster than a transfer rate of the second link (coupled between the source device and the storage device). The third link is capable to directly couple the embedded system and the storage device. Other embodiments are also disclosed and claimed.

Abstract: Aspects of the present disclosure involve systems and methods for providing remote graphics processing unit (GPU) availability to one or more computing components of a data center. In particular, the present disclosure provides the remote location of one or more GPUs within a computing environment for use by one or more computing devices within the computing environment. Thus, each computing device may utilize the remotely located GPUs to perform the tasks of the computing device associated with a GPU, without the need for the GPU to be located within the computing device itself or within the same rack of the computing device. In this manner, one or more GPUs of a computing environment may provide GPU services to any number of computing devices, even though the GPUs are remote from the computing devices.

Abstract: The present systems and methods leverage aspects of GPU architecture to improve the operational efficiency of the GPU. In one aspect, a set of complementary GPU kernels is identified. From among the tested GPU kernels, a set of ?-kernels, may be determined wherein a kernel may be labeled as an ?-kernel if it achieves the best performance among all tested kernels for at least one set of parameter values. An intelligent selection algorithm may be used to determine at least one best ?-kernel from among the set of ?-kernels, wherein the determining by the intelligent selection algorithm includes selecting the at least one best ?-kernel based on the parameter values of the selected datasets.

Abstract: In one example, a method for transmitting video data includes capturing, by a source device, a plurality of tokens of graphical commands renderable into video data along with one or more texture elements; and generating, by the source device, a plurality of command frames that each correspond to at least one token of the plurality of tokens. In this example, each respective command frame of the plurality of command frames includes: an identification of at least one graphical command corresponding to the at least one token, and one or more arguments associated with the at least one token. In this example, the method also includes outputting, by the source device and for transmission to a sink device, the plurality of command frames.

Abstract: A method, computing device, and non-transitory computer-readable medium for arbitrating data for channels in a video pipeline. The method includes determining arbitration weights for the channels. The method also includes determining which channels have arbitration weights above a threshold. The method further includes issuing data to the channels with arbitration weights above the threshold. The method also includes decrementing arbitration weights for channels for which data is issued. The method further includes repeating the determining, issuing, and decrementing until no channels have arbitration weights above the threshold.

Abstract: A method for domain shading may include analyzing graphics state data, and generating all first primitives through a single-pass domain shading or generating only second primitives which are visible among the first primitives through a two-pass domain shading based on a result of the analysis.

Abstract: Methods and apparatuses are disclosed for improving graphics abilities while switching between graphics processing units (GPUs). Some embodiments may include a display system, including a plurality of graphics processing units (GPUs) and a memory buffer coupled to the GPUs via a timing controller, where the memory buffer stores data associated with a first video frame from a first GPU within the plurality of GPUs and where the timing controller is switching between the first GPU and a second GPU within the plurality.

Abstract: Described are methods and systems of processing three-dimensional (“3D”) data by generating an edge map, a depth map, or both. Data points are placed into a bin array based their respective image coordinates. The data points in each bin are processed to determine edge data. An edge map may be generated from this edge data. A bin value may be generated based on the data points in each bin, and a depth map generated using these bin values. The edge data and the edge map may be processed using one or more filter functions. Measurements based on the edge map may be provided at a resolution greater than that available with the depth map.

Abstract: There are provided source-to-source transformation methods for a multi-dimensional array and/or a multi-level pointer for a computer program. A method includes minimizing a number of holes for variable length elements for a given dimension of the array and/or pointer using at least two stride values included in stride buckets. The minimizing step includes modifying memory allocation sites, for the array and/or pointer, to allocate memory based on the stride values. The minimizing step further includes modifying a multi-dimensional memory access, for accessing the array and/or pointer, into a single dimensional memory access using the stride values. The minimizing step also includes inserting offload pragma for a data transfer of the array and/or pointer prior as at least one of a single-dimensional array and a single-level pointer. The data transfer is from a central processing unit to a coprocessor over peripheral component interconnect express.

Abstract: Example embodiments disclosed herein relate to selectively connecting an interconnect bus to an expansion slot. A first chip is connected to a first interconnect bus. A second chip is connected to a second interconnect bus. A switch selectively connects the first interconnect bus to one of a plurality of expansion slots.

Abstract: A method of operating a timing controller, which communicates with a host through a mobile industry processor interface (MIPI) and communicates with a display panel module through a display interface, is provided. The method includes storing image data compressed by one of the host and the timing controller in a frame memory, decompressing the image data stored in the frame memory, and performing panel self-refresh on the display panel module using the decompressed image data.

Abstract: In one embodiment, the present invention includes a method for directly communicating between an accelerator and an instruction sequencer coupled thereto, where the accelerator is a heterogeneous resource with respect to the instruction sequencer. An interface may be used to provide the communication between these resources. Via such a communication mechanism a user-level application may directly communicate with the accelerator without operating system support. Further, the instruction sequencer and the accelerator may perform operations in parallel. Other embodiments are described and claimed.

Abstract: When switching sources, resolutions or refresh rates in a video distribution network, switching times are reduced by maintaining video lock and security authentication between a video switcher and a video sink. The scaler maintains video lock and security authentication by continuing to generate video timing data during switching events. The scaler also facilitates an aesthetically pleasing transition by generating image content data prior to and after the switching event.

Abstract: An information display method, an information display device, and a display apparatus are disclosed in the embodiments of the present invention. Sound information is acquired, and the acquired sound information is sent to the sound control register such that the sound control register obtains a corresponding sound control register value according to the sound information, the display information is obtained according to the sound control register value, and the display information is displayed. With the method according to the embodiment of the present invention, the sound information can be displayed, thereby improving user's usage perception.

Abstract: An input information obtaining portion of a control section obtains requests input from an input device by a user, which requests include a display region moving request to enlarge/reduce or scroll an image displayed on a display device and a request to generate/erase a viewport, change the size of a viewport, or move a viewport. A viewport control portion successively determines the number, arrangement, and size of viewports accordingly. A display region determining portion determines the region of an image to be displayed next in each viewport. A loading portion determines tile images to be newly loaded, and loads the data of the tile images from a hard disk drive. A decoding portion decodes the data of tile images used for rendering the image in each viewport. A display image processing portion updates the display region independently for each viewport.

Abstract: A method for mapping a two-dimensional image data onto a three-dimensional graphic model of an object includes taking a plurality of two-dimensional images of the object. Each two-dimensional image has data, such as temperature data, which is desired to be represented on the three-dimensional graphic model. The three-dimensional model of the object is viewed on a graphic user interface. The three-dimensional model has a plurality of facets, each facet being configured for selectively receiving the data from the two-dimensional images, so that the two-dimensional images are mapped onto the facets of the three-dimensional model. The three-dimensional model can then be analyzed.

Abstract: An image forming apparatus includes a state management unit to manage state information of the image forming apparatus; a determination unit to determine functions allowable to the user accessing the image forming apparatus according to the state information; a web server unit to generate the user interface screen on which functions are activated according to a result of the determining; and a control unit to control the image forming apparatus to display the generated user interface screen to the user.

Abstract: A system and method of terminating processing requests dispatched to a coprocessor hardware accelerator in a multi-processor computer system based on matching various fields in the request made to the coprocessor to identify the process to be terminated. A kill command is initiated by a write operation to a coprocessor block kill register and has match enable and value for each field in the coprocessor request to be terminated. Enabled fields may have one or more values associated with a single request or multiple requests for the same coprocessor. At least one match enable must be set to initiate a kill request. A process kill active signal prevents other coprocessor jobs from moving between operational stages in the coprocessor hardware accelerator. Processing jobs that are idle or do not match the fields with match enables set signal done with no match and continue processing. Processing jobs that do match the fields with match enables set are terminated and signal done with match.

Abstract: According to at least one embodiment, a television receiver includes: a display; a casing comprising an opening, the casing being configured house the display; a board configured to be housed in the casing; a connector configured to be mounted on the board and exposed from the opening; an elastic member between the connector and the casing, the elastic member being configured to touch the connector; a cover configured to be at least partially positioned at a side of the connector opposite to the elastic member and cover a part of the connector; and a restriction portion configured to be positioned at the side of the connector opposite to the elastic member and restrict movement of the connector.

Abstract: A method, a system, and a computer program product for graphically representing physical objects in a contextual setting are disclosed. A first data for a predetermined location, at least one distance measurement between at least two location points at the predetermined location, and at least one image of at least one portion of the predetermined location can be received. Based on the receiving and information obtained from at least one publicly available resource, a spatial representation of the predetermined location configured to include at least one existing feature can be generated. Spatial representation of the predetermined location includes a detailed representation of the at least one portion of the predetermined location having the at least one existing feature.

Abstract: A transmission interface has a quick burst motion readout mechanism and is configured to be used between a master device and a slave device. The transmission interface includes a trigger channel configured to allow the master device to transmit a trigger signal to the slave device before transmission of data, and includes a data transmission channel provided to the slave device to transmit readable data to the master device after the slave device receives the trigger signal. The master and slave devices are adapted to a predetermined data transmission protocol by which the readable data can be directly transmitted and not accompanied by address data related to the readable data.

Abstract: Disclosed are “graphics overrides.” An override accepts a stream of graphics commands as produced by an application and then modifies the stream before it is rendered by the GPU. Different overrides perform different modifications. One override can modify a stream of graphics commands in response to another stream. Overrides can enforce conformity with a visual paradigm and, by being modified, can support a change to that paradigm without requiring the applications to change. Overrides can monitor the entire computing environment and improve the response to that environment of a particular application: For example, an override monitors frames as they are produced by an application. If the application cannot keep up with a fixed frame rate, then the override produces “synthetic” frames to take the place of missing frames. Overrides are not restricted to fixing existing problems. Rather, applications can be developed that depend upon the presence of overrides.

Abstract: An electronic device and a method for switching mode of a Thunderbolt connector thereof are provided. The electronic device includes a core unit, a PCIe device, a Thunderbolt control unit, a first switch circuit and a second switch circuit. The Thunderbolt control unit has a host mode and an end-point device mode. A common terminal of the first switch circuit is coupled to a PCIe port of the PCIe device. A first selection terminal of the first switch circuit is coupled to a first PCIe port of the core unit. A common terminal of the second switch circuit is coupled to a PCIe port of the Thunderbolt control unit. A first selection terminal of the second switch circuit is coupled to a second PCIe port of the core unit. A second selection terminal of the first switch circuit is coupled to a second selection terminal of the second switch circuit.

Abstract: The present invention discloses a tablet computer and a method for controlling the same. The method includes steps of receiving a first video signal outputted from an external device; converting the first video signal into a first low voltage differential signal; receiving a second video signal outputted from a processor; converting the second video signal into a second low voltage differential signal; making the tablet computer selectively operate in a tablet computer mode or an external device mode; outputting the second low voltage differential signal to a display module to display corresponding data when the tablet computer operates in the tablet computer mode; and outputting the first low voltage differential signal to the display module to display corresponding data when the tablet computer operates in the external device mode.

Abstract: A graphics data processing method, apparatus, and system. In the embodiments of the present invention, a virtual client process and a virtual rendering server may create a shared memory through negotiation. The virtual client process may send storage address information of graphics instruction data to the virtual rendering server, so that the virtual rendering server may obtain the graphics instruction data from the shared memory according to the storage address information of the graphics instruction data. The virtual rendering server may further send storage address information of target display data to the virtual client process, so that the virtual client process may obtain the target display data from the shared memory according to the storage address information of the target display data.

Abstract: Systems and methods consistent with the present disclosure may be utilized to negate the distinction between a display device operating in video and command modes in that commands associated with either mode are prioritized and executed according to a command scheduler consistent with the present disclosure. A command scheduler consistent with the present disclosure includes a display driver stack and a scheduler coupled to the display driver stack. The scheduler is configured to receive commands from the driver stack. Further, the scheduler is configured to queue and schedule the commands to be executed during a boot environment and during runtime. A host controller may also be coupled to the scheduler and may receive at least one of the commands from the scheduler. In time, the host controller transfers the commands to a device for execution.

Abstract: Display apparatuses and methods are provided. A display apparatus includes a display module, a driving device that is configured to deform the display module from a flat surface state to a curved surface state and deform the display module from the flat surface state to the curved surface state, and a base member that is disposed at a rear of the display module and supports the driving device.