Abstract: A docking device including a casing and an extension supporting mechanism is disclosed. The extension supporting mechanism includes a sliding member, a transmission member, a supporting member and a clamping member. The sliding member is slidably disposed on the casing. The transmission member, the supporting member and the clamping member are pivoted to the casing, respectively. The transmission member is coupled to the sliding member. The supporting member is coupled to the transmission member. The clamping member further abuts against the sliding member and is for sliding the sliding member as rotating, such that the sliding member drives the transmission to rotate. Accordingly, the transmission member is driven to activate the supporting member to stretch an extension portion of the supporting member out of the casing.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to MIDlet execution in a desktop environment and provide a method, system and computer program product for clip region definition for a MIDlet region space. In one embodiment of the invention, a method for clip region definition for a MIDlet region space can be provided. The method can include extracting a raster image from a MIDlet, computing a clip region from the extracted raster image for the MIDlet, deploying the MIDlet to a desktop environment through an emulator, and applying the clip region to the MIDlet through the emulator to deploy the MIDlet as a widgetized application in the desktop environment.

Abstract: A method for urging the start of viewing an interleaved audio video stream is disclosed. The method includes repositioning audio and video access units in the interleaved audio video stream. A computer program product and a data processing system are also disclosed.

Abstract: A data-storage device having a flash memory allocated to provide data-storage space, a valid page count table, logical-to-physical address mapping information, and an invalid block record. The data-storage device further having a controller, allocating the data-storage space to store data issued from a host, and establishing and maintaining the valid page count table, the logical-to-physical address mapping information, and the invalid block record in the FLASH memory to manage the data-storage space. A FLASH memory control method is also provided.

Abstract: A first software stack and a second software stack are run in a virtual environment. The virtual environment may be created by a hardware virtualizer. The hardware virtualizer may send the first software stack to the discrete graphics processing unit and the second software stack to the integrated graphics processing unit.

Abstract: An information processor includes an information processing sub-system having information processing circuits and a memory sub-system performing data communication with the information processing sub-systems, wherein the memory sub-system has a first memory, a second memory, a third memory having reading and writing latencies longer than those of the first memory and the second memory, and a memory controller for controlling data transfer among the first memory, the second memory and the third memory; graph data is stored in the third memory; the memory controller analyzes data blocks serving as part of the graph data, and performs preloading operation repeatedly to transfer the data blocks to be required next for the execution of the processing from the third memory to the first memory or the second memory on the basis of the result of the analysis.

Abstract: A display system and a data transmission method thereof are provided. When a first frame stored in a frame buffer and a plurality of second frames to be outputted by an audio and video (AV) source are the same, the AV source set a AV control signal corresponding to a self-refresh mode, and a timing controller controlled by the AV control signal accesses the first frame to output a display data. When the first frame and the second frames are different from each other, the AV source sets the AV control signal corresponding to a normal mode, and sets a AV data signal according to the second frames, and the timing controller controlled by the AV control signal outputs the display data corresponding to the received second frame or accesses the frame buffer to output the display data according to timings of the AV data signal and the display data.

Abstract: A method of processing packets includes receiving packets and assigning the packets to different pages, where each page represents a fixed amount of memory. The different pages are distributed to different pools, where each pool has a unique mapping to banks, and where each bank is a set of memory resources. The different pages from the different pools are assigned to different banks in accordance with the unique mapping.

Abstract: A method for transmitting a video signal from an application running on a server over an IP network to a client device. The application is drawing its content, in a plurality of sequential drawing events, into a virtual frame buffer. Simultaneously, each drawing event is registered in a list of drawing events and each drawing event is associated with an address (location) of each area that was affected by this drawing event. The list is repetitively checked and if any area have changed since previous periodic check, such area is retrieved, segmented into blocks of standardized size and transmitted, together with its address in a frame, over the IP network to the client. On the client side the encoded blocks are received and combined, using the address data, into frames of an encoded video stream that can be directly fed into an industry standard decoder of client device.

Abstract: A method includes determining, through test instructions executing on a processor of a data processing device, utilization of a graphics engine of the processor by an application executing thereon based on initiation thereof through a driver associated with the processor and/or an operating system executing on the data processing device, and detecting, through the test instructions, an idle state of one or more non-graphics engine(s) of the processor. The method also includes transitioning, through the processor, a frame buffer associated therewith into a self-refresh mode of low power utilization thereof, and copying data related to the execution of the application to a memory of the data processing device. Further, the method includes clock-gating the one or more non-graphics engine(s) to reduce a power consumption of the data processing device, and enabling the graphics engine to utilize the copied data in the memory for continued execution of the application.

Abstract: A texture repository is provided for use with an image manipulation application. The texture repository provides a canvas to the image manipulation application for use with an image filter. The texture repository may provide an existing canvas matching the request from the image filter, or the texture repository may generate a new canvas for the request. The generated canvas may be procedurally generated to match the request, or the generated canvas may be resized from an existing canvas stored in a non-volatile storage or a cache.

Abstract: Embodiments of a bridge circuit and system are disclosed that may allow for converting transactions from one communication protocol to another. The bridge circuit may be coupled to a first bus employing a first communication protocol, and a second bus employing a second communication protocol. The bridge circuit may be configured to convert transactions from the first communication protocol to the second communication protocol, and convert transaction from the second communication protocol to the first communication protocol. In one embodiment, the bridge circuit may be further configured to flag transactions that cannot be converted from the second communication protocol to the first communication protocol. In a further embodiment, an error circuit coupled to the bridge circuit may be configured to detect flagged transactions.

Abstract: Systems and methods are disclosed for identifying unauthorized presentation of protected content by one or more participants in a media collaboration. In one implementation, a processing device receives one or more content elements, each of the one or more content elements being provided within a media collaboration and associated with one or more users. The processing device identifies an unauthorized presentation of at least one of the one or more content elements within the media collaboration. Based on an identification of the unauthorized presentation, the processing device initiates one or more actions with respect to one or more of the users associated with the at least one of the one or more content elements.

Abstract: A computing device may merge two translation tables used when performing a DMA operation into a single, combined translation table. To merge the translation tables, the computing device may update a register in the IOMMU to include a pointer to the combined translation table. In addition, the IOMMU may clear one of the registers from having a pointer to one of the merged translation table. Doing so means the entries in this translation table are now no longer assigned. The IOMMU may update the register with the pointer to the combined translation table to include the unassigned entries in the combined translation table. In this manner, the entries from the two translation tables are merged into the single, combined table. The combined translation table may be owned or assigned to a service provider that originally owned one of the merged translation tables or to a completely different service provider.

Abstract: A computing device may merge two translation tables used when performing a DMA operation into a single, combined translation table. To merge the translation tables, the computing device may update a register in the IOMMU to include a pointer to the combined translation table. In addition, the IOMMU may clear one of the registers from having a pointer to one of the merged translation table. Doing so means the entries in this translation table are now no longer assigned. The IOMMU may update the register with the pointer to the combined translation table to include the unassigned entries in the combined translation table. In this manner, the entries from the two translation tables are merged into the single, combined table. The combined translation table may be owned or assigned to a service provider that originally owned one of the merged translation tables or to a completely different service provider.

Abstract: An information processor includes an information processing sub-system having information processing circuits and a memory sub-system performing data communication with the information processing sub-systems, wherein the memory sub-system has a first memory, a second memory, a third memory having reading and writing latencies longer than those of the first memory and the second memory, and a memory controller for controlling data transfer among the first memory, the second memory and the third memory; graph data is stored in the third memory; the memory controller analyzes data blocks serving as part of the graph data, and performs preloading operation repeatedly to transfer the data blocks to be required next for the execution of the processing from the third memory to the first memory or the second memory on the basis of the result of the analysis.

Abstract: A circuit includes memory retiling methods which distribute image information among a plurality of memory channels producing reconfigured image information distributed among a subset of the plurality of memory channels allowing memory channels outside of the subset to be placed into a power save mode to reduce power consumption. Additional methods are disclosed for further reductions in power consumption.

Abstract: The present invention discloses a method system for transmitting a document over a Network including the steps of a document sender converts a sharing document to be transmitted into a GDI (Graph Device Interface) document by performing virtual printing. The document receiver receives the graph device interface document sent from the document sender through the network The document receiver restores the received GDI document. The contents of the restored GDI document are the same as that of the sharing document. The present invention also provides a system, a virtual printer apparatus and a restoration apparatus, the transmission of the document is not restricted by the application using the method, system and apparatus of the present invention.

Abstract: High definition media content processing techniques are described in which enhanced media content rendering techniques may be performed to output high definition media content. In an implementation, luma keying may be provided to define clear pixels in a composite output using an optimum set of graphics processing instructions. In another implementation, techniques are described which may provide clear rectangles in a composite output of one or more video streams. Clear rectangles to appear in the composite output are configured by a media playback application. A texture is arrived at to represent a union of each of the clear rectangles and is applied to form the clear rectangles in the composite output. In another implementation, capture techniques are described in which an image to capture is resolved as strips to an intermediate texture and then from the texture to a capture buffer in system memory.

Abstract: An apparatus may include a link component and a display component. The link component may be operative to receive media content via data frames over a display interconnect, the data frames received periodically in succession at a first rate corresponding to a native frame rate of the media content. The display component may be operative to display the data frames in succession at a second rate corresponding to a native refresh rate of the display component, the display component operative to re-display data frames already shown to maintain the second rate when new data frames have not been received over the display interconnect.

Abstract: A digital image viewing system comprises a wireless phone unit, a battery charger for the wireless phone unit and a digital photo frame in short-range wireless communication with the wireless phone unit. The digital photo frame may include phone function unit. Usual slide show is played on display of digital photo frame and replaced by a special image when a speaker of digital photo frame plays a ringer melody. The special image relates to a person causing the ringer melody. An operation at the wireless phone unit is transmitted to the digital photo frame through the short-range wireless communication to change the special image back to the usual slide show. Upon receipt of e-mail with image data attached, cellar phone automatically but conditionally opens the e-mail and takes out the image data to transmit it to digital photo frame through the short-range wireless communication or direct contact with battery charger.

Abstract: Embodiments are described for handling the launching of applications in a multi-screen device. In embodiments, a first touch sensitive display of a first screen receives input to launch an application. In response, the application is launched. A determination is made as to whether the first touch sensitive display already has windows in its stack. If there are no windows in the stack of the first touch sensitive display, a new window of the first application is displayed on the first touch sensitive display. If there are windows in the stack, a determination is made whether a second display has windows in its stack. If not, the new window is displayed on the second display. If the second display also has windows in its stack, the new window will be displayed on the first touch sensitive display.

Abstract: A substantially self-contained digital instrumentation module (30) for fixed and rotary wing aircraft provides flight and other situational information, such as attitude, altitude, airspeed, and slip information, during normal aircraft operation or during emergencies, such as a failure of the aircraft's primary instrumentation. The module (30) can be mounted in any of various possible orientations. It includes redundant memories (38,40,50,52) to preserve back-up copies of software and settings during upgrades and changes. It partitions certified software from non-certified software. It can receive software upgrades and settings changes via a common portable memory device. It can automatically calculate and synchronize barometric pressure with the aircraft's primary instrumentation. It also allows for creating a customizable dimming curve (220,222), and for creating customizable range markings (114).

Abstract: A method for the selective utilization of graphics processing unit (GPU) acceleration of database queries in database management is provided. The method includes receiving a database query in a database management system executing in memory of a host computing system. The method also includes estimating a time to complete processing of one or more operations of the database query using GPU accelerated computing in a GPU and also a time to complete processing of the operations using central processor unit (CPU) sequential computing of a CPU. Finally, the method includes routing the operations for processing using GPU accelerated computing if the estimated time to complete processing of the operations using GPU accelerated computing is less than an estimated time to complete processing of the operations using CPU sequential computing, but otherwise routing the operations for processing using CPU sequential computing.

Abstract: In an embodiment, a display control unit is configured to transmit read operations to the memory in the system to read image data for processing, and may employ QoS levels with the read operations to ensure that enough data is provided to satisfy the real time display requirements. To determine which QoS level to use for a given read request, the display control unit may be configured to compare an amount of image data in the display control unit (e.g. in various input and/or output buffers in the display control unit) to one or more thresholds. The display control unit may also be configured to dynamically update the thresholds based on a memory stress level in the memory controller.

Abstract: One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.

Abstract: A display apparatus which can communicate with an information terminal via a network is disclosed. The display apparatus includes a receiving unit which receives content data which are caused to be displayed on the display apparatus and reproduction control information on reproduction of the content data from the information terminal, a storage unit which saves thereon the content data and/or the reproduction control information based on whether there was an occurrence of a stopping cause in a process of saving the content data and/or the reproduction control information that are received from the receiving unit, and a display unit which causes the content data to be displayed on the display apparatus based on the reproduction control information saved in the storage unit.

Abstract: A method for detecting a synchronization signal of a display comprises: obtaining an actual V-sync frequency of the display, comparing the actual V-sync frequency with standard V-sync frequencies prestored in a standard synchronization signal table, and selecting a standard V-sync frequency as a candidate V-sync frequency so that difference between the candidate V-sync frequency and the actual V-sync frequency is within a first error range; obtaining an actual H-sync frequency of the display, comparing the actual H-sync frequency with standard H-sync frequencies in the standard horizontal synchronization signal sub-table which corresponds to the selected candidate V-sync frequency, and selecting a standard H-sync frequency as a correct H-sync frequency so that difference between the correct H-sync frequency and the actual H-sync frequency is within a second error range, thereby a resolution of the display is obtained.

Abstract: There is provided an image data processing device including a display control unit for controlling display of an image on a display device, a decoding priority setting unit for setting a decoding priority in each of image data of a plurality of images that may be displayed on a display screen of the display device by the display control unit, a decoding unit for performing a decoding process on each image data according to the decoding priority set by the decoding priority setting unit, and a storage unit for storing each decoded image data subjected to the decoding process by the decoding unit.

Abstract: One embodiment of the present invention sets forth a technique for addressing data in a hierarchical graphics processing unit cluster. A hierarchical address is constructed based on the location of a storage circuit where a target unit of data resides. The hierarchical address comprises a level field indicating a hierarchical level for the unit of data and a node identifier that indicates which GPU within the GPU cluster currently stores the unit of data. The hierarchical address may further comprise one or more identifiers that indicate which storage circuit in a particular hierarchical level currently stores the unit of data. The hierarchical address is constructed and interpreted based on the level field. The technique advantageously enables programs executing within the GPU cluster to efficiently access data residing in other GPUs using the hierarchical address.

Abstract: An image refreshing method applied to an image processing apparatus is provided for preventing tearing effect during frame refresh. The method includes steps of: determining a location of an updating part of a frame; determining a refresh starting location of the frame on a panel of the image processing apparatus according to the location of the updating part; and writing the updating part to refresh the frame.

Abstract: An image quality compensation device for an organic light emitting display includes: a memory having first and second update blocks selectively storing first and second period compensation values, which are sequentially updated at regular intervals; and a timing controller that configures the first update block as either the current memory page for data loading or the next memory page for data writing and the second update block as the other one of the two, based on a preset check code, and updates the memory by calculating the second period compensation value with the passage of driving time based on the first period compensation value loaded from the update block configured as the current memory page, writing the second period compensation value to the update block configured as the next memory page, and then erasing the first period compensation value from the update block configured as the current memory page.

Abstract: For providing a display device and a method for transferring an image data, shortening process time required to transfer image data without greater processing capacity, the CPU 4 outputs the bypass write signal to the GDC 6, the CPU 4 then outputs the read signal to both the ROM 5 and the GDC 6, and the ROM 5 outputs the image data to the data bus 8 according to input of the read signal, wherein the GDC 6 directly reads the image data outputted on the data bus 8 according to input of the read not through the CPU 4 and writes the read image data to the VRAM 7.

Abstract: The present invention provides an image processing device, including a buffering unit, a minifying unit, a synchronous dynamic random access memory (SDRAM), an overdriving unit, a comparing unit, a restoring unit, and an output controlling unit. The present invention further provides an image processing method and a liquid crystal display incorporated with the image processing device. The image processing device, the image processing method, and the liquid crystal display incorporated with the image processing device will not only directly perform the overdrive-processing of an input high-resolution image, but will also, on the one hand caches an input high-resolution image by the buffering unit, and on the other hand minifies an input high-resolution image. As a result, the image data is already reduced when the overdrive-processing performs, and the consumption of the space of the SDRAM is also accordingly reduced.

Abstract: In an embodiment, a display pipe processes video data for visual display. The display pipe may read the video data from memory, and may employ QoS levels with the memory requests to ensure that enough data is provided to satisfy the real time display requirements. The display pipe may include a pixel buffer that stores pixels that are ready for display. Additionally, the display pipe may include one or more input buffers configured to store input video data to be processed and/or one or more output buffers configured to store processed data that is ready for blending into the final pixels for display. The display pipe determine a number of output equivalent pixels in the data in the input and output buffers, and may consider those pixels as well as the ready pixels in the pixel buffer in determining the QoS levels for requests.

Abstract: Aspects of the disclosure provide an apparatus. The apparatus includes a display module configured to display an image frame on a screen based on pixel data of the image frame, a memory chip configured to include a frame buffer that stores pixel data of image frames to be displayed by the display module and an integrated circuit, such as a system on chip (SOC). The integrated circuit includes a memory controller coupled to the memory chip and configured to access the memory chip to fetch the pixel data from the frame buffer in response to data requests, and a display controller coupled to the display module. The display controller is configured to send data requests to the memory controller to fetch the pixel data from the frame buffer and transmit the pixel data to the display module when the apparatus is in a first mode, such as an active mode.

Abstract: One embodiment of the present invention sets forth a method for accessing display configuration information of a display device in a multi-graphics-processing-unit (multi-GPU) system based on a hot-plug detection signal associated with the same display device. The method includes the steps of changing the power state of a discrete GPU (dGPU) in the multi-GPU coupled to the display device after having detected an assertion of the hot-plug detection signal, retrieving the display configuration information of the display device with the dGPU, and powering down the dGPU after having retrieved the display configuration information.

Abstract: A method includes a) loading a first number n of image sets with an image size ky, the ky images of which are distributed in a regular manner over a volume, which is to be loaded in its entirety as a result; b) loading a number nx of image sets starting with a factor x=1, with the images loaded in total being distributed in a regular manner over the volume; c) determining a camera distance and voxel size based on the number of images loaded, a camera distance and voxel size being suitable as parameters for a volume rendering; and d) repeating the two preceding steps b) and c) while increasing the number of image sets with a factor x=x+1, until all the images of the volume have been loaded in their entirety and/or until the step sequence ends.

Abstract: An image processing apparatus involving various settings, that allows a user to easily restore setting values after changing the setting values. Extracted difference in setting value indicating a difference between setting information at the time of execution of n?1th latest image processing (n: an integer from 1 to N) among N times of image processing (N: an integer not less than 2) and setting information after change of the setting value by the user is held in association with processing history of nth latest image processing. The held difference is used to restore the setting information stored in the storage unit to the setting information at the time of execution of Mth latest image processing (M: an integer from 1 to N) if the processing history of the Mth latest image processing among the processing histories user-selectably displayed on a display unit is selected by the user.

Abstract: A application protection system and method on a touch display of a handheld device are provided. A application is protected by executing a application protection program; and when a user needs to use the application, the protection on the application is removed by performing an accurate protection operation, thereby achieving a technical efficacy of protecting the application in the handheld device so as to protect personal data.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine color information for multiple graphical layers of a graphical display at a location of a pixel, and to determine a pixel color information for the pixel at the location based on the color information for each of the multiple graphical layers.

Abstract: An image signal processor includes a buffer and a buffer controller configured to divide the buffer into a plurality of slots. The buffer controller is configured to store image data necessary for image distortion correction to the buffer. The buffer controller is configured to not store image data unnecessary for image distortion correction to the buffer.

Abstract: Embodiments of the present invention provide for improved timing control in 2-D image processing to maintain a constant rate of fetches and pixel outputs even when the processing operations transition to a new line or frame of pixels. A one-to-one relationship between incoming pixel rate and outgoing pixel rate is maintained without additional clock cycles or memory bandwidth as an improved timing control according to the present invention takes advantage of idle memory bandwidth by pre-fetching a new column of pixel data in a first pixel block of a next line or frame while a new column of an edge pixel block on a current line is duplicated or zeroed out. As the edge pixel block(s) on the current line are processed, the data in the first pixel block of the next line or frame become ready for computation without extra clock cycles or extra memory bandwidth.

Abstract: A display controller includes a graphic memory, a graphic memory control unit and a scan control unit. The graphic memory has a storage capacity defined by a first directional size multiplied by a second directional size. The graphic memory control unit converts two-dimensional (2-D) addresses to one-dimensional (1-D) addresses based on an input clock signal and first directional total pixel number of a display panel for displaying input data, converts the 1-D addresses to physical 2-D addresses based on the first directional size and controls the graphic memory to store the input data. The display panel has a resolution corresponding to the first directional total pixel number multiplied by a second directional total pixel number of the display panel. The scan control unit increases scan addresses one line by one line to display data stored in the graphic memory according to a display resolution.

Abstract: Modification messages may be filtered to reduce the load on a message channel between a render cache and a frame buffer compression. A group of cache lines may be checked to see whether both a subspan request hits an unlit bit and a modify message was already sent. If so, the modification message may be filtered.

Abstract: An image generating apparatus, which can reduce a calculation amount by effectively utilizing a cache resource, generates a graphics image by rendering a polygon and includes a coordinate processing unit loading, from a memory, coordinate data included in vertex data and performing coordinate transform on the loaded coordinate data. The image generating apparatus also includes a determining unit determining whether or not the vertex is a rendering object, using the transformed coordinate data, a shape data cache storing shape data, a shape data processing unit loading, from the memory, the shape data, and storing the loaded shape data in the shape data cache when both of following conditions are satisfied: the vertex is determined to be the rendering object; and the shape data is not yet stored in the shape data cache, and a polygon rendering processing unit rendering the polygon using the transformed coordinate data and the shape data.

Abstract: An image processing apparatus including a display unit including pixels and more than one core processor. Each core processor includes: a diffusion module changing first pixel data of an image signal divided according to rows and then outputting it using a threshold value corresponding to the first pixel data, generating diffusion data using a difference between the changed first pixel data and the first pixel data, and changing second pixel data and third pixel data using the diffusion data; a memory storing an image signal including the image signal divided according to rows and then outputting it and the pixel data changed in the diffusion module; and a memory controller reading an image signal including pixel data changed in the diffusion module and displaying the read image signal to the display unit.

Abstract: A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.

Abstract: A memory access address translating apparatus and method may each classify pixels included in an input image into a plurality of tiles, and may generate a new memory for each of the successive tiles to enable the successive tiles, among a plurality of tiles, to be stored in different banks.

Abstract: One embodiment of the present invention sets forth a technique for storing only the enabled components for each enabled vector and writing only enabled components to one or more specified render targets. A shader program header (SPH) file provides per-component mask bits for each render target. Each enabled mask bit indicates that the pixel shader generates the corresponding component as an output to the raster operations unit. In the hardware, the per-component mask bits are combined with the applications programming interface (API)-level per-component write masks to determine the components that are updated by the shader program. The combined mask is used as the write enable bits for components in one or more render targets. One advantage of the combined mask is that the components that are not updated are not forwarded from the pixel shader to the ROP, thereby saving bandwidth between those processing units.