Abstract: A ramp buffer circuit includes a ramp buffer input device having an input coupled to receive a ramp signal. A current monitor is circuit coupled to a power line and the ramp buffer input device to generate a current monitor signal in response to an input current conducted through the ramp buffer input device. A corner bias circuit is coupled to the current monitor circuit to generate an assist bias voltage in response to the current monitor signal. A bias current source is coupled to an output of the ramp buffer input device. An assist current source is coupled to the corner bias circuit and coupled between the output of the ramp buffer input device and ground to conduct an assist current from the output of the ramp buffer input device to ground in response to the assist bias voltage.

Abstract: A technique capable of improving linearity at a low illuminance is provided. A solid-state sensing image device includes: a pixel array including a plurality pixels arranged in a matrix form and a plurality of pixel signal lines connected to the plurality of pixels and receiving pixel signals supplied from the plurality pixels; a column-parallel A/D converting circuit connected to the plurality of pixel signal lines; and a reference-voltage generating circuit generating ramp-wave reference voltage that linearly changes in accordance with time passage. The column-parallel A/D converting circuit includes a first A/D converter, the first A/D converter includes: a first input terminal connected to the pixel signal line; a second input terminal receiving the reference voltage; and an offset generating circuit connected to the first input terminal and generating an offset voltage for the first input terminal.

Abstract: A given pixel of a pixel array includes various operation modes with each of the operation modes having a different conversion gain for the charge received from the photodetector of the pixel. When the modes are used in conjunction with one another, the dynamic range of the pixel can be increased. A readout circuit coupled to a photodetector within a given pixel includes a transfer gate between the photodetector and a gain mode select block that includes capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from the photodetector. Depending on the state(s) of the one or more switches, different operation modes with different conversion gains can be selected to increase the dynamic range of the pixel. The adaptability of the readout circuit can allow for a high dynamic range even in extreme temperature environments by lowering the dark current.

Abstract: A receiver of a display driver and an operating method of the receiver of the display driver are provided. The receiver of the display driver includes an input interface, an operational amplifier and a bias current control circuit. The input interface receives image data. The operational amplifier is coupled to the input interface and includes a bias current circuit. The bias current control circuit adjusts a bias current of the bias current circuit according to a data rate of the image data. The operating method is adapted to the receiver of the display driver.

Abstract: Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.

Abstract: In one example, an apparatus comprises: an image sensor comprising a plurality of pixel cells; a frame buffer; and a sensor compute circuit configured to: receive, from the frame buffer, a first image frame comprising first active pixels and first inactive pixels, the first active pixels being generated by a first subset of the pixel cells selected based on first programming data; perform an image-processing operation on a first subset of pixels of the first image frame, whereby a second subset of pixels of the first image frame are excluded from the image-processing operation, to generate a processing output; based on the processing output, generate second programming data; and transmit the second programming data to the image sensor to select a second subset of the pixel cells to generate second active pixels for a second image frame.

Abstract: The invention performs a processing for improving an image quality of a camera in a state where a sufficient link rate cannot be ensured. A controlling method for a camera includes an imaging sensor configured to acquire an imaging data, a signal processing unit configured to perform an image processing on the imaging data, a buffer into which data subjected to the image processing is written, and a format conversion unit configured to convert a format of data read from the buffer and transmit the data to a transmission path, wherein the controlling method includes a status prediction step of predicting a status of the buffer based on a readout rate of the imaging sensor and a link rate of the transmission path and generating a status prediction information, and an adjustment step of adjusting a content of the image processing according to the status prediction information.

Abstract: An imaging element of the present disclosure includes a first substrate on which a pixel circuit connected to a light receiving part is formed and a second substrate on which a pixel control part that controls the pixel circuit is formed, the first substrate and the second substrate being stacked. Then, the first substrate includes a first wiring formed corresponding to a first pixel row or pixel column, a second wiring formed corresponding to a second pixel row or pixel column, a first connection part that connects the first wiring and the pixel control part, a second connection part that connects the second wiring and the pixel control part, a switch part that controls connection between the first wiring and the second wiring, a first electrode connected to the first wiring via the switch part, and a second electrode connected to the second wiring via the switch part.

Abstract: According to one embodiment, a solid-state imaging device includes a plurality of pixels, a plurality of sampling switches, a plurality of sample-and-hold circuits, and a plurality of output switches. The plurality of pixels are arranged at least in a column direction. The plurality of sampling switches are configured to sample signals outputted from the pixels belonging to columns in parallel. The plurality of sample-and-hold circuits are configured to sample and hold signals outputted from the plurality of sampling switches. The plurality of output switches are configured to output signals stored in the plurality of sample-and-hold circuits at predetermined timing.

Abstract: The present disclosure relates to a solid-state imaging element and an electronic apparatus that can achieve a higher image quality. The imaging element includes a pixel having a global drive portion in which all rows are driven at a same timing and a rolling drive portion in which each row is driven at a corresponding timing, a pixel array region in which a plurality of the pixels is placed in an array, a global drive circuit configured to supply a drive signal to the global drive portion, and a rolling drive circuit configured to supply a drive signal to the rolling drive portion. Further, the global drive circuit is placed on each of at least three or more sides of four sides surrounding the pixel array region. The present technology is applicable to a stacked CMOS image sensor, for example.

Abstract: An imaging device includes a first substrate, and a second substrate stacked on the first substrate. A first connection portion and a second connection portion are between the first substrate and the second substrate. A first pixel and a second pixel each include a photoelectric converter that converts incident light into a signal charge, and a detection circuit that detects the signal charge. The first substrate includes the photoelectric converter and the detection circuit. The second substrate includes a first line, and a voltage source that is coupled to the detection circuit of the first pixel, via the first line and the first connection portion, and that is coupled to the detection circuit of the second pixel, via the first line and the second connection portion.

Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.

Abstract: The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.

Abstract: The present invention provides a method for performing optical image detection using a camera module comprising a Digital MicroMirror Device, a first point Photo Detector, a second point Photo Detector, a first lens and a second lens.

Abstract: In one example, an apparatus comprises: an image sensor comprising an array of pixel cells, each pixel cell including a photodiode and circuits to generate image data, the photodiodes formed in a first semiconductor substrate; and a controller formed in one or more second semiconductor substrates that include the circuits of the array of pixel cells, the first and second semiconductor substrates forming a stack and housed within a semiconductor package. The controller is configured to: determine whether first image data generated by the image sensor contain features of an object; based on whether the first image data contain the features of the object, generate programming signals for the image sensor; and control, based on the programming signals, the image sensor to generate second image data.

Abstract: An electronic device includes a first array of image pixels having inputs coupled to first selection tracks and outputs coupled to first output tracks, a second array of test pixels having inputs coupled to second selection tracks and outputs coupled to the first output tracks, and a third array of test pixels having inputs coupled to the first selection tracks and outputs coupled to second output tracks. A processor is coupled to receive output signals on the first and second output tracks. The output signals from the test pixels of the second and third arrays are fixed at one or the other of only two values in the absence of a defect. The output signals received by the processor over the first and second output tracks are processed to determine presence or absence of a defect.

Abstract: A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

Abstract: A method and a system for compensating an image having fixed pattern noise are provided. The method is adapted to a 4-cell sensor and can automatically calculate appropriate compensation parameters for fixed pattern noise according to non-uniformity of the sensor and lens. Since the defects in the sensor or the lens may cause non-uniform fixed pattern noise, an image is firstly divided into multiple grids and a pixel average of every channel in the grids is calculated. Afterwards, a fixed pattern noise compensation coefficient of every pixel can be calculated according to characteristics of the image formed by the 4-cell sensor. In one aspect, the compensation coefficient of the current pixel can be calculated by extrapolation or interpolation. The fixed pattern noise in the image can be corrected.

Abstract: Systems and techniques are described for imaging. An imaging system includes an image sensor with a plurality of photodetectors, grouped into a first group of photodetectors and a second group of photodetectors. The imaging system can reset its image sensor. The imaging system exposes its image sensor to light from a scene. The plurality of photodetectors convert the light into charge. The imaging system stores analog photodetector signals corresponding to the charge from each the photodetectors. The imaging system reads first digital pixel data from a first subset of the analog photodetector signals corresponding to the first group of photodetectors without reading second digital pixel data from a second subset of the analog photodetector signals corresponding to the second group of photodetectors. The imaging system generates an image of the scene using the first digital pixel data.

Abstract: A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit.

Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.

Abstract: An image sensor includes: a pixel unit including pixels configured to generate a first signal corresponding to an amount of received light, and output the first signal; an AD converter configured to convert the first signal into a digital second signal by performing AD conversion processing for the first signal, and output the second signal; a transmitter/receiver configured to transmit and receive, in a time division manner, transmission data including at least the second signal in a first period, and reception data input from an outside in a second period; and a first generator configured to generate a first clock signal synchronized with the clock edge included in the reception data. The transmitter/receiver is configured to switch between the first period and the second period every horizontal line in the pixel unit, and transmit and receive the transmission data and the reception data in a time division manner.

Abstract: An imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.

Abstract: A camera system. In some embodiments, the camera system includes a first laser, a camera, and a processing circuit connected to the first laser and to the camera. The first laser may be steerable, and the camera may include a pixel including a photodetector and a pixel circuit, the pixel circuit including a first time-measuring circuit.

Abstract: An image sensor may include an image sensor pixel array, row control circuitry, and column readout circuitry. The column readout circuitry may include analog-to-digital converter (ADC) circuitry. The ADC circuitry may have a first portion that selectively converts pixel signals associated with a low light or high conversion gain operating environment and a second portion that converts any pixel signals. As an example, the first portion may be a ramp ADC and the second portion may be a successive approximation register (SAR) ADC.

Abstract: An image sensor outputs captured image data by discriminating whether to add a result of an imaging plane phase difference AF calculation to a top of the captured image data or whether to add the result to an end of the captured image data, thus reducing a time lag between exposure and focus position movement.

Abstract: Disclosed is an image sensing device including a pixel array including a plurality of pixels arranged in rows and columns, and suitable for outputting a plurality of pixel signals, and a plurality of readout circuits coupled to the pixel array, and suitable for compensating for readout deviations among the plurality of pixel signals, based on a plurality of bias voltages having different voltage levels, when reading out the plurality of pixel signals.

Abstract: An apparatus includes a plurality of pixels, a comparator configured to compare an output signal of each of the plurality of pixels with a reference signal, and a counter of K bits (K is a natural number) configured to operate in parallel with operation of the comparator. The apparatus converts the output signal of each of the plurality of pixels into a digital signal using an output of the comparator and an output of the counter. The apparatus includes an addition unit configured to add a plurality of the digital signals. The addition unit includes a serial binary adder of M bits (M is a natural number less than K).

Abstract: An image sensing device includes a pixel array configured to include a plurality of pixel groups consecutively arranged in row and column directions. Each of the pixel groups includes a plurality of unit pixels and each unit pixel includes a photoelectric conversion element structured to generate photocharges through a conversion of incident light. Each pixel group outputs a first pixel signal corresponding to photocharges generated by a single unit pixel and a second pixel signal corresponding to a sum of photocharges generated by two or more unit pixels.

Abstract: The photoelectric conversion device includes pixels each including photoelectric converters and a floating diffusion to which charges of the photoelectric converters are transferred, a vertical scanning unit for performing readout processing and reset processing on the pixels while switching the photoelectric converter to be processed and the floating diffusion to be processed, and a control unit that controls the vertical scanning unit. The control unit includes a readout row address generation unit and a reset row address generation unit that generate a row address to be processed. A first cycle in which the photoelectric converter is switched is shorter than a second cycle in which the floating diffusion is switched, an update cycle of the row address is equal to the second cycle, and a setting unit of an update timing of the row address is equal to the length of one cycle of the first cycle.

Abstract: A photoelectric conversion apparatus and the like that enables a predetermined determination in response to the incidence of photons is provided. The photoelectric conversion apparatus comprising a pixel provided with a photoelectric conversion unit that outputs a signal in response to the incidence of a photon; and a plurality of processing units configured to correspond to the pixel, wherein the processing unit has a first counter circuit configured to count an output signal from the pixel during a predetermined time period and a first memory configured to store a count value counted by the first counter circuit as a second count value, and wherein the processing unit outputs a determination result obtained by comparing a first count value output by the first counter circuit and a predetermined threshold that has been set based on the second count value read out from the first memory.

Abstract: A conversion apparatus includes a conversion unit, a first transistor configured to receive a charge in the conversion unit at a gate thereof, a second transistor connected to the gate, a signal line configured such that a signal is output from the first transistor thereto, a third transistor provided in a path between the signal line and the first transistor, a first line configured to supply a potential for turning off the second transistor, a second line configured to supply a potential for turning off the third transistor that is a common potential also used as the potential for turning off the second transistor, and an isolator connected to the first line and the second line.

Abstract: The present technology relates to an imaging element that can reduce noise. The imaging element includes: a photoelectric conversion element; a first amplification element that amplifies a signal from the photoelectric conversion element; a second amplification element that amplifies an output from the first amplification element; an offset element provided between the first amplification element and the second amplification element; a first reset element that resets the first amplification element; and a second reset element that resets the second amplification element. The offset element is a capacitor. A charge is accumulated in the offset element via a feedback loop of an output from the second amplification element, and an offset bias is generated. The present technology can be applied to an imaging element.

Abstract: An image sensor may include an array of image pixels arranged in rows and columns. Each column of pixels may be coupled to current source transistors and capacitance cancellation circuitry. The capacitance cancellation circuitry may include capacitors, a common source amplifier transistor, an autozero switch, a switch for selectively deactivating at least one of the capacitors during sample-and-hold reset and sample-and-hold signal operations.

Abstract: To further capture an image in a solid-state image sensor that detects an address event. The solid-state image sensor includes a photoelectric conversion element, a charge accumulation unit, a transfer transistor, a detection unit, and a connection transistor. The photoelectric conversion element generates a charge by photoelectric conversion. The charge accumulation unit accumulates the charge and generates a voltage according to an amount of the charge. The transfer transistor transfers the charge from the photoelectric conversion element to the charge accumulation unit. The detection unit detects whether or not a change amount of a photocurrent according to the amount of the charge exceeds a predetermined threshold. The connection transistor connects the charge accumulation unit and the detection unit to cause the photocurrent to flow.

Abstract: An image sensor element includes a transfer transistor TX, a LOFIC select transistor LF, a photodiode PD, and a first overflow path OFP. The transfer transistor TX outputs a readout signal from a first end. The LOFIC select transistor LF includes a first end connected to a second end of the transfer transistor TX, and a second end connected to a capacitor. The photodiode PD is connected in common to a third end of the transfer transistor and a third end of the LOFIC select transistor LF. The first overflow path OFP is formed between the photodiode PD and a second end of the LOFIC select transistor LF. Each of the transfer transistor TX and the LOFIC select transistor LF is configured with a vertical gate transistor.

Abstract: A technique is presented for quantizing pixels of an image using Sigma Delta quantization. In one aspect, pixel values for an image are segmented into columns of pixel values; and for each column in the matrix, pixel values of a given column are quantized using sigma delta modulation. The pixel values in a given column are preferably quantized as a whole, thereby minimizing accumulated quantization error from a starting pixel value in the given column to a current pixel value in the given column. In another aspect, the pixels of an image are quantized using a 2D generalization of Sigma Delta modulation.

Abstract: An imaging device according to an embodiment of the present disclosure includes a pixel array including a plurality of pixels, a scanning control section that controls scanning of the plurality of pixels, and a readout control section that controls reading of the plurality of pixels. The imaging device further includes a first waveform generation part that generates a plurality of control signals for controlling of at least one of the scanning control section or the readout control section, a second waveform generation part that generates a plurality of reference signals, and a failure detection section that detects a failure of the first waveform generation part or the second waveform generation part on a basis of comparison between the plurality of control signals and the plurality of reference signals.

Abstract: There is provided a pixel circuit capable of outputting time difference data or image data, and including a first temporal circuit and a second temporal circuit. The first temporal circuit is used to store detected light energy of a first interval and a second interval as the time difference data. The second temporal circuit is used to store detected light energy of the second interval as the image data. The pixel circuit is used to output a pulse width signal corresponding to the time difference data or the image data in different operating modes.

Abstract: An image sensor is provided to include an active region which comprises: a floating diffusion region; a transfer transistor gate region; transistor active regions; and a well-tap region. The transfer transistor gate region may have a diagonal bar shape to isolate the floating diffusion region in a first corner of the active region. The well-tap region may be positioned between the transfer transistor gate region and the transistor active regions, and isolate the transfer transistor gate region from the transistor active regions.

Abstract: To suppress entrance of incident light into a charge holding section in a pixel to prevent a reduction in image quality. An imaging device includes a pixel array. The pixel array includes a plurality of pixels each including a photoelectric converter that generates a charge depending on incident light, a charge holding section that holds the generated charge, and a charge transfer section that transfers the generated charge to the charge holding section, each of the plurality of pixels generating an image signal depending on the held charge. The charge holding section or the charge transfer section in each of the plurality of pixels is arranged close to an optical center of the pixel array with respect to the incident light.

Abstract: In a solid-state imaging element in which AD conversion using a reference signal is performed, power consumption of a circuit that generates the reference signal is reduced. A pixel section outputs a pixel signal based on the light amount of incident light. A reference signal supply section generates a first reference signal and a second reference signal. A comparison section includes a first differential pair transistor to which the pixel signal and a signal based on the first reference signal are inputted and a second differential pair transistor to which the second reference signal is inputted. A counter section performs counting on the basis of a signal from the comparison section.

Abstract: An image sensor includes: a first and a second pixel, each of which includes a first photoelectric conversion unit that photoelectrically converts light that has passed through a micro lens and generates a first charge, a second photoelectric conversion unit that photoelectrically converts light that has passed through the micro lens and generates a second charge, an accumulation unit that accumulates at least one of the first charge and the second charge, a first transfer unit that transfers the first charge to the accumulation unit, and a second transfer unit that transfers the second charge to the accumulation unit; and a control unit that outputs, to the first transfer unit of the first pixel and to the second transfer unit of the second pixel, a signal that causes the first charge of the first pixel and the second charge of the second pixel to be transferred to their accumulation units.

Abstract: There is provided a pixel circuit for performing analog operation including a photodiode, a first temporal circuit, a second temporal circuit and an operation circuit. Within a first interval, the photodiode detects first light energy to be stored in the first temporal circuit. Within a second interval, the photodiode detects second light energy to be stored in the second temporal circuit. Within an operation interval, the first temporal circuit outputs a first detection signal having a first pulse width according to the first light energy and outputs a second detection signal having a second pulse width according to the second light energy for being calculated by the operation circuit.

Abstract: An image sensing device includes a photoelectric conversion element configured to generate photocharges in response to incident light, a floating diffusion configured to temporarily store the photocharges generated by the photoelectric conversion element, and a transfer gate configured to transmit the photocharges generated by the photoelectric conversion element to the floating diffusion region. The transfer gate includes a main transfer gate disposed to overlap a center section of the photoelectric conversion element and configured to operate in response to a first transmission signal, and a sub transfer gate disposed to overlap a boundary region of the photoelectric conversion element and configured to operate in response to a second potential level different from the first potential level.

Abstract: A photoelectric conversion apparatus includes a second substrate including a signal processing circuit configured to perform signal processing using machine learning on a signal output from the first substrate. The second substrate is disposed on the first substrate in a multilayer structure. The signal processing circuit is so disposed to overlap with a pixel array but not overlap with a light-shielded pixel area as seen in a plan view.

Abstract: Provided is a solid-state imaging device, including a first electrode formed on a semiconductor layer, a photoelectric conversion layer formed on the first electrode, a second electrode formed on the photoelectric conversion layer, and a third electrode disposed between the first electrode and an adjacent first electrode, and electrically insulated. A voltage of the third electrode is controlled to a voltage corresponding to a detection result which can contribute to control of discharge of charges or assist for transfer of charges. The detection results corresponds to one of light or temperature and the voltage of third electrode is controlled according to an output of a frame image obtained before exposure.

Abstract: An imaging apparatus includes: an imaging unit that has a pixel region in which a plurality of pixels is arranged and reads and outputs a pixel signal from the pixels included in the pixel region; a unit-of-readout controller that controls a unit of readout set as a part of the pixel region; a first unit-of-readout setting unit that sets a first unit of readout that is used for reading out the pixel signal from the pixel region for a recognition process that has learned training data for each of the units of readout; a second unit-of-readout setting unit that sets a second unit of readout that is used for reading out the pixel signal from the pixel region so as to output the pixel signal to a subsequent stage; and a mediation unit that performs mediation between the first unit of readout and the second unit of readout.

Abstract: An imaging apparatus is provided in which signals from a plurality of pixels are output to signal output lines during a predetermined reading period, a first reading mode and a second reading mode where analog-to-digital (AD) conversion circuits perform AD conversion on the signals are included, and the reading period includes a first period from when the signals from the pixels are output to the signal output lines to when the AD conversion circuits start AD conversion on the signals a predetermined time later, and a second period where the AD conversion circuits perform the AD conversion on the signals from the pixels, the reading period is equal between the first and second reading modes, and lengths of the first and second periods are different from each other.

Abstract: A photoelectric conversion apparatus that includes a pixel region having photoelectric conversion elements includes a semiconductor layer having first and second surfaces, and the photoelectric conversion elements are disposed between the first and second surfaces. With a virtual plane extending along the second surface between the first and second surfaces being a third plane, the pixel region includes an element isolating portion constituted by an insulator disposed closer to the first surface than the third plane, and first and second isolating portions constituted by grooves provided in the semiconductor layer to pass through the third plane. The first isolating portion overlaps the element isolating portion in a normal direction to the third plane. An end of the second isolating portion on a side on the first surface is closer to the second surface than an end of the first isolating portion on a side on the first surface is.