Abstract: Disclosed are devices, systems and methods for capturing an image. In one aspect an electronic camera apparatus includes an image sensor with a plurality of pixel regions. The apparatus further includes an exposure controller. The exposure controller determines, for each of the plurality of pixel regions, a corresponding exposure duration and a corresponding exposure start time. Each pixel region begins to integrate incident light starting at the corresponding exposure start time and continues to integrate light for the corresponding exposure duration. In some example embodiments, at least two of the corresponding exposure durations or at least two of the corresponding exposure start times are different in the image.

Abstract: An image-capturing device includes: a plurality of pixels, having a plurality of first electrodes provided upon one surface of a light reception unit that receives incident light, and a plurality of second electrodes provided upon another surface of the light reception unit; and an output unit that outputs a signal generated by the light reception unit upon receipt of the incident light, the light reception unit being sandwiched between the first electrodes, to which a voltage is applied, and the second electrodes.

Abstract: Devices and methods of their fabrication for pixels or displays are disclosed. Pixels and displays having redundant subpixels are described. Subpixels are initially isolated by an unprogrammed antifuse. A subpixel is connected to the display by programming the antifuse, electrically connecting it to the pixel or display. Defective subpixels can be determined by photoluminescent testing or electroluminescent testing, or both. A redundant subpixel can replace a defective subpixel before pixel or display fabrication is complete.

Abstract: An electronic apparatus includes: an input unit that inputs data for imaging conditions for each of a plurality of imaging regions included in an image capturing unit, different imaging conditions being set for each of the imaging regions; and a recording control unit that correlates the data for imaging conditions inputted from the input unit with the imaging regions and records correlated data in a recording unit.

Abstract: The present disclosure relates to an imaging device, a driving method, and an electronic apparatus that can capture an image with a higher dynamic range. The imaging device includes a pixel region in which pixels are arranged, the pixels each including a photoelectric conversion unit that converts incident light into electric charges through electric conversion and stores the electric charges, and two or more charge storage units that store the electric charges transferred from the photoelectric conversion unit; and a drive unit that drives the pixels. The drive unit drives each pixel to cause the photoelectric conversion unit to repeatedly transfer electric charges with different exposure times to the two or more charge storage units during the light reception period of one frame. The present technology can be applied to an imaging device capable of capturing an HDR image, for example.

Abstract: Provided is an image processing apparatus including: a wide dynamic range (WDR) image sensor configured to output image frames by photographing a subject with different shutter times; and at least one processor to implement: a wide image synthesis unit configured to synthesize a WDR image based on n subchannels included in each of the image frames; a knee curve generating unit configured to generate an integral histogram of luminance levels of m×n subchannels included m image frames among the image frames, and generate a knee curve based on the integral histogram, where m and n each is an integer greater than zero; and a dynamic range transforming unit configured to reduce a dynamic range of the WDR image based on the generated knee curve.

Abstract: An image sensor includes a photoelectric conversion unit that photoelectrically converts incident light to generate an electric charge; and an AD conversion unit having a comparison unit that compares a signal caused by an electric charge generated by the photoelectric conversion unit with a reference signal, a first storage unit in a first circuit layer, the first storage unit storing a first signal based on a signal output from the comparison unit, and a second storage unit in a second circuit layer that is stacked on the first circuit layer, the second storage unit storing a second signal based on the signal output from the comparison unit.

Abstract: An imaging device including: pixel cells arranged in a matrix having rows and columns, the pixel cells including first pixel cells and different second pixel cells, each of the pixel cells having: a photoelectric converter that converts incident light into signal charge, a first transistor having a first gate, a first source and a first drain, the first gate coupled to the photoelectric converter, and a second transistor having a second gate, a second source and a second drain, either the first source or the first drain electrically coupled to the photoelectric converter via the second transistor. The imaging device further including a first line coupled to one of the first source and the first drain of each of the first pixel cells; and a second line coupled to one of the first source and the first drain of each of the second pixel cells.

Abstract: An image pickup device which suppresses an increase in chip area of peripheral circuits without degrading the performance of a pixel section and makes it possible to prevent costs from being increased. The image pickup device includes a first semiconductor substrate and a second semiconductor substrate. A pixel section includes photo diodes each for generate electric charges by photoelectric conversion, floating diffusions each for temporarily storing the electric charges generated by the photo diode, and amplifiers each connected to the floating diffusion, for outputting a signal dependent on a potential of the associated floating diffusion. Column circuits are connected to vertical signal lines, respectively, for performing predetermined processing on signals output from the pixel section to vertical signal lines.

Abstract: A method includes bonding a Backside Illumination (BSI) image sensor chip to a device chip, forming a first via in the BSI image sensor chip to connect to a first integrated circuit device in the BSI image sensor chip, forming a second via penetrating through the BSI image sensor chip to connect to a second integrated circuit device in the device chip, and forming a metal pad to connect the first via to the second via.

Abstract: A pixel circuit including a photodiode, a first storage capacitor and a second storage capacitor is provided. The first storage capacitor discharges to a first output voltage in a first exposure time and to a third output voltage in a third exposure time. The second storage capacitor discharges to a second output voltage in a second exposure time and to a fourth output voltage in a fourth exposure time. The first and second exposure times are included in a first frame period. The third and fourth exposure times are included in a second frame period. The second frame period is a next frame period of the first frame period. In the first frame period, the first exposure time is subsequent to the second exposure time. In the second frame period, the third exposure time is prior to the fourth exposure time.

Abstract: A test display panel is configured for application to a lighting test, and includes a plurality of reference voltage input terminals and a plurality of sub-pixels. The reference voltage input terminals are in a one-to-one correspondence to the sub-pixels. The display panel further includes a reference voltage supply circuit and a plurality of reference voltage lines. The sub-pixels include a plurality of first sub-pixels, second sub-pixels, and third sub-pixels having different colors. The reference voltage lines include a first reference voltage line, a second reference voltage line, and a third reference voltage line, each corresponding to respective sub-pixels. The reference voltage supply circuit is configured to provide reference voltages to the plurality of reference voltage lines in a time division manner. The reference voltage lines are electrically coupled to respective reference voltage input terminals of the sub-pixels.

Abstract: The present technology relates to a memory device that generates various signals used in a read training operation and a method of operating the memory device. The memory device according to an embodiment of the present disclosure includes an address counter configured to generate a plurality of count signals based on a read training enable signal and a first clock signal received from a memory controller, and an address section identification signal generator configured to generate address section identification signals used in identifying a plurality of address sections based on at least one of the plurality of count signals.

Abstract: In an x-ray imaging method, the acquisition of a signal image is split off into acquisition of two or more subimages or frames. The first subimage may be acquired with an exposure of a low dose followed by a readout cycle. The dose of the exposure for acquiring the first subimage can be chosen such that it is below the default dose for a particular anatomy. The first subimage may be used to calculate or estimate the parameters of exposure for acquiring a second or subsequent images subimage. The estimation may be such that the total dose received by the imager, in acquiring the first and second subimages, achieves an expected target value to provide an image of good quality. The first and second subimages can be combined to form the final image. A detector array supporting automatic exposure control (AEC) includes AEC pixels providing AEC signals. The AEC pixels are independently or individually addressable and/or readable.

Abstract: A radiation imaging apparatus is provided. Each pixel includes a signal generation unit configured to generate a pixel signal, a reset unit configured to cause the signal generation unit to generate an offset signal by resetting the signal generation unit to a state before the accumulation of charges, and a holding unit. The apparatus comprises a control unit configured to control each pixel to generate the pixel signal and the offset signal in every frame period and hold the pixel signal and the offset signal in the holding unit; and a readout unit configured to read out, from the holding unit, the offset signal generated in a frame period and the pixel signal generated in accordance with charges accumulated subsequently to the generation of the offset signal, and calculate a difference between the readout offset signal and pixel signal.

Abstract: An image sensor package includes an image sensor chip on a package substrate, a logic chip on the package substrate and perpendicularly overlapping the image sensor chip, and a memory chip on the package substrate and perpendicularly overlapping the image sensor chip and logic chip. The logic chip processes a pixel signal output from the image sensor chip. The memory chip is electrically connected to the image sensor chip through a conductive wire and stores at least one of the pixel signal from the image sensor chip or a pixel signal processed by the logic chip. The memory chip receives the pixel signal output from the image sensor chip through the conductive wire and receives the pixel signal processed by the logic chip through the image sensor chip and the conductive wire.

Abstract: A system and method for determining the current of a pixel circuit and an organic light emitting diode (OLED). The pixel circuit is connected to a source driver by a data line. The voltage (or current) supplied to the pixel circuit by the source driver. The current of the pixel and the OLED can be measured by a readout circuit. A value of a voltage from the measured current can be extracted and provided to a processor for further processing.

Abstract: An imaging device includes pixels each including a photoelectric conversion unit and a charge holding unit and a control unit that performs first control, which causes the pixels to perform an operation that includes an exposure operation of the photoelectric conversion unit, a reset operation of the charge holding unit, and a charge transfer operation from the photoelectric conversion unit to the charge holding unit and updates charges held by the charge holding unit by the reset and charge transfer operations, and second control to read out a signal based on charges held by the charge holding unit from each of the pixels. The control unit repeats the first control at a predetermined cycle without inserting the second control in a first period before a trigger signal is externally input and changes the first control to the second control when the trigger signal is externally input after the first period.

Abstract: The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.

Abstract: There is provided in one embodiment an apparatus having an image sensor array. In one embodiment, the image sensor array can include monochrome pixels and color sensitive pixels. The monochrome pixels can be pixels without wavelength selective color filter elements. The color sensitive pixels can include wavelength selective color filter elements.

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: A display method includes capturing, by an imaging sensor, a still image lit up by a transmitter that transmits a signal by luminance change of light as a subject to obtain a first captured image with a first exposure time. The still image is captured to obtain a second captured image with a second exposure time which is longer than the first exposure time. The display method further includes decoding the signal form the first captured image, and determining whether identification information included in each of a plurality of sets is identical to the decoded signal. Further, the method also includes reading the video included in each of the sets with the identification information identical to the decoded signal, and superimposing the video on a target region corresponding to the subject in the second captured image for display on a display.

Abstract: A photoelectric conversion apparatus according to an exemplary embodiment includes a plurality of pixels each including a photoelectric conversion unit, a transistor configured to process a signal charge generated in the photoelectric conversion unit, and an analog-to-digital conversion circuit. The apparatus further includes a first semiconductor substrate on which the photoelectric conversion units and the transistors of the plurality of pixels are two-dimensionally arranged, a second semiconductor substrate on which a plurality of circuit blocks is two-dimensionally arranged, a bonding portion configured to electrically connect the first semiconductor substrate and the second semiconductor substrate, and a wiring arranged between the first semiconductor substrate and the bonding portion. The wiring is connected to the transistors of the plurality of pixels and configured to supply a control signal to the transistors of the plurality of pixels.

Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.

Abstract: A solid-state imaging element including pixel signal read lines, and a pixel signal reading unit for reading pixel signals from a pixel unit via the pixel signal read line. The pixel unit includes a plurality of pixels arranged in a matrix form, each pixel including a photoelectric conversion element. In the pixel unit, a shared pixel in which an output node is shared among a plurality of pixels is formed, and a pixel signal of each pixel in the shared pixel is capable of being selectively output from the shared output node to a corresponding one of the pixel signal read lines. The pixel signal reading unit sets a bias voltage for a load element which is connected to the pixel signal read line and in which current dependent on a bias voltage flows in the load element, to a voltage causing a current value to be higher than current upon a reference bias voltage when there is no difference between added charge amounts, when addition of pixel signals of the respective pixels in the shared pixel is driven.

Abstract: Included are an integration circuit unit integrating a difference between a value of an analog input signal and a feedback value, a quantization circuit unit converting an output of the integration circuit unit into a digital value, a first current-steering digital-analog converting unit generating the feedback value in accordance with an output of the quantization circuit unit, and a second current-steering digital-analog converting unit differing from the first current-steering digital-analog converting unit. Also, an output terminal of the first current-steering digital-analog converting unit or an output terminal of the second current-steering digital-analog converting unit is connected to an input terminal of the integration circuit unit.

Abstract: Image sensors may include pixel circuitry to enable per-pixel integration time and read-out control. Two transistors may be coupled in series for per-pixel control, with one of the transistors being controlled on a row-by-row basis and the other transistor being controlled on a column-by-column basis. The two transistors in series may be coupled directly to each other without any intervening structures. Two transistors in series between a photodiode and a power supply terminal enables per-pixel control of starting an integration time, two transistors in series between a photodiode and a charge storage region enables per-pixel control of ending an integration time, and two transistors in series between a charge storage region and a floating diffusion region enables per-pixel control of read-out.

Abstract: Examples of a pixel cell are disclosed. In one example, a pixel cell may include a first semiconductor layer including a photodiode and one or more transistor devices configured to convert charges generated by the photodiode into an analog signal. The pixel cell may also include a second semiconductor layer including one or more transistor devices configured to convert the analog signal to one or more digital signals. The first semiconductor layer and the second semiconductor layer may form a stack structure. In another example, a pixel cell may include a photodiode and a capacitor. The pixel cell may be operated, in a first mode of measurement, to measure the charges stored at the capacitor when the capacitor is electrically coupled with the photodiode, and in a second mode of measurement, to measure the charges stored at the capacitor when the capacitor is electrically isolated from the photodiode.

Abstract: A signal processing method and a signal processing system are provided to convert optical or electric signals by an effective circuit to have an increased dynamic contrast and reduced noises. The signal processing system includes an analog signal processing module and a digital signal processing module. When an optical signal of an object-to-be-detected is strong, an image-to-be-detected is obtained by an analog signal processing method. When the optical signal of the object-to-be-detected is weak, the image-to-be-detected is obtained by a digital signal processing method after background noises are filtered out.

Abstract: An optical camera system includes a first lens driving mechanism, a second lens driving mechanism, and a casing. The first lens driving mechanism includes a first outer frame and a first driving assembly. The first driving assembly is configured to drive a first optical component to move relative to the first outer frame. The second lens driving mechanism includes a second outer frame and a second driving assembly. The second driving assembly is configured to drive a second optical component to move relative to the second outer frame. The casing has at least three side walls perpendicular to each other, at least two side walls of the first outer frame face two side walls of the casing, and at least two side walls of the second outer frame face two side walls of the casing.

Abstract: An image sensor pixel may include a photodiode that generates first charge for a first frame and second charge for a second frame, first and second storage gates coupled to the photodiode, a floating diffusion coupled to the first storage gate through a first transistor, a second transistor coupled to the second storage gate, and a capacitor coupled to the floating diffusion through a third transistor. The image sensor pixel may output image signals associated with the first charge generated by the photodiode for the first image frame while the photodiode concurrently generates the second charge for the second image frame. The second storage gate may be used to store overflow charge. Overflow charge for the second frame may be stored at the second storage gate while image signals associated with the first image frame are read out from capacitor and the floating diffusion.

Abstract: The present disclosure relates to a signal processing apparatus and method, an imaging element, and an electronic apparatus capable of suppressing an increase in area. The present disclosure divides a predetermined current generated by receiving a gain control signal that controls a gain into a plurality of output currents and a non-output current in accordance with a value of an input digital signal and outputs the plurality of output currents as a plurality of analog signals. The present technology can be applied to for example, electronic circuits such as a D/A converter circuit and an A/D converter circuit, imaging elements such as a CMOS image sensor, electronic apparatuses such as a digital still camera, and the like.

Abstract: An imaging apparatus is provided and is configured in such a manner that a plurality of first pixels are connected to a first AD conversion unit, and a plurality of second pixels are connected to a second AD conversion unit whereby the imaging apparatus has a beneficial connection relationship between the pixels and the AD conversion units.

Abstract: In one example, an apparatus comprises: a semiconductor substrate including a front side surface, a first photodiode to generate a first charge, a second photodiode to generate a second charge, a barrier layer between the first photodiode and the second photodiode and configured to control flow of the second charge from the second photodiode to the first photodiode, and a drain region to store the first charge and at least a first part of the second charge. The apparatus further comprises a gate on the front side surface over a first channel region between the first photodiode and the drain region to control the flow of the first charge and the at least the first part of the second charge to the drain region, and a second channel region to conduct at least a second part of the second charge away from the barrier layer when the second photodiode saturates.

Abstract: An image sensor may include an array of imaging pixels and readout circuitry. Testing circuitry may be interposed between the imaging pixels and the readout circuitry. The testing circuitry may include first and second test rows that provide first and second respective test voltages. In a testing mode, the first test voltage may be provided to approximately half of the readout circuitry and the second the second test voltage may be provided to the remaining half of the readout circuitry. In an imaging mode, the readout circuitry may be coupled to column output lines and read out signals from the array of imaging pixels. The components that receive different test voltages may be arranged in an alternating or checkerboard pattern to ensure testing of scenarios with coupling between adjacent components.

Abstract: A solid-state imaging element includes a first electrode including a plurality of electrodes, a second electrode opposed to the first electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode. The first electrode has, at least in a portion, an overlap section where the plurality of electrodes overlap each other with a first insulation layer interposed therebetween.

Abstract: Provided is an image acquisition apparatus based on an industrial digital camera matrix, comprising a first substrate and a second substrate arranged in parallel. The first substrate is provided with a lens matrix, and axes of various lenses in the lens matrix are respectively perpendicular to a plane where the first substrate is located; and a surface, towards the first substrate, of the second substrate is provided with a photosensitive element matrix, and various photosensitive elements in the photosensitive element matrix are arranged in one-to-one correspondence with the various lenses.

Abstract: An image sensor is proposed to have a stack with at least a pixel array tier and a control logic tier. The pixel array tier comprises an array of pixels which are arranged into pixel columns n, each pixel column n comprising a number of N sub-columns: Each sub-column is denoted by N(n,i) with 1?i?N. The control logic tier comprises an array of analog-to-digital-converters which are arranged into ADC columns m, wherein each analog-to-digital converter comprises a number of M stages. Each stage is denoted by M(m,j) with 1?j?M, Furthermore, each respective sub-column N(n,i) is electrically connected to a dedicated stage M(m,j=i) and the stages M(m,j) are electrically interconnected to form the analog-to-digital converters, respectively. The control logic tier is arranged to sequentially read out the sub-columns N(n,i), wherein the stages M(m,j=i) dedicated to the sub-columns N(n,i) are arranged as input stages to sequentially receive signal levels of the pixels in the sub-columns N(n,i), respectively.

Abstract: An image sensor includes: a plurality of pixels each having a photoelectric conversion unit that converts incident light into an electric charge, the incident light being incident from one side of a substrate, and an output unit that outputs a signal caused by the electric charge, the plurality of pixels being arranged in a first direction and a second direction intersecting the first direction; and an accumulation unit provided to be stacked on the photoelectric conversion unit on a side opposite to the one side of the substrate, the accumulation unit accumulating the signal.

Abstract: An image sensor includes: a pixel substrate that includes a plurality of pixels each having a photoelectric conversion unit that generates an electric charge through photoelectric conversion executed on light having entered therein and an output unit that generates a signal based upon the electric charge and outputs the signal; and an arithmetic operation substrate that is laminated on the pixel substrate and includes an operation unit that generates a corrected signal by using a reset signal generated after the electric charge in the output unit is reset and a photoelectric conversion signal generated based upon an electric charge generated in the photoelectric conversion unit and executes an arithmetic operation by using corrected signals each generated in correspondence to one of the pixels.

Abstract: An image sensor may include an array of pixels arranged in rows and columns. Row control circuitry may be coupled to the array of pixels to reset, control charge transfer, and read out operations. Pixel access circuitry in processing circuitry may provide control signals to row control circuitry to access the array of pixels using multiple pixel access settings. In particular, by using multiple pixel access setting, the array of pixels may successively and efficiently generate image frames of different types.

Abstract: An FSI image sensor device structure is provided. The FSI image sensor device structure includes a pixel region formed in a substrate and a storage region formed in the substrate and adjacent to the pixel region. The FSI image sensor device structure further includes a first gate structure formed over the storage region and a metal shield structure formed over the first gate structure. The FSI image sensor device structure further includes a conductive structure formed adjacent to the first gate structure. In addition, the conductive structure is electrically connected to the metal shield structure through a via.

Abstract: A method for forming a semiconductor image sensor includes: providing a first substrate including a first front side and a first back side opposite to the first front side, and the first substrate including a plurality of first sensing devices; bonding the first substrate to a second substrate including a second front side and a second back side opposite to the second front side with the first front side of the first substrate facing the second front side of the second substrate; disposing an insulating structure over the first back side of the first substrate, wherein the insulating structure includes a plurality of dielectric grating patterns; and bonding the first substrate to a third substrate including a third front side and a third back opposite to the third front side, and the third substrate including a plurality of second sensing devices.

Abstract: A method includes polishing a semiconductor substrate of a first die to reveal first through-vias that extend into the semiconductor substrate, forming a dielectric layer on the semiconductor substrate, and forming a plurality of bond pads in the dielectric layer. The plurality of bond pads include active bond pads and dummy bond pads. The active bond pads are electrically coupled to the first through-vias. The first die is bonded to a second die, and both of the active bond pads and the dummy bond pads are bonded to corresponding bond pads in the second die.

Abstract: Reducing power consumption without reducing the number of pixel signals in a solid-state imaging element that performs AD conversion of a pixel signal. A pixel array unit includes a plurality of lines each having a plurality of pixels arranged in a predetermined direction. A scanning circuit sequentially selects the plurality of lines and then controls to output an analog signal from each of the pixels within the selected line in a non-addition mode, and simultaneously selects the plurality of lines and controls to add up the analog signals of each of the pixels arranged in a direction perpendicular to the predetermined direction and output the added signals in a pixel addition mode. The analog-to-digital conversion unit converts each of the analog signals into a digital signal. The control unit performs control of switching from one of the pixel addition mode and the non-addition mode to the other on the basis of the digital signal.

Abstract: A sample and hold system, for capturing and reading a sequence of traces of an input signal. The sample and hold system comprising a readout device, a controller, and a sample and hold array of unit cells. The controller is configured for controlling the sample and hold system, such that during an acquisition phase a trace of samples is taken from the input signal in an original sample order and such that the samples are held in the unit cells wherein the samples are assigned to the unit cells in an acquisition order, such that during a consecutive readout phase the samples are read out from the unit cells wherein the order in which the unit cells are read out corresponds with a readout order, and such that the acquisition order and/or the readout order differs from trace to trace.

Abstract: An image sensor includes a sensor layer and at least one metal layer. The sensor layer includes a plurality of sensing elements arranged as a 2-dimensional array along a first direction and a second direction. Each of the at least one metal layer includes a plurality of metal wires configured to form a plurality of apertures for passing lights to the plurality of sensing elements. At least one of the plurality of metal wires forming the plurality of apertures is disposed along a third direction different from the first direction and the second direction.

Abstract: An apparatus takes data read out in parallel from m rows (2?m<M) of a region, of an image sensor having M×N pixels, and stores n columns' worth (2?n<N) of the read-out data in first memory. The apparatus stores the M×N pixels' worth of data in second memory by storing m×n pixels' worth of data in units of o×p pixels (2?o<m, 2?p?n), and transfers the M×N pixels' worth of data, to third memory in the units of o×p pixels. The apparatus outputs the data stored in the third memory one row at a time so that the data are arranged in the original order.

Abstract: Provided is an electronic device including a ramp signal generation circuit configured to generate a ramp signal having a second slope that is greater by a first level than a first slope which corresponds to an analog gain, and a slope correction circuit configured to correct the second slope of the ramp signal by the first level to obtain the first slope.

Abstract: A solid state imaging device as an embodiment has a first transfer unit that includes a first gate and transfers charges from a photoelectric conversion portion to a holding portion; a second transfer unit that includes a second gate and transfers charges from the holding portion to a floating diffusion portion; and a third transfer unit that includes a third gate and drains charges from the photoelectric conversion portion to the charge draining portion. The impurity concentration of a second conductivity type in at least a part of a region under the first gate of the first transfer unit is lower than the impurity concentration of the second conductivity type in a region under the second gate of the second transfer unit and the impurity concentration of the second conductivity type in a region under the third gate of the third transfer unit.