Abstract: This invention is to provide a solid-state image pickup element including a sensor unit including a plurality of lines of photoelectric conversion units for generating charges from received light by photoelectric conversion, a memory unit including a plurality of lines of storage units for storing signals from the plurality of lines of photoelectric conversion units, a transfer unit for transferring a signal from the sensor unit to the memory unit, a control unit for causing storage units of an arbitrary block in the memory unit to output an image signal from the photoelectric conversion units and causing the photoelectric conversion units corresponding to the storage units of the arbitrary block to output a noise signal, and a subtracting unit for calculating a difference between the image signal and the noise signal.

Abstract: A digital camera including a CCD imager and a complementary color filter mounted on a light receiving surface thereof. The complementary color filter has color blocks each having 8 rows×4 columns while the CCD imager has, at its light receiving surface, pixel blocks corresponding to those color blocks. The color block is assigned in its each row, with all the kinds of color components, i.e., G, Mg, Ye and Cy, at least one in number per kind. A timing generator reads, from respective columns, pixel signals including all the kinds, of color components at least one in number per kind. A timing generator reads from respective rows pixel signals including all tile kinds of color components at least one in number per kind, and transfers the read pixel signals in vertical direction. The timing generator also transfers the pixel signals in a horizontal direction each time vertical transfer by 8 rows has been completed.

Abstract: A video camera that generates an interlaced video signal by mixed-line-pair readout from a solid-state image sensor also operates in a still-picture mode, in which even lines and odd lines of sensor elements are read out separately, without being mixed. The image information read from the image sensor in the still-picture mode is stored in a memory, then read twice to generate two fields. The image information from the even lines is combined with the image information from the odd lines in one way in the first field, and in another way in the second field. The two fields form one frame, yielding a still picture with full vertical resolution.

Abstract: Images in a plurality of related images are processed such that a specific region of the image in the first frame is designated and a specific image in the specific region is modified while at the same time the information about the image characteristic quantity of the specific region and what was modified about the specific image are both stored. In the processing of the images in the second and subsequent frames, a similar region that is similar in the image characteristic quantity to the initial specific image is extracted and subjected to the same image modification as has been performed on the specific region of said first frame. Therefore, highly amusing images that have been finished to satisfy the customer's request and other needs can be obtained by simple and efficient operations; as a result, prints of high quality that reproduce such images can be produced in high yield.

Abstract: A solid-state image pickup apparatus includes a timing signal feeding section for outputting signals assigned to a preliminary pickup mode as well as signals assigned to an actual pickup mode that follows the preliminary pickup mode. In the preliminary pickup mode, signal charges read out of photodiodes are mixed and read out via a horizontal transfer path as if they were reduced in the horizontal direction, thereby increasing a substantial transfer rate. A signal processor includes a preliminary pickup processing circuit. The preliminary pickup processing circuit performs calculations with digital data derived from the mixed signal charges. As a result, the representative primary colors R (red), G (green) and B (blue) of a plurality of signal charges are produced from the mixed, reduced signals by approximation or within a preselected horizontal range. A luminance signal and chrominance signals are then produced from the above colors R, G and B.

Abstract: A programmable two-dimensional timing generator according to the invention employs a clock generator (102) and a user-defined two-stage waveform generator (106, 108). A single static random access memory (SRAM) (112) stores a user-defined waveform control word for both waveform generator control units. The SRAM data is entered via the host controller external data bus. A single waveform control word may be used to control both waveform generators.

Abstract: There is provided a method of driving a solid-state image sensor, including the steps of transferring signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in at least two pixel lines so that a trailing edge of a first pulse to be applied in a first pixel line corresponds with a leading edge of a second pulse to be applied in a second pixel line, transferring the signal charges from the vertical CCDs to a horizontal CCD, and outputting the signal charges from horizontal CCD to an external circuit. The method makes it possible to prevent an increase in a substrate voltage at which charges are reversely transferred to photodiodes, which increase is caused by simultaneously applying pulses to all signal readers.

Abstract: A digital camera includes a CCD imager mounted at a front with a primary color filter. An optimal shutter speed is calculated based on a camera signal outputted from the CCD imager upon a pre-exposure. Where a calculated optimal shutter speed is low, a timing generator drives the CCD imager by a pixel-mixing scheme. Charges are first read out of part of the light receiving elements and transferred in a vertical direction. When the charges are transferred by a predetermined distance, the remaining part of the light receiving elements are read out. As a result of this, the charges of a same color of color components are mixed together. That is, a filtering process is effected within the CCD imager to remove aliasing components.

Abstract: The present invention relates to an image recording device (10), comprising: an image section (11) with a number of picture elements (pixels) arranged in rows and columns; a storage section (12) with image storage elements arranged in rows and columns for (temporarily) at least partially storing charge absorbed by the pixels, wherein the charge is transferred to the storage elements; wherein one or more gates close to the transition (13) between the image section and the storage section are lengthened.

Abstract: Subsampling of data is performed at a high subsampling rate in an image sensing device such as a CCD. Signal lines for applying transfer pulses to transfer gates in the device are connected so as to apply gate pulses simultaneously to transfer gates for photodiodes of (n+1)th, (n+5)th and (n+13)th rows, apply gate pulses simultaneously to transfer gates for photodiodes of an (n+2)th row, apply gate pulses simultaneously to transfer gates for photodiodes of (n+3)th, (n+7)th, (n+11)th and (n+15)th rows, apply gate pulses simultaneously to transfer gates for photodiodes of (n+4)th, (n+8)th, (n+12)th and (n+16)th rows, apply gate pulses simultaneously to transfer gates for photodiodes of (n+6)th, (n+10)th and (n+14)th rows, and apply gate pulses simultaneously to transfer gates for photodiodes of an (n+9)th row.

Abstract: A charge coupled imaging device includes a matrix of elements for converting an image projected onto the matrix into a frame of charge packets, along with a system of vertical charge transport channels (3) and a horizontal read-out register (C). A structure is provided for dumping unnecessary lines into a removal region in a certain operating mode. These lines are dumped at the transition between the imaging section and the memory section. The imaging device includes an imaging section (A) and a separate memory section (B) as well as a removal region (12) situated below the matrix as an anti-blooming provision. Unnecessary lines may be dumped, for example, into the substrate in that the transport in the imaging section is continued during frame transport while at the same time the transport in the memory section is stopped.

Abstract: In an image pickup apparatus comprising a CCD image pickup device made up of a plurality of pixels constituted by photodiodes which are two-dimensionally arrayed, a vertical register and a horizontal register, and a CPU for driving and controlling the CCD image pickup device, the CPU has a driving function in an all-pixel read mode for reading pixel signals from all the pixels of the CCD image pickup device, a driving function in a thinning (skipping) read mode for reading pixel signals from all the pixels in a thinned-out fashion, and a device shutter function for extracting signal electric charges from each pixel to control an exposure time. In the thinning read mode, the operation of extracting the signal electric charges from each pixel is carried out one or more times for each read period of one frame.

Abstract: In a solid-state image capturing device including a pixel array arranged in a row direction and a column direction orthogonal thereto, and a vertical register having a plurality of transfer electrodes which serves to read signal charges Qa, Qb, . . . generated by light receipt of each of pixels A, B, . . . and to sequentially transfer the signal charge in the column direction upon receipt of a transfer pulse, an electric potential well for a smear charge is generated and an unnecessary charge q in the vertical register is collected into the electric potential well for a smear charge before the signal charge is read from the pixels A, B, . . . onto the vertical register (a timing t707), an electric potential well for signal charge transfer is then generated and the signal charges Qa, Qb, . . . are read from the pixels A, B, . . .

Abstract: Image information can be supplied from an image pickup apparatus to computer equipment at high speed. A solid state image pickup device 1 is vertically driven by a vertical drive circuit 2v and horizontally driven by a horizontal drive circuit 2h. The vertical drive circuit 2v operates at a given cycle in response to a vertical timing signal VT from a vertical timing control circuit 21v which operates according to a frequency dividing clock DCK with a given cycle. The horizontal drive circuit 2h operates in response to a horizontal timing signal HT from a horizontal timing control circuit 21h to be driven in response to a transfer trigger TR which is supplied from the computer equipment. An exposure control circuit 23 responds to a horizontal transfer flag HF which is supplied from the horizontal timing control circuit 21h and determines timing for discharge driving excluding a period of the horizontal transfer drive.

Abstract: A solid state image pickup device having: a mode selector for selecting one of first and second modes; a plurality of photoelectric converters for converting received light into electric charges; transfer paths each having a plurality of packets for receiving the electric charges from the plurality of photoelectric converters and transferring the electric charges in each packet; a controller for reading the electric charges from each of the plurality of photoelectric converters and supplying the read electric charges to the transfer paths; and a driver for driving the transfer means in the selected first or second mode at the number of drive phases different from the number of drive phases of the non-selected mode.

Abstract: A method of reading out a CCD interline image sensor having M lines×N columns of photosites, N vertical shift registers corresponding to the N columns of photosites, and a horizontal shift register, comprising the steps of: exposing the sensor to a first exposure such that all the M lines of photosites are exposed; transferring a subset of the M lines of photosites from the exposed lines of photosites to the N vertical shift registers; serially shifting each line of data from the N vertical shift registers to the horizontal shift register and reading out the horizontal shift register until all of the lines of data have been read out except for a second subset of the M lines; exposing the sensor to a second exposure such that the second subset of the M lines of photosites have remained in the sensor; and transferring the data from the exposed lines of photosites of the second exposure to the N vertical shift registers, except for the second subset of the M lines, thereby increasing the frame rate of the

Abstract: In a solid-state image capturing device 100 comprising pixel arrays 11r, 11g and 11b arranged in a row direction and a column direction which is orthogonal thereto and a vertical register 12 including a plurality of transfer electrodes in which a signal charge generated by light acceptance of each pixel is read and is sequentially transferred in the column direction upon receipt of a transfer pulse, an electrode terminal for generating K (K is an integer of 2 or more) continuous electric potential wells for a signal charge in the vertical register 12 upon receipt of the transfer pulse and an electrode terminal for generating one electric potential well for a smear charge after the K electric potential wells for a signal charge are provided as electrode terminals 101 to 116 for cyclically transmitting the transfer pulse to each of the transfer electrodes.

Abstract: In a CCD imaging device in which sensor sections have the vertical overflow drain (OFD) structure, a substrate bias control signal is applied to the base of a bipolar transistor via a resistor to turn on the transistor at least during a signal charge readout period. As a result, the base potential of a bipolar transistor that constitutes a clamping circuit is lowered, whereby a substrate bias that is output from a substrate bias generation circuit is lowered. Thus, the potential of an overflow barrier in the sensor sections is reduced.

Abstract: Methods and an apparatus are disclosed for providing enhanced vibration immunity in a solder paste inspection system, although they are usable in any number of industries that require rapid acquisition of several images. The method includes capturing at least three images on a frame transfer CCD array before any data is sequentially read from the array. The present method is extendable to a larger number of images. Additionally, the masked memory area can be larger than the image area of the frame transfer CCD array.

Abstract: A CCD converts an optical image of an object formed on its image sensing surface into electrical charges, and sequentially outputs the electrical charges of all of the light receiving pixels in one scanning operation in non-interlaced form. The outputs from the CCD are converted to the digital image signals by an analog-digital converter. A camera signal processing unit processes the digital image signals, thereby generating two streams of signals; one is digital video signals SV1 which are standard digital video signals in interlaced form, and the other is signals SV2 which are not outputted as the digital video signals SV1 out of the digital image signals of all of the light receiving pixels. These two streams of signals, SV1 and SV2, are processed differently depending upon a mode selected by a switch.

Abstract: In a digital camera, an image sensor or imaging device is driven in a partial pixel read mode during framing. The resulting image signal output from the image sensor is transformed to image data which can be displayed on, e.g., a display in real time. These image data are sent from the camera in an isochronous mode via a transmission interface and a cable connected to the interface. When a release command is input, the image sensor is driven in a full pixel read mode. Image data generated in this mode are written to a removable memory connected to a card interface or sent in an asynchronous mode via the transmission interface and cable. An image reproducing device is also capable of being connected to the camera by the cable.

Abstract: There is provided an image pickup apparatus including a plurality of pixels which are arranged in a horizontal and a vertical direction and which generate charges corresponding to optical signals, in which a color filter arrangement of a first order are arranged in horizontal pixel rows of odd numbers and a color filter arrangement of a second order are arranged in horizontal pixel rows of even numbers; and a drive circuit having a first mode for reading out pixel data of 2k+1 fields (k is a natural number) by an interlace operation from the plurality of pixels, a second mode for reading out pixel data of one field among the 2k+1 fields from said plurality of pixels, and a third mode for reading out images of a plurality of fields, the number of which is smaller than the of the 2k+1 fields, among the 2k+1 fields from said plurality of pixels.

Abstract: The present invention relates to an image recording device (10), comprising:

Abstract: An image pick-up device including a plurality of photoelectric conversion cells, and a charge transfer device including charge transfer cells wherein the number of the charge transfer cells is greater than the number of the photoelectric conversion cells. The image pick-up device also includes a controller which controls the operation of transferring signal charges from the photoelectric conversion cells to the charge transfer device according to a procedure including, forming a plurality of potential wells by a plurality of charge transfer cells, and transferring a signal charge from each photoelectric conversion cell to a potential well formed at a position corresponding to each photoelectric conversion cell.

Abstract: The present invention relates to an image pick up device (11), comprising:

Abstract: An image pickup apparatus which can produce an image provided with exposure suitable for both a backlighted object and its background without requiring a mechanical member, such as an iris or the like. The image pickup apparatus has a photoelectric conversion section for photoelectrically converting a light image so as to accumulate light information and to output the light information every unit light accumulation period which forms one picture. A digital camera signal processing circuit processes an output from the photoelectric conversion section to output a video signal. A timing signal generator outputs a plurality of timing signals for setting light information accumulation time every unit light accumulation period which is set in the photoelectric conversion section.

Abstract: There are provided a method for driving a solid-state image pickup apparatus, a solid-state image pickup device and a camera which enables fast operation and makes applicable of the conventional algorithm in signal processings by reducing the number of samples in the horizontal and vertical directions. Three or more odd number pixels in the solid-state image pickup device (1) are made one block, signal charges of predetermined pixels being thinned out to be transferred to transfer registers (4, 7), resulting signal charges being added within the transfer registers (4, 7) so that the center of gravity of pixels (pixel center) may coincide with a pixel at the center of one block and resulting mixed charge being transferred.

Abstract: A system controller controls a solid-state image sensor, and performs read-out at a predetermined subsampling ratio. In the event that the size of the image-taking area and the subsampling ratio do not agree, the system controller executes image size conversion processing with a digital processing unit, and converts the image size to an image size corresponding to a request from a peripheral device unit. Also, the system controller performs changing of the image-taking area following ending of the reading out from the solid-state image sensor, thereby obtaining normal frame signals. Accordingly, even in the event that zooming is performed by changing the subsampling ratio, zooming operations can be performed with an arbitrary zooming ratio, and reading out of the image-taking information is made to be suitable.

Abstract: The optoelectronic sensor comprises at least two pixels (1.11, 1.12, 1.21, 1.22), each pixel (1.11, 1.12, 1.21, 1.22) comprising a photodiode (2), and means for electrically connecting at least two pixels, the connecting means comprising FETs (6) for switching the connection on or off. The pixels (1.11, 1.12, 1.21, 1.22) are designed in such a way that if, e.g., four pixels (1.11, 1.12, 1.21, 1.22) are connected the photocharges generated in the connected pixels (1.11, 1.12, 1.21, 1.22) are combined in one of the connected pixels (1.22), whereby the spatial resolution of the sensor is reduced. A skimming FET (3) arranged between the photodiode (2) and a charge detection circuit (4) offers a floating source and floating drain in each pixel (1.11, 1.12, 1.21, 1.22). Thus the sensor can be manufactured in CMOS technology and is suited for photocharge binning. The invention makes it possible to vary the spatial resolution, the light sensitivity and/or the readout velocity by purely electronic means.

Abstract: Wide dynamic range operation is used to write a signal in a freeze-frame pixel into the memory twice, first after short integration and then after long integration. The wide dynamic range operation allows the intra-scene dynamic range of images to be extended by combining the image taken with a short exposure time with the image taken with a long exposure time. A freeze-frame pixel is based on voltage sharing between the photodetector PD and the analog memory. Thus, with wide dynamic range operation, the resulting voltage in the memory may be a linear superposition of the two signals representing a bright and a dark image after two operations of sampling.

Abstract: An image sensor having a mosaic color filter mounted thereon synthesizes and takes out information charge of multiple pixels. In an image sensor (11), the number of bits of the odd-numbered columns of shift registers of a storage section (11s) is different from that of the even-numbered columns. During the transfer process of information charge from the storage section (11s) to a horizontal transfer section (11h), pixels are divided between the even-numbered columns and odd-numbered columns. The image sensor (11) discharges the information charge from an output section (11d) in response to a reset clock &phgr;r1 having a clock cycle twice as long as a horizontal clock &phgr;h, whereby the information charge is synthesized every two pixels. As the pixels are divided between the odd-numbered columns and the even-numbered columns, the information charge related to the same color component continues in the horizontal transfer section (11h).

Abstract: To avoid mixtures of signal charges read out in an all-pixel read out mode and also in a thinning read out mode, a charge sweeping-out pulse is produced from a timing generating circuit of a CCD solid-state imaging device. In the CCD solid-state imaging device, there are provided a solid-state imaging element capable of being selectively operable in an all-pixel read out mode where signal charges of all pixels are independently read out at the same time instant, and in a thinning read out mode where signal charges are read out only from a portion of pixel columns along the vertical direction, and a timing generating circuit for generating at least one piece of a signal charge sweeping-out pulse used to discharge the signal charges of the respective pixels just after the signal charges are read out during an exposing time period immediately before a read out operation is transferred from the thinning read out mode to the all-pixel read out mode.

Abstract: A solid-state image sensing device comprising a photoelectric converter portion, a solid-state image sensor, and a controlling means. The photoelectric converter portion has a plurality of photoelectric converters arranged in two dimensions on a semiconductor substrate. The solid-state image sensor vertically transfers charges, transferred from the photoelectric converter portion, at separate times of first transfer and second transfer. Further, the photoelectric converter portion has a vertical transfer portion, in which first and fourth gates are provided for odd-numbered photoelectric converters, and second and third gates are provided for even-numbered photoelectric converters, and a horizontal transfer portion for horizontally transferring charges transferred from the vertical transfer portion. The controlling means supplies the vertical transfer portion with vertical transfer pulses and the horizontal transfer portion with horizontal transfer pulses.

Abstract: The invention is intended to provide a highly integrated solid-state image pickup device, in which the number of transfer electrodes of a horizontal shift register is reduced, and a plurality of vertical shifter registers are arranged with a reduced pitch therebetween. Output-control gate electrodes are disposed at an output end of the vertical shift registers. These output-control gate electrodes are operated independently from vertical transfer gate electrodes, and temporarily reserve information charges. Horizontal transfer gate electrodes corresponding to the vertical shift registers on odd-numbered columns are turned on, so signals charges in these vertical shift registers are read into a horizontal shift register. During horizontal transfer of these information charges, information charges of vertical shift registers on even-numbered columns are reserved, for half of a horizontal scanning period, in output ends of the vertical shift registers by the output-control gate electrodes.

Abstract: The image sensing device includes an image sensing area 22 having an antiblooming drain structure; and a frame memory area 24 coupled to the image sensing area 22 for storing charge from the image sensing area, wherein during charge integration, the antiblooming drain is biased at a first level, and during charge transfer to memory, the antiblooming drain is biased at a second level such that the image sensing area 22 will have a higher charge capacity than during the charge integration.

Abstract: A color CCD solid-state image pickup device having a color filter array such that it is not possible to mix pixels adjacent in the column direction. Even rows and odd rows of pixels arrayed in a matrix respectively have the same filter arrays and it is thereby made possible for signal charges of light-receiving parts in pixels of a Kth row (K being a positive integer) and signal charges of light-receiving parts in pixels of either of the K±2th rows to be mixed and vertically transferred in the vertical shift registers.

Abstract: Chip area is reduced using a CCD solid state image pick-up device of a frame transfer system. Permanent accumulation pixels for accumulating information charges in a first imaging operation to photograph a coarse image and a second imaging operation to photograph a fine image, and selective accumulation pixels for accumulating information charges in only the second imaging operation are arranged in an image pick-up section 11i of a solid state image pick-up device 11. The permanent accumulation pixels are disposed every, for example, three rows of the selective accumulation pixels. The number of rows of a storage section 11s is arranged to correspond with the number of rows of the permanent accumulation pixels of the image pick-up section 11i. The permanent accumulation pixel and the selective accumulation pixel have the same construction on a substrate and are distinguished by frame transfer clocks .phi.a and .phi.b to be supplied.

Abstract: Pixel data are sequentially compared in the circuit blocks 41A through 47A, smaller pixel data are supplied to the circuit blocks 51B through 54B, and further, smaller pixel data are supplied to the circuit blocks 71B, 72B. A smaller one of the pixel data supplied to the circuit blocks 71B, 72B is supplied to the circuit block 91B, thus determining the minimum value of pixel data. The maximum value of pixel data can also be obtained in the same manner. On the basis of these data, the thresholds for generating class codes can be obtained. Thus, a hardware of a simple construction can classify the pixel data into classes.

Abstract: A charge coupled device is disclosed including: a well formed in a substrate, the well having a conductivity opposite to that of the substrate; a first conductivity type of BCCD region formed on the well; a first lightly doped impurity region formed in a predetermined portion of the first conductivity type of BCCD region; a heavily doped impurity region formed in a predetermined portion of the BCCD region, the heavily doped impurity region having a predetermined distance from the first lightly doped impurity region; a second lightly doped impurity region formed between the first lightly doped impurity region and heavily doped impurity region; a first polysilicon gate formed over a portion of the BCCD region, placed between the first lightly doped impurity region and heavily doped impurity region; and a second polysilicon gate formed over the first lightly doped impurity region. The realization of high speed CCD and simplification of the circuit configuration can be obtained by using one-phase clocking.

Abstract: Shunt wirings (12) in the form of a conductive light intercepting film which covers over vertical CCD registers and also serves to supply power, project into locations between adjacent photoelectric transducers (11) in the vertical direction, and the distance between the projecting portions of adjacent ones of the metal wirings is set to 0.2 .mu.m or less and is limited to a distance with which an electric field between adjacent ones of the metal wirings is 10.sup.7 V/cm or less and the adjacent metal wirings do not suffer from short-circuiting.

Abstract: The CCD device is suitable for use in a lidar. It has an image zone constituted by a matrix of M lines and N columns of photosensitive sites for receiving a light signal and generating charges, a first memory zone constituted by a matrix of P lines and N columns of non-photosensitive sites, a read-out register having a single line of N sites, and a second memory zone having P lines of N sites, apt to receive in parallel charges contained in the N sites of the read-out register. The first memory zone has a first line of sites apt to receive and to sum charges generated in a respective column of the image zone at the end of each of successive acquisition periods. The second memory zone stores and transfers charges to N sites of a same line of the image zone or the first memory zone whereby accumulating, in each line of the first memory zone, charges accumulated during an observation period and resulting from a plurality of successive summations.

Abstract: An electronic still camera requires a solid-state image sensing apparatus capable of providing a higher-speed pickup image signal having a high vertical resolution. In a line reducing operation to reduce the number of lines of the pickup image signal to be output by applying read-out pulses to read-out gate units located at predetermined intervals in order to read out only signal electric charge from sensor units for picture elements arranged in the vertical direction on some lines, a vertical CCD is driven by a combination of a pair of vertical transfer clock signals .o slashed.V1 (.o slashed.V1') and .o slashed.V3 (.o slashed.V3') having phases opposite to each other and another pair of vertical transfer clock signals .o slashed.V2 and .o slashed.V4 also having phases opposite to each other, allowing the overlap period twice the vertical transfer clock signals to be lengthened.

Abstract: An image sensor operable to vary the output spatial resolution according to a received light level while maintaining a desired signal-to-noise ratio. Signals from neighboring pixels in a pixe patch with an adjustable size are added to increase both the image brightness and signal-to-noise ratio. One embodiment comprises a sensor array for receiving input signals, a frame memory array for temporarily storing a full frame, and an array of self-calibration column integrators for uniform column-parallel signal summation. The column integrators are capable of substantially canceling fixed pattern noise.

Abstract: A solid state image sensor including a light-receiving section, a storage section, and a clock generator. The clock generator performs a first discharging operation for discharging noise charges in the light-receiving section, a first transferring operation for transferring the noise charges in a reverse direction from the storage to the light-receiving section, and a second discharging operation for discharging the noise charges transferred from the storage into the light-receiving section.

Abstract: An imager with which it is possible to reduce the aliasing noise effectively. An imaging light from an object is condensed by an optical system 1 so as to fall on an optical low-pass filter 2. The optical low-pass filter 2 has trap points corresponding to zero values of the MTF characteristics on two points of 1/2 and 1 of the spatial sampling frequency on horizontal and vertical MTF characteristics, and reduces components less than one-half the spatial sampling frequency as determined by the arraying of the light receiving elements of a CCD 4 of the imaging light. The CCD 4 receives the imaging light, the spatial frequency of which has been suppressed by the spatial low-pass filter 2, and outputs an imaging light.

Abstract: A fast frame interline transfer charge coupled device imaging sensor includes an imaging section and an storage section. The imaging section includes a plurality of interline transfer registers, each interline transfer register containing a plurality of interline register elements. The imaging section further includes an interline clocking structure, the interline clocking structure including polycrystalline silicon buss lines used as gate electrodes, the polycrystalline silicon buss lines being connected to a metal strapping network, the interline clocking structure causing charge to be transferred between interline register elements of each interline transfer register based on interline clocking signals. The storage section is coupled to the imaging section. The storage section includes a plurality of storage registers, each storage register containing a plurality of storage register elements. The storage section further includes a storage discharge structure and a storage clocking structure.

Abstract: An image sensor operable to vary the output spatial resolution according to a received light level while maintaining a desired signal-to-noise ratio. Signals from neighboring pixels in a pixel patch with an adjustable size are added to increase both the image brightness and signal-to-noise ratio. One embodiment comprises a sensor array for receiving input signals, a frame memory array for temporarily storing a full frame, and an array of self-calibration column integrators for uniform column-parallel signal summation. The column integrators are capable of substantially canceling fixed pattern noise.

Abstract: A solid-state CCD image pick-up device includes optoelectric transducing elements corresponding to pixels vertically and horizontally arrayed in a matrix forming column linear arrays defining a column direction and at least one vertical charge transfer path associated with a corresponding adjacent column linear array. Pixel signals are vertically transferred from the column linear arrays to the vertical charge transfer paths such that gate signals occurring at predetermined times are applied to gate electrodes of the vertical charge transfer paths to permit the pixel signals to be scan read by a horizontal charge transfer path. Switching elements are provided for transfer gate electrodes and a drive circuit sequentially generates drive signals for groups of gate electrodes during periods in which the switching elements are rendered conductive to allow a full frame scan read to be performed by supplying a predetermined number of timing signals to the gate electrodes.

Abstract: An imaging device has a photosensitive array, a vertical transfer CCD array, a horizontal transfer CCD, a drain region, drain gates, a drive circuit and a processing circuit. An electric charge accumulated in the photosensitive array is first transferred to the vertical transfer CCD array, and then transferred from the vertical transfer CCD array to the horizontal transfer CCD. The electric charge held in the horizontal transfer CCD is transferred to the drain region at a predetermined timing defined by to a slow motion ratio N. The slow motion operation can be changed independently of the frequencies of the CCD drive signals. Therefore, the power consumption is much reduced and a slow motion ratio can be obtained.

Abstract: A color CCD solid-state image pickup device having a color filter array such that it is not possible to mix pixels adjacent in the column direction. Even rows and odd rows of pixels arrayed in a matrix respectively have the same filter arrays and it is thereby made possible for signal charges of light-receiving parts in pixels of a Kth row (K being a positive integer) and signal charges of light-receiving parts in pixels of either of the K.+-.th rows to be mixed and vertically transferred in the vertical shift registers.