Coding Element Controlled By Buffer Fullness Patents (Class 348/419.1)
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Patent number: 6654500Abstract: An MPEG video decoding system and an overflow processing method are disclosed. The MPEG video decoding system does not reset the video buffer during the overflow period, which allows a decoding of the data already stored in the video buffer, thereby minimizing the loss of data due to an overflow.Type: GrantFiled: December 28, 1998Date of Patent: November 25, 2003Assignee: LG Electronics Inc.Inventor: Hwa Young Lyu
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Patent number: 6629318Abstract: There is disclosed a decoder buffer capable of receiving streaming video data packets and storing the data packets in a plurality of access units. Each of the access units holds at least one data packet associated with a selected frame in the streaming video. The decoder buffer comprises: 1) a first buffer region comprising at least one access unit for storing data packets that are less immediately needed by the video decoder; and 2) a re-transmission region comprising at least one access unit for storing data packets that are most immediately needed by the video decoder. The decoder buffer, in response to a detection of a missing data packet in the re-transmission region, requests that the streaming video transmitter retransmit the missing packet.Type: GrantFiled: August 2, 1999Date of Patent: September 30, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Hayder Radha, Kavitha Parthasarathy
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Publication number: 20030160893Abstract: A technique is provided for programmably controlling output of compressed data from, for example, a video encoder. The technique can be implemented within the video encoder and includes buffering the compressed data in a write buffer, followed by transferring the compressed data from the write buffer to a read buffer. At least one programmable output mode is provided for selectively controlling output of the compressed data from the read buffer. When the read buffer is full, the compressed data is stored to the encoder's external memory to await transfer to the read buffer. The at least one programmable mode can include a slave mode, a gated master mode, a multi-cycle speed mode, and a paced master mode, which may be employed individually or in combination. A mechanism for inserting pad bytes of data into the compressed data is also provided.Type: ApplicationFiled: February 22, 2002Publication date: August 28, 2003Applicant: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, Edward F. Westermann
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Publication number: 20030156639Abstract: A system and method of controlling the frame rate of signals for a video display device may employ a first-in/first-out (FIFO) frame rate control strategy for analog image source signals in conjunction with LCD panels. The disclosed system and method may dynamically adjust the frequency at which data are read out of a FIFO buffer, accounting for any frame rate differences between the source image data signal and the destination display device. Additionally, resolution of the output image may be adjusted to conform with the capabilities of the display apparatus.Type: ApplicationFiled: February 28, 2002Publication date: August 21, 2003Inventor: Jui Liang
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Patent number: 6567117Abstract: In a regulation of a total image quality for an encoded picture, parameter conversion data which define applicable coding bit rates and coding frame rates for each image format are previously stored in a storage 13. An image quality regulating parameter is input through a parameter input section 11 and is used as a key in an image quality regulator 12 to make a reference to the parameter conversion data in the storage 13 in order to determine a coding frame rate and an image format. By delivering the coding frame rate and the image format to picture encoding means, a regulation of a total image quality is achieved through a single operation without independently operating two parameters, the image format and the frame rate.Type: GrantFiled: September 9, 1999Date of Patent: May 20, 2003Assignee: Nippon Telegraph and Telephone CorporationInventors: Hiroyuki Nago, Mineo Shoman, Koji Fukuda, Hiroyuki Yamaguchi
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Patent number: 6542549Abstract: An apparatus for the verification of compressed objected-oriented video bitstream includes a set of verifier models: Video Complexity Verifier (VCV), Video memory Verifier (VMV) and Video Presentation Verifier (VPV). The models specify the behavior of a decoder for variable VOP size and rate and define new parameters and bounds to measure and verify the computational and memory resources that the bitstream demands. They can be used in the video encoder or in the verification of pre-compressed video distribution.Type: GrantFiled: October 12, 1999Date of Patent: April 1, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Thiow Keng Tan, Guo Rong Hu
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Patent number: 6501800Abstract: A variable bit-rate encoding device is provided that can perform a variable bit-rate encoding process at high rate. The subtracter 103 calculates a predictive error between compressed frame data and motion-compensated reference frame data and then outputs it to the code-amount allocator 107. The code-amount allocator 107 calculates and stores the power for each unit section of a predictive error. Thus, at the time the image data has been completely processed, a target code amount allocated to each unit section in a second pass encoding is decided based on the power of a predictive error of the whole image data and based on the power of a predictive error for each unit section. The motion vector memory 114 stores a motion vector for each macroblock. Upon an actual second pass encoding, the motion compensator 115 motion-compensates the reference frame input from the frame memory 116 according to the motion vector value and then outputs the motion-compensated reference frame to the subtracter 113.Type: GrantFiled: September 14, 2000Date of Patent: December 31, 2002Assignee: NEC CorporationInventor: Hideki Sawada
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Patent number: 6445825Abstract: Compression and encoding sections (311 (1), 311 (2) and 311 (3) compress and encode input signals VS, AS and SS separately to generate compressed data. A SCSI interface (32) outputs the compressed data to a DSM (50). Output buffers (312 (1), 312 (2) and 312 (3)), a stream interface (34) and an input buffer (33) transfer the compressed data generated at the compression and encoding sections (311 (1), 311 (2) and 311 (3)) to the SCSI interface (32) through data transfer buses (38(1), 38 (2), 38 (3), 39 and 40). A CPU (35), a RAM (36) and a ROM (37) control data transfer through a CPU bus (42).Type: GrantFiled: September 21, 1998Date of Patent: September 3, 2002Assignee: Sony CorporationInventor: Kenji Mori
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Patent number: 6438556Abstract: A system and method for compressing data on a computer system is disclosed. The method and system include separating the data into a plurality of segments. The plurality of segments includes a plurality of unique segments. The method and system also include providing a plurality of code words. Each of the plurality of code words corresponds to a unique segment of the plurality of unique segments. The method and system also include providing a representation of the data. The representation includes the plurality of code words for the plurality of segments. The plurality of code words in the representation replaces the plurality of segments. As a result, the data in the representation could be accessed randomly.Type: GrantFiled: December 11, 1998Date of Patent: August 20, 2002Assignee: International Business Machines CorporationInventors: Nadeem Malik, Jason Raymond Baumgartner, Steven Leonard Roberts
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Publication number: 20020085489Abstract: The invention dynamically compensates for differences in data rates. In one embodiment, the status of an input buffer is monitored and used to change the number of oversamples within a frame. In another embodiment, a high frequency clock in the system is used to stall the codec for one clock. In both ways, distortion due to differences in data rates is reduced.Type: ApplicationFiled: May 11, 1998Publication date: July 4, 2002Inventors: DARYL SARTAIN, TERRY SCULLEY
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Publication number: 20010019585Abstract: The invention relates, in encoding/decoding systems, to an improved method of switching from a first coded video sequence to a second one. In order to avoid underflow or overflow of the decoder buffer, a transcoding of the input streams IS1 and IS2 is used to shift the temporal position of the switching point and to obtain at the output of the provided transcoders (11, 12) streams TS1 and TS2 containing an identical entry point and the same decoder buffer characteristics.Type: ApplicationFiled: April 9, 2001Publication date: September 6, 2001Applicant: U. S. Philips CorporationInventor: Yann Lemaguet
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Publication number: 20010009566Abstract: An apparatus and method for encoding input video data representative of a number of group of pictures (GOPs) each having a plurality of fields or frames. The apparatus includes a first encoder for processing received input video data so as to determine difficulty data of a field or frame which is indicative of the difficulty of the video data, a computing device for determining a target code amount representative of an amount of data to be utilized in accordance with the difficulty data of a number (N) of the fields or frames, and a second encoder for encoding the received video data in accordance with the target code amount.Type: ApplicationFiled: November 30, 1998Publication date: July 26, 2001Inventor: KANJI MIHARA
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Patent number: 6266447Abstract: A coding apparatus includes a large block forming unit for forming a large block of sample values of an input signal, a small block forming unit for dividing the large block into a plurality of small blocks, a first coding unit for coding the small blocks of the input signal by using a difference signal obtained by subtracting a predicted value from the small blocks of the input signal, a second coding unit for coding the small blocks of the input signal without using the difference signal, and a selecting unit for selecting the first or second coding unit in units of large blocks.Type: GrantFiled: April 12, 1995Date of Patent: July 24, 2001Assignee: Canon Kabushiki KaishaInventors: Nobuhiro Hoshi, Shingo Ikeda
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Patent number: 6263020Abstract: In a video image compression and transmission system, quantization parameters for a block transform based video compression algorithm can be controlled by a quantizer selector so as to control compressed video frame size. The selection of the appropriate quantization parameter for the nth macroblock of a current frame is based on the cumulative number of compressed bits appearing in the first n-1 macroblocks of a current frame and a previous frame. By controlling the quantization parameter is such a manner, the overall system reacts more quickly to changes in complexity in the video sequence and allocates bits more accurately to different parts of the video frame according to a past history of bit allocation. To efficiently utilize the bandwidth of a transmission medium (such as POTS), a bit count of the contents of the transmit buffer is sent to a buffer regulator in a video controller where it is compared to a low water mark threshold.Type: GrantFiled: December 24, 1996Date of Patent: July 17, 2001Assignee: Intel CorporationInventors: Thomas R. Gardos, Karl O. Lillevold, Stephen Ing, Doug Brucks, Michael J. Gutmann, Key Phomsopha
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Publication number: 20010007575Abstract: The present invention provides an apparatus and method for coding moving pictures, which reduces a delay time generated by buffering of a decoding apparatus in compressive coding of the moving pictures. In this invention, the target number of bits of one picture P as a target value of the number of generated bits per one picture is set as well as the upper limit number of bits uCg as an upper limit value of the number of generated bits of the picture is set. Then, when the cumulative number of generated bits Cg generated from the first macroblock to a macroblock which is being coded in the picture exceeds the upper limit number of bits uCg in the middle of the picture which is being coded, the coding of a macroblock is skipped to avoid underflow.Type: ApplicationFiled: December 12, 2000Publication date: July 12, 2001Inventors: Toshiaki Mori, Susumu Ibaraki, Noboru Katta
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Patent number: 6256420Abstract: A transmission system which quantizes a data signal into quantized data and alternatively either transmits the quantized data while controlling a quantity of distortion to a constant value or transmits the quantized data while controlling a quantity of data generated to a constant value as a function of the quantized data which are alternatively stored in and read out from a first memory and a second memory.Type: GrantFiled: April 4, 1995Date of Patent: July 3, 2001Assignee: Sony CorporationInventors: Yoichiro Sako, Yuichi Kojima
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Patent number: 6212232Abstract: A method and apparatus is described for encoding a sequence of video frames at a target bit rate. A controller controls the bit r ate by providing values for a coding frame rate and quantization parameter to a frame encoder. A set of operating regions, including a first operating region and a second operating region, is defined. Each operating region includes a range of values for each parameter. These operating regions may intersect each other or be disjoint. The encoder codes the frame sequence with the value of each parameter being in the first operating region. During the coding, the controller determines to make an adjustment to the value of one parameter that would put that value out of the first operating region and in the second operating region. The controller makes the adjustment if a predetermined criterion is satisfied, otherwise the controller constrains the value of that one parameter to remain in the first operating region.Type: GrantFiled: June 18, 1998Date of Patent: April 3, 2001Assignee: Compaq Computer CorporationInventors: Eric Reed, Frederic Dufaux