Abstract: A protection circuit prevents snapback events in MOS transistors associated with semiconductor or micromechanical structures, such as ink-jet ejectors. A bulk electrode associated with the MOS transistor is monitored for unusual high voltages which are consistent with an impending snapback event. The voltage on the bulk electrode is then used to turn on the control transistor which connects the gate of the MOS transistor to ground and thereby protects the device.

Abstract: In one embodiment of the present invention, across an electrical load to prevent over dissipation semiconductor switch in the event of a short circuit. The system includes a microprocessor with a terminal which is alternatively configurable as an input and as an output. When the terminal is configured as an output, the microprocessor can turn the electrical load ON and OFF via a transistor, under software control. Once the microprocessor turns the load ON, the microprocessor reconfigures its terminal to be an input. The system automatically latches the electrical load ON until a short circuit occurs or until the microprocessor turns the load OFF. When a short circuit occurs, the system automatically turns the load OFF. With the microprocessor terminal configured as an input, the microprocessor can detect when the system has automatically turned the load OFF due to a short circuit, thus being able to set a diagnostic code or take other appropriate action.

Abstract: A polyphase boost inductor battery charger having a switching current spike limiter that employs a switching transistor, such as a bipolar, MOSFET, or IGBT transistors, for example. The switching current spike limiter includes a controller whose inputs are coupled to receive AC line voltage from a power source and battery voltage from a battery. A comparator is coupled to receive the AC line voltage and the battery voltage. Outputs from the controller and the comparator are coupled to an OR gate. An output of the OR gate is coupled through a switch driver to a series pass switch which comprises the switching transistor. The switching transistor is coupled to the inductor. A flyback diode is coupled across the output of the switching current spike limiter. The switching current spike limiter controls current spikes that flow when the AC line voltage (V.sub.AC) peak is greater than the battery voltage (V.sub.batt). To determine the condition V.sub.AC peak>V.sub.

Abstract: A telephone having a semiconductor line switch TR1 is protected from excess line voltage or current by the use of current foldback techniques. A current sensing resistor R6, in series with the line switch provides a measure of the line current and this operates a bypass transistor TR4 which reduces the drive current for the line switch TR1 causing it to come out of saturation and begin to block line current. A voltage sensing resistor R7 provides a measure of the voltage across TR1 and this further increases the bypass current through TR4. This ensures that the voltage and current applied to TR1 remain within permitted limits.

Abstract: A power control apparatus for protecting an electrical circuit from excessive current and in particular for protecting it from a large and fast transition pulse caused by a rapid current polarity transition. At least two switching devices are coupled in series or in parallel between a power supply and a load. A gate signal is generated to change the switching devices from conductive state to nonconducting state in response to detection of an excessive current state. The gate signal is delayed by a predetermined period of time to change the switching devices into the nonconducting state after all of the switching devices are saturated so that the rapid current polarity transition is eliminated.

Abstract: An integrated circuit has a semiconductor die with a substrate and at least first and second bond pads. An internal circuit is fabricated on the semiconductor die and connected to the first bond pad. An electrostatic discharge protection circuit including cascaded bipolar transistors is connected in series with a field effect transistor between the first and second bond pads. In another version, an output buffer of the integrated circuit is divided into sections. An electrostatic discharge protection circuit is triggerable in response to a voltage in the substrate. Resistive connections are provided from the sections of the output buffer to one of the bond pads. The output buffer is operative upon an electrostatic discharge event to inject sufficient charge into the substrate to produce the voltage to trigger the electrostatic discharge protection circuit. Other circuits, devices, systems and methods are also disclosed.

Abstract: A circuit is provided for protecting against an increase in collector current for an integrated circuit containing a power switching device. The power device drives an inductive load connected to a power supply, and is connected to a control circuit for switching the power device on and off. The protection circuit contains a clamping circuit for deactivating the control circuit and switching the power device off when the current flowing through the power device reaches a preset maximum value. In addition, a circuit is provided for inhibiting the operation of the clamping circuit for a preset time interval after the power device has been switched on, and for keeping the clamping circuit in operation during voltage undershoots caused by the inductive load following the switching of the powered device off.

Abstract: A drive circuit fault detection device comprising a discriminating circuit generating a digital signal, the level of which indicates a fault; and an identifying circuit generating a binary-coded signal indicating the type of fault, i.e. ground shorting of the drive circuit or an open load. The discriminating circuit comprises a resistive network connected to the output of the drive circuit, for generating a voltage indicating correct connection of the load or a fault on the drive circuit and a comparator for comparing the generated voltage with a reference voltage and supplying the digital signal at its output. The identifying circuit comprises a current mirror circuit generating an output voltage having two different logic levels in the event of short circuiting or an open load, respectively, and a combination circuit for generating the binary-coded output signal.

Abstract: A method and apparatus for stopping the operation of a failed device and preventing that device from being turned back on is shown, using two thresholds, a first failure threshold is shown when the device may be turned off or prevented from further operation. A second safe operation threshold is shown, different from the first threshold and within the safe operation range of the device. As the temperature rises, this transistor is driven further to conduction diverting base current from a second transistor and driving it further into nonconduction. The collector current from the second transistor is diverted to a resistor providing additional bias to the temperature sensitive transistor and driving it to a new bias. This bias establishes the second threshold. According to the inventive principles, the device is prevented from being turned back on until the safe operating threshold is reached.

Abstract: A semiconductor power module which provides reliable overvoltage protection including an overvoltage protection device which functions so that when an overcurrent flows to an IGBT (1), a sink transistor (10) turns on and the IGBT (1) turns off accordingly. As the IGBT (1) turns off to cut off the overcurrent, a high surge voltage is applied to the IGBT (1). At this time, however, a clamp current flows trough a clamping circuit including a Zener diode (6), a diode (7) and a resistance (8) and part of it is divided to a transistor (Q11), so that a transistor (Q12) turns on and the sink transistor (10) turns off as the result. Accordingly, the clamp current increases a gate voltage of the IGBT (1). Hence, large part of the load current flows in the IGBT (1), and only a little flows to the clamping circuit. Accordingly, overheat of and damage by burning to the clamping circuit will not be caused even if both the overcurrent and overvoltage are applied.

Abstract: A solid state circuit breaker which provides high voltage isolation between a control circuit and a power source is described. The circuit breaker comprises a receiver for providing a control signal in response to a transmitter that is electrically isolated from the receiver, a solid state switch that closes in response to the control signal thereby allowing a load current to flow through the switch, a current sensor for measuring the load current, and an inhibit circuit responsive to the current sensor for inhibiting the control signal when the load current exceeds a predetermined magnitude thereby opening the switch without adjusting the transmitter. After opening the switch, the inhibit circuit is responsive to the transmitter for allowing the control signal thereby closing the switch.

Abstract: A protective circuit intended to protect a load against excessive input voltage includes a depletion mode MOSFET, i.e., a MOSFET which is conductive when its V.sub.gs =0. Various alternative embodiments are described including those where the gate of the depletion mode MOSFET is tied to its source or to ground or some other reference voltage, where the gate of the MOSFET is switched at the onset of an excessive voltage condition, and where the gate of the MOSFET is controlled by negative feedback. The protective protecting IC loads in automobile form a condition known as load dump.

Abstract: A protective circuit is used in conjunction with a switching power source for protecting the latter from overload and from short circuits. It is detected whether the current at the primary winding current of a switching power source transformer, the load current of the switching power source, or both exceed predetermined reference voltages. If so, supply of power to the switching power source is interrupted for a predetermined period of time, thereby bringing the switching power source into inoperable condition in this duration.

Abstract: A three-terminal Smart Power MOSgated device has short circuit, over-temperature and over-voltage protection and the like. The control circuit and the protective circuits are powered from an input or control pin connected to a microprocessor. The output of the microprocessor is connected to a resistive divider circuit such that three potentials can be selectively produced at the divider mode, and comprise an on-level signal, an off-level signal and a reset level signal respectively. The control circuit contains an R-S latch which turns on in the absence of a fault signal to connect the on and off signal levels to the MOSgated device. During a fault, the R-S latch disconnects the control circuit input from the MOSgated device, and is reset only by the reset level signal which is distinct from the off signal level which is incapable of resetting the R-S latch.

Abstract: A low-voltage drop current regulator regulates the current in a data interchange circuit. In one embodiment, the low-voltage drop current regulator couples a positive power supply voltage to the power supply pin of a driver integrated circuit. In another form of the invention, the low-voltage drop current regulator is placed in series with the individual output leads of a driver integrated circuit to couple the respective output signals to respective pins of the data interchange circuit.

Abstract: In a circuit configuration for the shutoff of a semiconductor component in the event of excess current, the semiconductor component has gate and cathode terminals and is controlled by the field effect. A controllable switch is connected between the gate and cathode terminals and is made conducting by a control signal. A device controls the controllable switch to a range of high on-state DC resistance when there is excess current and a shutoff signal is simultaneously present.

Abstract: A current detecting device of the invention has a temperature compensating function used for a current limiting device. A sensing resistance and a reference voltage source are connected to a comparison device. A compensating device, such as semiconductor element, is inserted in series into the reference voltage source in a voltage source circuit for supplying a reference voltage to compensate a temperature dependency of the sensing resistance. Temperature dependency of the reference voltage is a negative temperature dependency in the forward voltage drop. The manufacturing process of the current detecting device becomes simple.

Abstract: A bi-level current limiting circuit is provided for purposes of maintaining safe battery operation in hostile or otherwise volatile environments. The bi-level current limiting circuit includes two sub-circuits, a first sub-circuit for establishing a maximum current level output from a battery pack into which the circuit is incorporated, and a second sub circuit for establishing a steady state current level output.

Abstract: A circuit and method for detecting and protecting against an overcurrent condition in a power transistor switching device, and particularly an IGBT. The power transistor switching device has main terminals and a control terminal, the main terminal having a normal saturation voltage therebetween during normal conduction of the power transistor device. The circuit includes a driver providing control signals to the control terminal of the power transistor device for switching the power transistor device on and off, a sensing circuit coupled to the power transistor device for sensing the saturation voltage of the power transistor device, and a switching circuit coupled to the control terminal of the power transistor device and responsive to the sensing circuit for removing the control signals from the control terminal in the event the saturation voltage reaches an abnormal level indicating an overcurrent condition in the power transistor device.

Abstract: An overcurrent limit circuit in which the output transistor and current sense transistor share a common collector and common base. A reference voltage is compared with a voltage derived from a current sense resistor. The circuit limits the current to the base of the output transistor in response to the reference voltage threshold being reached at the current sense resistor. A Vbe comparator comprised of two transistors may be used with a first bias current to both transistors and a second bias current to one of the two transistors.

Abstract: A drive circuit for the interior, and one or more of the exterior, mirrors in a vehicle mirror system provides a drive signal to each of the mirrors to establish the reflectance level of that mirror. Circuit protection is provided to sense a fault condition on one of the electrical conductors extending to the exterior mirrors and to take corrective action in response to a fault condition. The circuit protection may also respond to a fault condition in the electrical supply of the drive circuit and take suitable corrective action. In certain embodiments, each mirror in the mirror system is responsive to one of a plurality of output amplifiers, which is responsive to a distinct desired reflectance signal level in order to color that mirror to a reflectance level that is distinct from that of the other mirrors.

Abstract: A circuit and method for protecting a voltage inverter circuit is disclosed. The circuit comprises a first comparison circuit capable of comparing a first reference voltage to a voltage indicative of the load current of the voltage inverter. When the comparison circuit signals that the first reference voltage is greater than the load voltage, a disable circuit coupled to the first comparison circuit disables the voltage inverter. In the preferred embodiment, the inverter provides power to a cold cathode fluorescent lamp which, if damaged, can harm the inverter.

Abstract: A semiconductor integrated circuit has a semiconductor output device (3) , a sensor (5) generating an electric signal (7) relevant to heat generation (6) of the output device (3) and a microprocessor unit MPU 2, inside a chip (1). The MPU (2) is constructed of a memory (20) and CPU (22). The electric signal (7) generated from the sensor (5) is processed by the CPU (22) in accordance with a stored program of the memory (20). Accordingly, the drivability of the semiconductor output device (3) can be set in an optimum state corresponding to changes in chip temperature including changes that are only momentary.

Abstract: In an overcurrent protection circuit of a power device, an analog switch (4) connects a negative input of a comparator (3) to a reference voltage VREF1 or another reference voltage VREF2 depending on a control signal (S5) from a timer (5). A positive input of the comparator (3) receives voltage drop value (VS). The timer (5) is triggered by a leading edge of an input signal (IN) to output the control signal (S5) to the analog switch (4). The control signal (S5) directs the analog switch (4) to connect the reference voltage VREF2 to the negative input of the comparator (3) only during a transient state estimated period (T) and to connect the reference voltage VREF1 to the negative input of the comparator (3) out of the transient state estimated period (T).

Abstract: A power transistor switching circuit includes a switching transistor. A switching signal triggers a control device which, via a delay device and a control amplifier applies a first control signal to a control electrode of the switching transistor. A thyristor is coupled to the control electrode of the switching transistor. The thyristor has a first trigger gate and a second trigger gate. A measuring circuit generates a measuring signal proportional to the current in the switching transistor. A comparison device compares the measuring signal with a reference signal for applying a second trigger signal to the thyristor second trigger gate. The control device includes a further control amplifier having an input coupled to the switching signal and an output which applies a further control signal to the first trigger gate. The delay device delays the first control signal with respect to the further control signal.

Abstract: A high voltage protection circuit includes a breakdown network for providing a discharge path between a pair of terminal of a circuit to be protected. Each network conducts current between a supply terminal and another terminal at a low threshold voltage value when power is removed from the supply terminal. The network increases the threshold value when power is applied to the supply terminal to prevent conduction through the breakdown network during normal operation of the circuit to be protected. In one implementation, the protection circuit includes anti-latching circuitry connected to the breakdown network for preventing the breakdown network from latching on after or during the time power is applied to the supply terminals. To minimize the degradation of DC operating characteristics, the leakage currents, due to the protection circuit, between the first terminal and the positive supply terminal, and between the first terminal and the negative supply terminal cancel each other.

Abstract: A semiconductor input protective device has an NPN type blpolar transistor and an N-channel MOS transistor. In the NPN type bipolar transistor, the collector is connected to a signal line and the emitter and the base are commonly connected to a ground line. In the N-channel MOS transistor, either the drain or the source is connected to the signal line and the other of either the drain or the source is connected to the signal line and the gate is connected to either the signal line or the power source line. The N-channel MOS transistor has a threshold voltage higher than the power source voltage. The NPN type bipolar transistor and the N-channel MOS transistor having a thick gate insulation film are used as input protection elements so that, even when a high voltage interface is effected, the function of the protective MOS transistor is not interfered with.

Abstract: A transistor overcurrent protection circuit using an error amplifier to make a voltage comparison between a threshold voltage and the collector voltage of a current sensing transistor. The current sensing transistor is arranged in a circuit such that the collector current of the current sensing transistor is a measure of the collector current of an output transistor. A driver transistor has its emitter connected to the base of the output transistor. A source of control current to the drive transistor is coupled to the output of the error amplifier. When the collector voltage of the current sense transistor falls below the threshold voltage, the error amplifier causes the control current to the drive transistor to be reduced so as to reduce the collector current of the output transistor.

Abstract: A protective circuit for connecting contacts of monolithic integrated circuits, particularly CMOS input/output stages. The protective circuit has a four-layer device (ta, ts) with a defined switching threshold in the area of each connecting contact (A) and a low-resistivity current path (sa) from the connecting contact (A) to a supply terminal (VSS, VDD). The protective circuit also contains devices (zw2, z5) which prevent or provide a bypass for any undesired flow of current (i3, i4) between at least parts of the four-layer device and triggerable circuit regions (W2).

Abstract: Load driver system (10) preferably uses a microprocessor controller (20) to generate write/read signals and command signals received by a circuit at write/read and command/status input terminals (16, 17). The circuit (15) responds to the input signals and controls a semiconductor switch (11) that controls the operative state of a load (14). The circuit (15) includes a load shorted high detector (28), a load shorted low detector (29) and a load open detector (30) which are used to detect various faults and provide a predetermined sequence of logic states at the command/status input terminal (17) during read cycles implemented by the controller (20). Thus one input line (terminal 17) is used to both send commands to the semiconductor switch (11) and receive a sequence of logic states indicative of various fault modes. This permits the controller to determine which of several types of faults, if any, has occurred, while minimizing the number of controller-circuit interconnections.

Abstract: This overload protection circuit capable of sustaining high capacitive load or any other load which may create an important inrush current, comprises a differential bridge composed of high impedance measuring resistors (R1, R1' R3, R3'), a low impedance sensing resistor (R2), and a timing and control circuit (20) including a transistor (T2), a capacitor (C1) and resistors that controls a switch (T1) and limits the inrush current of the subcircuit capacitor by slowing the closing of the switch. In case of defaults, the switch will be opened fast enough to minimize the fault transient transfer from down-stream to up-stream of the protection circuit. In addition, a comparator (32) associated to a resistor (R31) providing an hysteresis enables to avoid the oscillations in the region of the system transition from on to off states and vice versa. This circuit can be used in a system which comprises a secondary power supply unit (9) which powers a plurality of subcircuits (22).

Abstract: A memory card with a memory element utilizing a CMOS type electric field effect transistor comprises an overcurrent detecting device for detecting the size of current flowing through a power source circuit in order to immediately stop an overcurrent through the power source circuit when a latch-up phenomenon occurs in the memory element and a switch to open the power source circuit when the overcurrent is detected.

Abstract: A circuit utilizable for protecting an integrated circuit feature from electrostatic discharge is disclosed. A first bipolar transistor has its emitter connected to the IC feature and its collector connected to ground. A second bipolar transistor has its emitter connected to the IC feature and its collector connected to its base and to the base of the first bipolar transistor. A field effect transistor has its gate and drain connected to the IC feature and its body connected to its source and to the collector and base of the second bipolar transistor and to the base of the first bipolar transistor. A diode has its cathode connected to the body and the source of the field effect transistor and to the collector and base of the second bipolar transistor and to the base of the first bipolar transistor.

Abstract: A current limit circuit for protection of an intelligent power switch includes a series circuit of a sense transistor and a sense resistor coupled to the power semiconductor transistor switch so that the sense resistor current is a fraction of, and is proportional to, the power transistor current. A pull-down transistor is coupled to the control electrode of the power transistor switch. A feedback circuit including a series connection of a diode-connected transistor and a reference V source is coupled between the sense resistor and the control electrode of the pull down transistor. The feedback circuit produces a voltage level shift and the circuit provides an accurate limit on the power transistor current independent of any variations in threshold voltage.

Abstract: A power supply interlock technique for an electronic system which uses metal oxide semiconductor (MOS) logic circuits require two or more different supply voltages, and where each circuit board module contains its own power supplies. An open-collector enable signal is both controlled and sensed by each of the modules. The enable signal is set true when all of the supplies in the system are operating properly. However, the enable signal is set false by any one of the modules if one of the higher voltage supplies on that module is malfunctioning. The enable line also controls the lower voltage power supplies in each module. None of the lower voltage power supplies is thus permitted to operate until the enable line is set true, which occurs only when all of the modules indicate they have an operating high voltage supply available. As a result, latch-up of parasitic transistors in the circuits which drive logic signals on a system bus is avoided.

Abstract: Emitter-base protection for a first bipolar transistor formed as part of a BiCMOS circuit. A second bipolar transistor is formed in the same well as the first bipolar transistor with both transistors using the well as their collectors. A current path through the collector-emitter of the second transistor provides current to the base of the first transistor maintaining the emitter-to-base voltage of the first transistor at a relatively low reverse potential.

Abstract: A power loss protection system for use in a system having a spinning momentum wheel and connected to a power bus. The inventive system (10) isolates a protected circuit from the power bus (11) in the event of a system power loss and converts and regulates power taken from the kinetic energy stored in the spinning momentum wheel to a voltage sufficient to maintain operation of the protected circuit. In a most general sense, the inventive system includes a power loss detector (21) for detecting a power loss in the system bus and providing a first signal in response thereto and a regulator (26) for regulating the voltage derived from the momentum wheel energy to the protected circuit in response to the first signal.

Abstract: A solid state circuit interruption arrangement monitors a current path to provide protection to both a load and a solid state switch. The arrangement includes an energy absorber for absorbing energy from the current path in response to the solid state switch interrupting the current path, and a control circuit for periodically generating the interrupt signal to interrupt the current path for prescribed intervals and to control the current supplied to the load between a maximum current level and a minimum current level.

Abstract: A sensitive and fast low voltage lamp system controller to provide safe operation of "bare wire" systems that are particularly attractive for use in exhibition and tradeshow booth lighting. The high sensitivity is achieved by emphasizing high frequency noise present during shorts and by proportionately limiting the instantaneous current that tracks the line AC voltage waveform; fast response is provided by a power FET coupled to a bridge rectifier in series with the load and both then in series with a protection relay.

Abstract: A circuit limits the output drive current from an interface drive circuit comprising drive transistors. The circuit makes dual use of an external series supply resistor as a current sensing element. The increased voltage drop across the external resistor due to excessive current draw through the drive transistors is coupled to a control transistor, which reduces base drive current to the drive transistors in response to the increased voltage drop.

Abstract: A fail-safe control system for operating a power relay to energize an electrical load such as a resistive heating element in a cooking apparatus includes first and second driving transistors connected in series with the control winding of the power relay and a source of power. A logic circuit, such as a microcomputer, produces pulses having specified characteristics at a single output port in order to energize the control winding. A circuit interconnecting the output port of the logic circuit with the driving transistors includes a first branch connected with the first transistor and a second branch connected with the second transistor. The first branch of the circuit includes an operational amplifier connected by a capacitor with the logic circuit output port in a manner that the first branch will drive the first transistor for a sufficiently long period of time initially in order to energize the relay control winding and cause the power relay to pull in.

Abstract: A MOSFET semiconductor device has a surge protecting element comprising a transistor element having a gate electrode, a source electrode, and a drain electrode. A Zener diode having a cathode electrode and an anode electrode is connected to the drain electrode of the transistor element. A lateral MOSFET element has a gate electrode and a drain electrode connected to the anode electrode of the Zener diode, a source electrode connected to the gate electrode of the transistor element, and a back gate electrode connected to the source electrode of the transistor element.

Abstract: A circuit breaker comprises a static switch electrically connected in series with a disconnecting switch having an operating mechanism with a handle to close and open a system of main contacts. A voltage sensor ocmprises an electromagnet with a moving core capable of occupying an active locking position and an inactive unlocking position of the mechanism, respectively in the on state and in the off state of the switch. Opening of the disconnecting switch is inhibited if voltage is present on the output terminals.

Abstract: A power MOS transistor and a current sensing MOS transistor have a common drain electrode connected to a load. The gates of these MOS transistors are commonly controlled in response to an input control signal. A load current sensing resistor element is connected between the source electrodes of these transistors. A voltage signal sensed by the load sensing resistor element is amplified by a differential amplifier constituted by a pair of depletion type MOS transistors. The amplified output controls the MOS transistors, and the MOS transistors variably control a voltage of the input control signal to be supplied to the power and current sensing MOS transistors. The power MOS transistor, the current sensing MOS transistor, the depletion MOS transistor, the current control MOS transistor, and the like have the same conductivity type.

Abstract: A circuit for the surveillance of the switching state of a power transistor is constructed such that both, the voltage applied to the power transistor (1) is surveyed by way of a voltage comparator (7), as well as the voltage applied to the load (3) is surveyed by way of a further voltage comparator (8). The comparator (7) in the switched-on state and the comparator (8) in the switched-off state are activated by the input signal (U.sub.IN) of the power transistor (1). The output signals of the two comparators (7, 8) are combined to a status signal (U.sub.Stat). It is possible by way of the proposed circuit to recognize both a short circuit or, respectively, a shunt circuit of the load as well as a leakage current of the power transistor (1) and thus an interruption of the load occurs.

Abstract: A power MOS transistor, including source, drain, and gate electrodes, comprises a substrate of a semiconductor material of one conductivity type having first and second opposed surfaces; a drain region extending through the substrate between the surfaces; a plurality of spaced body regions of the opposite conductivity type extending into the substrate from the first surface; and a source region of the one conductivity type extending into the substrate from the first surface within each of the body regions, the interface of each of the source regions with its respective body region at the first surface being spaced from the interface of its respective body region and the drain region at the first surface to form a channel region therebetween. A gate electrode overlies and is insulated from the first surface and extends across the channel regions. A conductive electrode extends over and is insulated from the gate electrode, and contacts at least a portion of the source regions.

Abstract: A MOS transistor (Q.sub.M) detects an increase of the collector current (I.sub.C) of an IGBT device (Q.sub.O). When an excess current passes, the transistor (Q.sub.M) turns on, which restricts the gate voltage (V.sub.G) of the IGBT device (Q.sub.O) to decrease the collector current (I.sub.C). This protects the IGBT device (Q.sub.O) from the excess current. A Zener diode (D.sub.Z) placed on a path which is for detecting the excess current of the IGBT device (Q.sub.O) restricts the current passing through the path. This decreases reactive power which is consumed in protecting the device (Q.sub.O) from the excess current while protecting a drive circuit from an erroneous operation.

Abstract: An integrated circuit includes an output circuit, a conducting circuit, a trigger voltage generator and a connecting circuit. The output circuit has an input terminal and an output terminal and sets the output terminal to a high potential corresponding to logic "1" when the potential applied to the input terminal corresponds to logic "0". On the other hand, when the potential applied to the input terminal corresponds to logic "1", the output circuit sets the output terminal to a low potential corresponding to logic "0". The conducting circuit conducts and passes a current from the output terminal when the potential of the output terminal becomes equal to a predetermined potential higher than the high potential. The trigger voltage generator generates a trigger voltage proportional to the current passing through the conducting circuit when it conducts.

Abstract: A built in current sensor on a unitary substrate with an integrated circuit is provided to sense abnormal quiescent current flow through the integrated circuit after a timing phase as an indication of defects such as shorts and open circuits, while ignoring normal high current peaks. A comparator is provided along with an adjustable reference current to provide a virtual ground voltage which represents that induced by a normal quiescent current through a fault-free integrated circuit. A breaker circuit may be provided for indication, or power disconnection of the integrated circuit, upon the occurrence of current flow above a predetermined value.

Abstract: An inrush current limiting circuit in accordance with the principles of the present invention limits initial current flow to a highly initially reactive power load. The current limiting circuit comprises a plug in connection to a power source and two conductor paths leading from the plug in connection. A power FET has a source element to drain element path in series with one of the conductor paths and has a gate connection. A bipolar transistor is connected to shunt the gate element of the power FET to the potential at its source element when the bipolar transistor is conducting, thereby to limit the current passing through the power FET. A sense resistor is in series with one of the conductor paths for controlling a base element of the bipolar transistor to cause it to conduct when current through the sense resistor exceeds a predetermined amount.