Abstract: A composite electronic component includes: a composite body in which a multilayer ceramic capacitor and a ceramic chip are coupled to each other. The multilayer ceramic capacitor includes a first ceramic body, and first and second external electrodes disposed on both end portions of the first ceramic body. The ceramic chip includes a second ceramic body disposed on a lower portion of the multilayer ceramic capacitor, and first and second terminal electrodes disposed on both end portions of the second ceramic body and connected to the first and second external electrodes. A width of first regions of the second ceramic body in which the first and second terminal electrodes are disposed is wider than a width of a second region of the second ceramic body between the first regions.

Abstract: A thin film capacitor includes: a body formed by alternately stacking first and second electrode layers, with dielectric layers therebetween on a substrate. A plurality of first vias are disposed in the body and electrically connected to the first electrode layers. A plurality of second vias are disposed in the body, electrically connected to the second electrode layers, and disposed alternately with the first vias. A first connection electrode is disposed on an upper surface of the body and connected to the plurality of first vias, a second connection electrode is disposed on the upper surface of the body and connected to the plurality of second vias, and first and second electrode pads are disposed on the first and second connection electrodes, respectively, and formed to not overlap the plurality of first and second vias.

Abstract: A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.

Abstract: An electronic component includes a laminated body including first and second end surfaces, first and second side surfaces, and first and second principal surfaces, a first external electrode, and a second external electrode, in which the first external electrode includes a first fired electrode layer and a first resin layer, the second external electrode includes a second fired electrode layer and a second resin layer, each of the first fired electrode layer and the second fired electrode layer is provided on the laminated body and includes a region including voids and glass, each of the first resin layer and the second resin layer includes metal particles, and a surface layer of each of the first resin layer and the second resin layer has a portion of the metal particles exposed in a ratio of about 72.6% or more and about 90.9% or less.

Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes alternately disposed with the dielectric layer interposed therebetween, and first and second external electrodes disposed on one surface of the body and respectively connected to the first and second internal electrodes. The first internal electrode includes a first main portion and a first lead out portion connecting the first main portion and the first external electrode, the second internal electrode includes a second main portion and a second lead out portion connecting the second main portion and the second external electrode, and the second main portion has a greater area than the first main portion and includes a corner portion defining an open space to compensate for a capacitance formed by an area in which the first lead out portion and the second main portion overlap each other.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked wherein: a concentration of a rare earth element of at least one of an end margin region and a side margin region is lower than that of a capacity region; a total concentration of Si and B of the at least one of the end margin region and the side margin region is higher than that of the capacity region.

Abstract: A ceramic electronic device includes a chip component and a pair of metal terminals. The component includes a rectangular-parallelepiped element body having dielectrics and internal electrodes and a pair of terminal electrodes covering end surfaces of the body and a part of side surfaces of the body. The pair of metal terminals respectively has an engagement arm portion configured to hold the component. The terminal electrode includes first and second side surfaces. The first side surface has a predetermined side-surface electrode thickness. The second side surface is disposed farther from the end surface of the body than the first side surface and has the side-surface electrode thickness which is smaller than that of the first side surface. The arm portion contacts with the component at a position that is farther from the end surface of the body than the first side surface.

Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit and a cover. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers and mainly containing nickel. The cover covers the capacitance forming unit from the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The internal electrodes each include an oxidized area adjacent to the side margin and intensively including a metal element that forms an oxide together with nickel. The capacitance forming unit includes a first portion adjacent to the cover and a second portion adjacent to the first portion in the first direction and including the oxidized area having a smaller dimension in the second direction than that of the oxidized area of the first portion.

Abstract: An electronic component includes: a multilayer ceramic capacitor including a capacitor body and external electrodes disposed on opposite ends of the capacitor body in a first direction, respectively; and an interposer including an interposer body including a woven glass fiber material and external terminals disposed on opposite ends of the interposer body in the first direction, respectively. An angle between a weaving direction of the woven glass fiber material and the first direction is 0° to 10° or 80° to 90°.

Abstract: A ceramic electronic component which is easily downsized, has reduced difficulty in handling, and is hardly chipped in a chip; and a method for producing the ceramic electronic component. The method includes the steps of: forming an uncured ceramic pattern which forms a ceramic layer after firing and has a circular plane shape by applying a ceramic slurry, which contains a ceramic material, to a predetermined location one time or a plurality of times repeatedly using a non-contact-type printing device such as an ink-jet printer; and forming uncured internal electrode patterns which form internal electrodes after firing and each have a circular plane shape by applying an electrode paste, which contains an internal electrode material, to a predetermined location one time or a plurality of times repeatedly using an ink-jet printer.

Abstract: A multi-layer ceramic electronic component includes: a ceramic body including first and second main surfaces oriented in a first axial direction, first and second end surfaces oriented in a second axial direction orthogonal to the first axial direction, a first internal electrode, and a second internal electrode, the ceramic body being formed to be long in a third axial direction orthogonal to the first and second axial directions; a first external electrode including a first cover portion and a first extension portion; and a second external electrode including a second cover portion and a second extension portion, the multi-layer ceramic electronic component satisfying that, when T1 represents a dimension of the ceramic body in the first axial direction, and when T2 represents a dimension of each of the first and second extension portions in the first axial direction, T1 is 80 ?m or less and T2/(T1+T2) is 0.32 or less.

Abstract: A ceramic electronic component includes a body including dielectric layers and a plurality of internal electrodes disposed to face each other while having each of the dielectric layers interposed therebetween; and external electrodes including a connection portion disposed on end surfaces of the body opposing each other and band portions extending onto portions of upper and lower surfaces of the body from the connection portion, wherein the external electrodes include electrode layers connected to the plurality of internal electrodes, conductive resin layers disposed on the electrode layers, Ni plating layers disposed on the conductive resin layers, and Sn plating layers disposed on the Ni plating layers, and tc1 is 0.5 ?m or more and tc2/tc1 is 1.2 or less, in which a thickness of the Ni plating layer in the connection portion is “tc1” and a thickness of the Ni plating layer in the band portion is tc2.

Abstract: A Dense Energy Ultra Cell (DEUC), a dielectric energy storage device and methods of fabrication therefor are provided. A DEUC element is fabricated using print technologies that deposit dielectric energy storage layers (406) and insulating layers (404) together being interleaved between electrode layers (403). The dielectric energy storage layers are created from a proprietary solution to enable printing of dielectric energy storage layers with high permittivity and a high internal resistivity to retain charge. The insulating layers (404) can be applied within the dielectric energy storage layers (406) bifurcating the dielectric energy storage layers for increased resistivity. As part of the fabrication process, the material deposition printer can apply multiple print heads each with different inks and materials (1301, 1302) to form composite material (1303) in the printed layers.

Abstract: A multilayer ceramic electronic component includes a body with a plurality of first and second internal electrodes alternately arranged with dielectric layers interposed therebetween. There may be M each of third and fourth external electrodes on opposing sides of the body, where M is greater than or equal to 3 and all external electrodes have different polarities than the adjacent external electrodes. There may be N via electrodes penetrating through the body, where N is greater than or equal to 3 and the via electrodes are connected to either of the first or second internal electrodes. The multilayer ceramic electronic component may achieve low equivalent series inductance (ESL) characteristics and may reduce the mounting area on the circuit board.

Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween. One end of each of the first and second internal electrodes extends, respectively, to a third or fourth surface of the capacitor body. First and second external electrodes respectively include first and second connected portions disposed on the third and fourth surfaces, and first and second band portions respectively extended from the first and second connected portions to portions of a first surface of the capacitor body. A first connection terminal is disposed on the first band portion to provide a first solder accommodating portion, and a second connection terminal is disposed on the second band portion to provide a second solder accommodating portion.

Abstract: A composite electronic component includes: a body part including a dielectric portion; first and second external electrodes disposed on outer surfaces of the body part; a plurality of first and second electrodes disposed inside of the dielectric portion, and electrically connected to the first and second external electrodes, respectively; third and fourth electrodes disposed on an upper portion of the dielectric portion, and electrically connected to the first and second external electrodes, respectively; a gap provided between the third and fourth electrodes; a groove disposed below the gap; and an electrostatic discharge (ESD) layer disposed in the gap.

Abstract: An electronic component includes a first inductor which is provided on a first direction side relative to a first main surface, which includes one or more first inductor conductive layers having substantially a spiral shape when viewed from the first direction side, and which includes a first end portion and a second end portion; a first outer electrode and a second outer electrode provided on a surface different from the first main surface of a substrate; and a first surface mounted electronic component which is provided on the first direction side relative to the first inductor, which overlaps the first inductor when viewed from the first direction side, and which includes a third outer electrode and a fourth outer electrode.

Abstract: Disclosed herein are system, method, and computer program product embodiments for providing an efficient way to signal a tone mapping in a wireless communication protocol. Embodiments operate by receiving a frame for a wireless communications protocol. The embodiments extract a unique value from a tone mapping field in a preamble of the frame. The embodiments look up a resource block allocation for a portion of the tone space in a lookup table using the unique value. The embodiments map the tones of the portion of the tone space to one or more resource blocks based at least in part on the determined resource block allocation.

Abstract: The invention relates to a capacitive structure comprising: first and second components, at least one component comprising a plurality of capacitive layers of a dielectric, each layer arranged between electrodes of different polarity, wherein the first and second components are arranged in a stack separated by a stress reducing layer having a supporting structure with an open mesh in which air acts to reduce the transmissibility of cracks through the stress reducing layer.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which dielectric layers and internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first edge face and a second edge face; and side margin regions that cover edge portions to which the plurality of internal electrode layers extend toward two side faces and have a structure in which a first ceramic layer and a second ceramic layer are alternately stacked in a stacking direction of the internal electrode layer and the dielectric layer, an amount of a second-phase of the first ceramic layer being larger than that of the second ceramic layer, a main component of the second-phase being SiO2 or a combination of SiO2 and B2O3, wherein a content ratio of the second-phase of the first ceramic layer is 15% or more and 45% or less.

Abstract: There are provided a multilayer ceramic capacitor and a board having the same. The multilayer ceramic capacitor includes: three external electrodes disposed to be spaced apart from one another on a mounting surface of a ceramic body; first internal electrodes each including first and second lead portions connected to the outermost external electrodes, respectively; and second internal electrodes each including a third lead portion connected to the middle external electrode, in which a first region in which the first internal electrodes are laminated is disposed in a central portion of the ceramic body in a width direction of the ceramic body, and second regions in which the first and second internal electrodes are alternately laminated are disposed on both sides of the intervening first region in the width direction of the ceramic body.

Abstract: A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X?Y?1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.

Abstract: A multilayer capacitor includes a capacitor body including a first capacitance forming region and a second capacitance forming region disposed to face each other with a connection region of a predetermined thickness in which an internal electrode is not formed disposed therebetween, a thickness of the first capacitance forming region being greater than a thickness of the second capacitance forming region. The first capacitance forming region includes first and second internal electrodes. The second capacitance forming region includes a third and fourth internal electrodes. The connection region includes at least one dummy electrode disposed to have a shorter average distance to the first capacitance forming region than to the second capacitance forming region.

Abstract: A power capacitor unit for high-pressure applications is provided. The power capacitor unit includes a housing, a plurality of capacitor elements connected to each other and arranged inside the housing, a dielectric liquid (L), a solid electrical insulation system arranged to electrically insulate each capacitor element, a busbar, a plurality of fuse wires, each fuse wire having a first end connected to a respective capacitor element and a second end connected to the busbar (B), wherein the capacitor elements, the solid electrical insulation system, and the fuse wires are immersed in the dielectric liquid (L). Each fuse wire has a plurality of first sections that are in physical contact with the electrical insulation system, and wherein each fuse wire has a plurality of second sections without physical contact with the solid electrical insulation system.

Abstract: An electronic component includes a first outer electrode, a second outer electrode, a third outer electrode, and a fourth outer electrode which are provided to correspond to four corners of a second main surface; a fifth outer electrode which is provided on the second main surface; a multilayer body; a first inductor which includes a first end portion and a second end portion; and a first surface mounted electronic component which is mounted on the multilayer body and which includes a sixth outer electrode and a seventh outer electrode. The first end portion is electrically connected to the first outer electrode. The second end portion is electrically connected to the second outer electrode and the sixth outer electrode. The seventh outer electrode is electrically connected to the fifth outer electrode.

Abstract: A multilayer ceramic capacitor includes a ceramic body in which a plurality of dielectric layers are layered in a width direction, an active part including a plurality of first and second internal electrodes alternately exposed to opposing end surfaces of the ceramic body with the dielectric layer interposed therebetween to form capacitance, an upper cover part provided on an upper surface of the active part, a lower cover part provided on a lower surface of the active part and having a thickness greater than that of the upper cover part, and first and second external electrodes formed to cover opposing end surfaces of the ceramic body, wherein a ratio of the cube root of the volume of the active part to the thickness of the lower cover part is between 1.4 and 8.8.

Abstract: A composite electronic component includes a body having first and second external electrodes disposed on outer surfaces thereof and including a dielectric body; first and second electrodes disposed in the dielectric body and electrically connected to the first and second external electrodes, respectively; a third electrode disposed on the body and electrically connected to the first external electrode; an electrostatic discharge (ESD) layer disposed on the third electrode; and a fourth electrode disposed on the ESD discharge layer and electrically connected to the second external electrode.

Abstract: A power conversion device includes an input conversion module, an output conversion module, a filtering module and a controlling module, which are installed on a main board. The main board includes a first edge, a second edge, a third edge and a fourth edge. The first edge and the second edge are opposed to each other. The third edge and the fourth edge are opposed to each other. A first part of the input conversion module is located near the first edge and the third edge. A second part of the input conversion module is near the first edge and the fourth edge. An airflow channel is formed between the first part and the second part. The output conversion module is near the second edge. The filtering module is near the second edge. The controlling module is arranged between the first part and the third edge.

Abstract: A laminated ceramic electronic component provided with a component main body formed by alternatively laminating multiple dielectric ceramic layers and multiple internal electrode layers, and external electrodes disposed on the end faces where the internal electrode layers of the component main body are exposed, wherein at least a part of the multiple internal electrode layers exposed on the end faces of the component main body are provided with end-face electrode portions that connect the adjacent internal electrode layers, the connecting portions are present between the end-face electrode portions and the dielectric ceramic layers that contact with the end-face electrode portions, and the external electrodes are disposed so that the end-face electrode portions are covered.

Abstract: The composite electronic component includes: a multilayer capacitor; an electrostatic discharge (ESD) protecting element; and first to fourth conductive resin layers, The multilayer capacitor includes: a capacitor body including dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes connected to exposed portions of the first internal electrodes; and third and fourth external electrodes connected to exposed portions of the second internal electrodes. The ESD protecting element includes: a discharge portion disposed on the first surface of the capacitor body to be connected to the first to fourth external electrodes; and a protective layer. The first to fourth conductive resin layers are formed on the first to fourth external electrodes, respectively, and extend to portions of a first surface of the protective layer, respectively.

Abstract: A composite electronic component includes an electronic element and a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, a protective film and first and second upper surface conductors. The first and second upper surface conductors are separated from each other in the length direction and the resistor is between the first and second upper surface conductors. The protective film covers the resistor. Dimensions in the height direction from the upper surface of the base portion to exposed surfaces of a pair of end portions in the length direction of the protective film are smaller than a dimension in the height direction from the upper surface of the base portion to an exposed surface of the protective film in the center portion.

Abstract: A high density multi-component package is provided. The package has at least two electronic components wherein each electronic component comprises a first external termination and a second external termination. At least one first adhesive is between adjacent first external terminations of adjacent electronic components. At least one second adhesive is between the adjacent electronic component and at least two adjacent electronic components are connected serially. The first adhesive and second adhesive are independently selected from a high temperature conductive adhesive and a high temperature insulating adhesive.

Abstract: A composite electronic component composed of a composite body including a capacitor and an electrostatic discharge (ESD) protection device coupled to each other. The capacitor includes a ceramic body in which a plurality of dielectric layers and internal electrodes are stacked with a respective dielectric layer therebetween. The ESD protection device includes first and second electrodes disposed on the ceramic body, a discharging part disposed between the first and second electrodes, and a protective layer disposed on the first and second electrodes and the discharging part. An input terminal disposed on a first end surface of the composite body and is connected to internal electrodes and the first and second electrodes. A ground terminal formed on a second end surface of the composite body and is connected to internal electrodes and the first and second electrodes.

Abstract: The present invention provides a substrate assembly includes at least two ceramic layers, at least two layers of one or more electrodes, at least one high dielectric constant layer, two or more holes, electrically conductive structures formed in the two or more holes, and the electrically conductive structure is physically connected to at least one of the electrodes, thereby forming a set, wherein each of the sets if physically separated from at least one of the other sets. A process includes cutting ceramic sheets, removing material from the ceramic sheets to form holes, depositing a metallic material into the holes, depositing the metallic material to form electrodes, selectively depositing a thin layer of high dielectric constant material, and firing the ceramic sheets, the metallic material, the high dielectric constant material layer, and the electrodes.

Abstract: A chip-type electronic component 1a mounted on a board includes a chip element assembly 2 having an upper surface, a lower surface, and a side surface; inner electrodes 3a, 3b, and 3c formed inside the chip element assembly 2; and a cover layer 5 that is formed with an insulation material having a lower permittivity than the chip element assembly 2 and is so provided as to cover at least part of the side surface of the chip element assembly 2. With this structure, unnecessary stray capacitance between the inner electrodes 3a, 3b, and 3c formed inside the chip element assembly 2 and other electrode members arranged outside the cover layer 5 in a direction orthogonal to a thickness direction of the chip element assembly 2 can be reduced, whereby the chip-type electronic component 1a capable of realizing the desired characteristics can be provided.

Abstract: In a width direction of a ceramic laminate, one end portion of a first internal electrode and one end portion of a second internal electrode each include metal phases of a Ni region, a Ni—O region, and a Ni—O—Mg region disposed in this order from a first internal electrode side and a second internal electrode side, respectively, to a first side surface of the ceramic laminate. The other end portion of the first internal electrode and the other end portion of the second internal electrode each include metal phases of a Ni region, a Ni—O region, and a Ni—O—Mg region disposed in this order from the first internal electrode side and the second internal electrode side, respectively, to a second side surface of the ceramic laminate.

Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a fabricated thin film capacitor formed by depositing a first dielectric layer on a first electrode layer utilizing a first process that is performed at a first temperature, depositing a second dielectric layer on the first dielectric layer utilizing a second process that forms a randomly-oriented grain structure for the second dielectric layer, depositing a third dielectric layer on the second dielectric layer utilizing a third process that is performed at a second temperature and that forms a columnar-oriented grain structure for the third dielectric layer where the second temperature is higher than the first temperature, and depositing a second electrode layer on the third dielectric layer to form the thin film capacitor. Other embodiments are disclosed.

Abstract: A multilayer ceramic capacitor includes a stacked body including a stack of a plurality of dielectric layers and a plurality of internal electrodes, and a pair of external electrodes. In the stacked body, a width dimension is greater than a thickness dimension, a length dimension preferably is about 0.4 mm or less, a width dimension preferably is about 0.15 mm or more and about 0.35 mm or less, a thickness dimension preferably is about 0.2 mm or less, and each of the internal electrodes is made of Cu or Ag as a main component and has a width dimension that is about 60% or more of the width dimension of the stacked body.

Abstract: A manufacturing method for a multilayer capacitor includes alternately laminating dielectric layers and conductor layers including less than 50 included in a first arrangement and a second arrangement different from the first arrangement when viewed from a lamination direction to form a laminate in which at least one pair of the conductor layers adjacent to each other with the dielectric layer interposed therebetween are included in the first or second arrangement, pressing the laminate to stretch the conductor layers in a direction perpendicular or substantially perpendicular to the lamination direction, pressing the laminate to bend the conductor layers in the lamination direction, and forming first and second outer electrodes on laminate surfaces such that the first outer electrode is connected to the conductor layers included in the first arrangement and the second outer electrode is connected to the conductor layers included in the second arrangement.

Abstract: A metal-insulator-metal capacitor (MIM cap) includes a dielectric layer disposed over a substrate three contacts. A stacked structure of first and second metal layers separated by high-k dielectrics is disposed over the substrate and contacts. Three vias are formed through the structure to expose each of the three contacts. Selective etching is used to create gaps between the various metal layers at the location of the vias and these gaps are filled with an insulator. The vias are then filled with metal and the MIM cap is constructed such that the metal of the first via is electrically connected to the second metal layers and the metal of the second via is electrically connected to the first metal layers.

Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.

Abstract: A multilayer electronic component and a method of manufacturing the same are provided. The multilayer electronic component includes a body including a multilayer structure in which first internal electrode patterns and second internal electrode patterns different from the first internal electrode patterns are alternately stacked and containing a dielectric material. First and second side parts are disposed on respective outer surfaces of a first pair of opposing outer surfaces of the body. First and second external electrodes are disposed on respective outer surfaces of a second pair of opposing outer surfaces of the body, and the first and second external electrodes are electrically connected to the first and second internal electrode patterns, respectively. The first internal electrode patterns are exposed to the outer surfaces of the first pair of outer surfaces of the body on which the first and second side parts are disposed.

Abstract: A capacitor includes an outer electrode extends over first and second main surfaces from exposed portions of inner electrodes on a first side surface and exposed portions of the inner electrodes on a second side surface. An outermost layer of the outer electrode includes a Cu-plated layer.

Abstract: In a planar view of a ceramic capacitor that has low ESL and is embeddable into a substrate, lengths of first and second external electrodes are L1, lengths from portions of the first and second external electrodes farthest from a capacitor main body to portions closer to the capacitor main body by about 40% of a thickness of the first or second external electrode in a laminating direction are L2, a ratio L2/L1 is about 80% or more and about 90% or less. In the planar view, a length of a third external electrode is L3, a length from a portion of the third external electrode farthest from the capacitor main body to a portion closer to the capacitor main body by about 40% of a thickness of the third external electrode in the laminating direction is L4, a ratio L4/L3 is about 80% or more.

Abstract: A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.

Abstract: A ceramic electronic component includes a laminated body including ceramic layers and conductor layers stacked alternately; and first and second external electrodes provided on portions of the laminated body. Each of the first and second external electrodes includes a sintered metal layer provided on the laminated body, a conductive resin layer covering the sintered metal layer, and a plated layer covering the conductive resin layer. The maximum length of the sintered metal layer provided on the second principal surface is shorter than the maximum length of the sintered metal layer provided on each of the first and second side surfaces.

Abstract: An electronic component includes an element body having a pair of end surfaces opposing each other and a side surface adjacent to the pair of end surfaces, and an external electrode disposed on at least the end surface. The external electrode includes a conductive resin layer located on at least the end surface. A first thickness of the conductive resin layer located on a central region of the end surface is greater than a second thickness of the conductive resin layer located on a peripheral region of the end surface.

Abstract: A length in a third direction of a first connection portion is smaller than a length in the third direction of a first main electrode portion. A length in the third direction of a second connection portion is smaller than a length in the third direction of a second main electrode portion. A thickness in a first direction of an inner layer portion is smaller than each of the length in the third direction of the first connection portion and the length in the third direction of the second connection portion and smaller than each of a gap from a second side surface to the first connection portion in the third direction and a gap from the second side surface to the second connection portion in the third direction. The second side surfaces oppose each other in the third direction perpendicular to the first direction.

Abstract: The present invention relates to a dielectric element such as a thin-film capacitor including a dielectric film. The dielectric film contains a main component represented by the general formula (Ba1-xCax)z(Ti1-yZry)O3 wherein 0<x?0.500, 0<y?0.350, and 0.900?z?0.995. The dielectric film includes a layer containing columnar crystal grains and a layer containing spherical crystal grains, and contains as a sub-component at least one of divalent metal elements and trivalent metal elements.

Abstract: An electronic component includes an electronic element including two outer electrodes on surfaces thereof and a board terminal including a board main body and two mounting electrodes. The board main body has electrical insulating properties and a first principal surface. The two mounting electrodes are disposed on the first principal surface and electrically coupled to the two outer electrodes, respectively. The electronic element is mounted on the first principal surface side. The two outer electrodes are partially disposed outside an outer edge of the board terminal when viewed from the first principal surface side. The height from an end of each of the two outer electrodes opposite the board terminal to an end of the board terminal opposite the electronic element is not greater than a larger dimension of the width of the electronic element and the width of the board terminal.