Abstract: The disclosure describes techniques for detecting a crack or defect in a material. A computing device may determine whether a tested material includes a crack or other defect based on a temperature-scaled control data set and a measurement data set.

Abstract: In order to produce a cost-effective fuse in chip design, which is applied to a carrier substrate made of a Al2O3 ceramic having a high thermal conductivity, and which is provided with a fusible metallic conductor and a cover layer, in which the melting point of the metallic conductor may be defined reliably, it is suggested that an intermediate layer having low thermal conductivity be positioned between the carrier substrate and the metallic conductor, the intermediate layer being formed by a low-melting-point inorganic glass paste applied in the screen-printing method or an organic intermediate layer applied in island printing. Furthermore, a method for manufacturing the fuse is specified.

Abstract: An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.

Abstract: The present invention discloses a capacitor in an integrated circuit which comprises a first and second conductive lines substantially parallel to each other and having a thickness equals substantially to a sum of a via thickness and an interconnect thickness, the first and second conductive lines, the via and the interconnect being formed by a single deposition step, and at least one dielectric material in a space horizontally across the first and second conductive lines, wherein the first and second conductive lines serve as two conductive plates of the capacitor, respectively, and the dielectric material serves as an insulator of the capacitor.

Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10?7 amps/cm2 at from ?1.1V to +1.1V.

Abstract: A complex oxide includes a chemical compound represented by ABO3 (Chemical Formula 1). In the Chemical Formula 1, A is one or more elements selected from Ba, Ca, and Sr; and B is one or more elements selected from Ti, Zr, Hf, and Sn. When a field having a size of 1 ?m×1 ?m on a surface of the complex oxide is observed with an atomic force microscope (AFM), a typical particle size is greater than or equal to 300 nm and less than 660 nm. Here, the typical particle size is a maximum length of a maximum particle observed in the field.

Abstract: A capacitor structure includes a storage node; a capacitor dielectric on the storage node; and a plate electrode on the capacitor dielectric. The capacitor dielectric may include a Si-doped ZrO2 layer or crystalline ZrSiOx with a Si/(Zr+Si) content ranging between 4-9% by atomic ratio. The capacitor structure further includes an interfacial TiO2/TiON layer between the storage node and the capacitor dielectric.

Abstract: Disclosed are an embedded capacitor and a method of fabricating the same. The capacitor includes a metallic substrate, a metallic oxide layer on the metallic substrate, a first electrode layer on a first surface of the metallic oxide layer, and a second electrode layer on a second surface of the metallic oxide layer.

Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.

Abstract: A capacitor containing an electrochemical cell that includes ruthenium oxide electrodes and an aqueous electrolyte containing a polyprotic acid (e.g., sulfuric acid) is provided. More specifically, the electrodes each contain a substrate that is coated with a metal oxide film formed from a combination of ruthenium oxide and inorganic oxide particles (e.g., alumina, silica, etc.). Without intending to be limited by theory, it is believed that the inorganic oxide particles may enhance proton transfer (e.g., proton generation) in the aqueous electrolyte to form hydrated inorganic oxide complexes (e.g., [Al(H2O)63+] to [Al2(H2O)8(OH2)]4+). The inorganic oxide thus acts as a catalyst to both absorb and reversibly cleave water into protons and molecular bonded hydroxyl bridges. Because the anions (e.g.

Abstract: A ceramic electronic component includes a ceramic body and a plurality of external electrodes disposed at a surface of the ceramic body. The external electrodes include a plating layer containing glass particles each coated with a metal film. The plating layer is formed by co-deposition of a plating metal and the metal-coated glass particles.

Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10?7 amps/cm2 at from ?1.1V to +1.1V.

Abstract: A composite dielectric material including an early transition metal or metal oxide base material and a dopant, co-deposited, alloying or layering secondary material, selected from among Nb, Ge, Ta, La, Y, Ce, Pr, Nd, Gd, Dy, Sr, Ba, Ca, and Mg, and oxides of such metals, and alumina as a dopant or alloying secondary material. Such composite dielectric material can be formed by vapor deposition processes, e.g., ALD, using suitable precursors, to form microelectronic devices such as ferroelectric high k capacitors, gate structures, DRAMs, and the like.

Abstract: The dielectric of a capacitor is formed by superposition of at least two thin layers made from the same metal oxide, respectively in crystalline and amorphous form and respectively presenting quadratic voltage coefficients of capacitance of opposite signs.

Abstract: In a method of forming a dielectric layer structure, a precursor thin film chemisorbed on a substrate in a process chamber is formed using a source gas including a metal precursor. The process chamber is purged and pumped out to remove a remaining source gas therein and to remove any metal precursor physisorbed on the precursor thin film. The forming of the precursor thin film and the purging and pumping out of the process chamber are alternately and repeatedly performed to form a multi-layer precursor thin film. An oxidant is provided onto the multilayer precursor thin film to form a bulk oxide layer.

Abstract: Disclosed are an embedded capacitor and a method of fabricating the same. The capacitor includes a metallic substrate, a metallic oxide layer on the metallic substrate, a first electrode layer on a first surface of the metallic oxide layer, and a second electrode layer on a second surface of the metallic oxide layer.

Abstract: An object of the present invention is to provide a method for producing a dielectric film excellent in the deposition stability in forming a high-density dielectric film by an electrophoresis method using a dielectric particle-dispersed slurry in which dielectric particles are dispersed. In order to achieve the object, a method for producing a dielectric film using an electrophoresis method comprising arranging a cathode electrode and an anode electrode in a dielectric particle-dispersed slurry in which the dielectric particles are dispersed and carrying out electrolysis to form a dielectric film on one of the electrodes, wherein the dielectric particles contained in the dielectric particle-dispersed slurry are the calcined dielectric particles.

Abstract: Provided is a surface mounting type high voltage ceramic capacitor with an array structure that may form a plurality of capacitors in an array structure to thereby simultaneously mount the plurality of capacitors on a printed circuit board, and thus may reduce a work procedure and enhance a work productivity. The surface mounting type high voltage ceramic capacitor with an array structure, may include: a ceramic member 11; a common electrode member 12 being formed on one surface of the ceramic member 11; a plurality of individual electrode members 13 being arranged on another surface of the ceramic member 11; a common lead terminal 14 being connected to the common electrode member 12; a plurality of individual lead terminals 15 being connected to the plurality of individual electrode members 13, respectively, to face the common lead terminal 14; and a molding member 16 sealing the ceramic member 11, the common electrode member 12, and the plurality of individual electrode members 13.

Abstract: The invention relates to a method for a complex oxide film having a high relative dielectric constant formed on a substrate surface by wet-treatment method and a production process of the complex oxide film comprising a step of washing the complex oxide film with an acid solution of pH 5 or less to thereby reduce salts in the film. Further, the invention relates to a dielectric material and a piezoelectric material containing the complex oxide film, a capacitor and a piezoelectric element including the material, and a electronic device comprising the element.

Abstract: A nickel oxide co-doped with a first alkali metal dopant and a second metal dopant selected from the group consisting of at least one of tin, antimony, indium, tungsten, iridium, scandium, gallium, vanadium, chromium, gold, yttrium, lanthanum, ruthenium, rhodium, molybdenum, and niobium.

Abstract: Provided are a ferroelectric material having good ferroelectricity and good insulation property, and a ferroelectric device using the ferroelectric material. In the present invention, the ferroelectric material includes a metal oxide having a perovskite-type crystal structure, in which: the metal oxide contains bismuth ferrite whose iron is substituted by manganese, and at least one of a copper oxide and a nickel oxide; the bismuth ferrite is substituted by manganese at a substitution ratio of 0.5 at. % or more to 20 at. % or less with respect to a total amount of iron and manganese; and at least one of the copper oxide and the nickel oxide is added in an amount of 0.5 mol % or more to 20 mol % or less with respect to the bismuth ferrite whose iron is substituted by manganese.

Abstract: The invention is directed to an improved capacitor that reduces edge defects and prevents yield failures. A first embodiment of the invention comprises a protective layer adjacent an interface of a conductive layer with the insulator, while the second embodiment of the invention comprises a protective layer on an insulator which is on a conductive layer.

Abstract: A dielectric layer containing a Zr—Sn—Ti—O film and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. In an embodiment, forming the Zr—Sn—Ti—O film on a substrate includes depositing materials of the Zr—Sn—Ti—O film substantially as atomic monolayers. In an embodiment, electronic devices include a dielectric layer having a Zr—Sn—Ti—O film such that Zr—Sn—Ti—O material is configured as substantially atomic monolayers. Dielectric layers containing such Zr—Sn—Ti—O films may have minimal reactions with a silicon substrate or other structures during processing.

Abstract: A capacitor insulating film includes a laminated structure in which aluminum oxide films and titanium dioxide films are alternately laminated, wherein the titanium dioxide films each have a rutile crystal structure, and the ratio of the total thickness of the aluminum oxide films to the total thickness of the laminated structure ranges from 3 to 8%.

Abstract: High capacitance value capacitors are formed using bimetal foils of an aluminum layer attached to a copper layer. The copper side of a bimetallic copper/aluminum foil or a monometallic aluminum foil is temporarily protected using aluminum or other materials, to form a sandwich. The exposed aluminum is treated to increase the surface area of the aluminum by at least one order of magnitude, while not attacking any portion of the protected metal. When the sandwich is separated, the treated bimetal foil is formed into a capacitor, where the copper layer is one electrode of the capacitor and the treated aluminum layer is in intimate contact with a dielectric layer of the capacitor.

Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.

Abstract: The insulator film of the present invention is suited for use as the insulator material of capacitor elements composing DRAM, is used as the insulator layer of a capacitor element provided with an insulator layer that is interposed between an upper electrode and a lower electrode, and is composed of titanium dioxide to which at least one element from among the lanthanoid elements, Hf and Y is added.

Abstract: A flat type capacitor-use polypropylene film having a Ad(thickness determined by micrometer method—thickness determined by weighing method) of 0.05-0.2 ?m and a lengthwise shrinkage dimensional change rate of 3% or less, or a flat type capacitor-use polypropylene film having a ?d of 0.1-0.3 ?m and a lengthwise F5 value of 50 MPa or more, and a flat type capacitor using it. A film excellent in handling ability in a capacitor element winding process is obtained, and a small, a large-capacity flat type capacitor excellent in withstand voltage characteristics such as self-recovering property, and used suitably under a high rated voltage, is obtained.

Abstract: A solid electrolytic capacitor, fabrication method, and coupling agent utilized in the same. The capacitor includes a valve metal layer, an oxide dielectric layer on at least a part of the surface of the valve metal layer, a coupling layer having a molecular chain with a first end bonding to the oxide dielectric layer by covalent bonding and second end with a functional group of a monomer of a conducting polymer, and a conducting polymer layer bonding to the monomer by covalent bonding.

Abstract: The invention suppresses the occurrence of cracks in a dielectric layer, and improve yield during manufacture of a dielectric device. A dielectric device includes a substrate, a base electrode and a dielectric layer. The base electrode is fixed on the substrate. The base electrode is formed such that a surface of a base electrode edge part has an inclined part. The dielectric layer is fixed on a substrate surface so as to cover the base electrode. The dielectric layer is formed by annealing a deposited layer obtained by spraying a powdered dielectric on the substrate surface. Therefore, a triple point adjacent part, which is a part of the dielectric layer opposite the base electrode edge part, is formed so as to have a dense structure in the same way as other parts.

Abstract: The present invention relates to a capacitor-embedded PCB and a method of manufacturing the same. The capacitor-embedded PCB includes a dielectric layer, a lower electrode layer formed under the dielectric layer, and an upper electrode layer formed on the dielectric layer and configured to have at least one first blind via hole that is inwardly formed.

Abstract: A ceramic powder having a perovskite structure is manufactured by synthesizing a ceramic powder by a dry synthesis process and then heat-treating the synthesized ceramic powder in a solution. The dry synthesis method includes a solid phase synthesis method, an oxalate method, a citric acid method and a gas phase synthesis method.

Abstract: The present invention provides a flash memory integrated circuit and a method of fabricating the same. A tunnel dielectric in an erasable programmable read only memory (EPROM) device is nitrided with a hydrogen-bearing compound, particularly ammonia. Hydrogen is thus incorporated into the tunnel dielectric, along with nitrogen. The gate stack is etched and completed, including protective sidewall spacers and dielectric cap, and the stack lined with a barrier to hydroxyl and hydrogen species. Though the liner advantageously reduces impurity diffusion through to the tunnel dielectric and substrate interface, it also reduces hydrogen diffusion in any subsequent hydrogen anneal. Hydrogen is provided to the tunnel dielectric, however, in the prior exposure to ammonia.

Abstract: This invention relates to a process which produces flat, distortion-free, zero-shrink, low-temperature co-fired ceramic (LTCC) bodies, composites, modules or packages from precursor green (unfired) laminates of three or more different dielectric tape chemistries that are configured in an uniquely or pseudo-symmetrical arrangement in the z-axis of the laminate.

Abstract: The present invention relates to a method of manufacturing a multilayer ceramic capacitor, having the steps of: (a) alternately layering internal electrodes and ceramic green sheets containing a ceramic material having barium titanate to form a laminated body; (b) sintering the laminated body to obtain a sintered body; and (c) forming an external electrode on end faces of the sintered body to obtain a multilayer ceramic capacitor. The barium titanate has a diffraction line derived from (002) plane and a diffraction line derived from (200) plane in an X-ray diffraction chart. The ratio I(200)/Ib of peak intensity I(200) at 2?(200) to diffraction intensity Ib at a midpoint angle between peak angle 2?(002) of the diffraction line derived from the (002) plane and peak angle 2?(200) of the diffraction line derived from the (200) plane is 2 to 10. The product r·Sa of mean particle size r (?m) of the barium titanate and specific surface area Sa (m2/g) is 1 to 2.

Abstract: An interposer, located between an integrated circuit having power, ground and signal connections and a ceramic substrate having power, ground and signal connections, that includes an oxide layer formed on a polished surface of a silicon substrate, a thin film dielectric capacitor formed on the oxide layer, a plurality of metallized that electrically connect to either of the electrodes of the thin film dielectric capacitor, and vias than conduct power, ground and signals between a the ceramic substrate and the integrated circuit. The interposer connects the metallized vias to the integrated circuit by solder connections and also connects the vias conducting power, ground and signals from the ceramic substrate to the interposer by solder connections.

Abstract: An object of the present invention is to provide a laminate for forming a capacitor layer for a printed wiring board which is capable of ensuring a higher capacitance and an inner layer core material using the laminate for example. In order to achieve this object, a material for forming a capacitor layer comprising a three-layered structure of an aluminum layer 2/a modified alumina barrier layer 3/an electrode copper layer 4 is used, such as a laminate 1a for forming a capacitor layer in which the above described modified alumina barrier layer 3 is obtained through subjecting one side of an aluminum plate or aluminum foil to an anodic treatment to form an alumina barrier layer as a uniform oxide layer and then subjecting the alumina material with the above described alumina barrier layer formed thereon to a boiling and modifying treatment in water and the above described modified aluminum barrier layer 3 is used as a dielectric layer.

Abstract: Methods and apparatuses for forming an oxide film. The method includes depositing an oxide film on a substrate using a process gas mixture that comprises a silicon source gas, an oxygen gas, and a hydrogen gas, and a process temperature between 800° C. and 1300° C. During the deposition of the oxide film, the process gas mixture comprises less than 6% oxygen, silicon gas, and predominantly hydrogen.

Abstract: A ceramic electronic part includes a ceramic assemblage containing laminated plural ceramic sheets, plural inner electrodes formed between the ceramic sheets and containing Ni as a major component, and outer electrodes electrically connected to the inner electrodes. The outer electrodes contain Ag as a major component and Au and an inorganic oxide as minor components.

Abstract: A capacitor array includes four internal electrodes and internal electrode extraction sections which are in electrical conduction with the corresponding internal electrodes and have predetermined widths which are symmetrically arranged relative to a long-side-direction center of each dielectric sheet. Here, the internal electrode extraction sections are arranged so that a pitch between the internal electrode extraction sections is smaller than a pitch between the internal electrodes. In other words, the internal electrode extraction sections are arranged so that they are disposed towards the center in the direction in which they are disposed. A predetermined number of dielectric sheets formed in this way are stacked, and dielectric sheets not having electrodes are stacked above and below the stacked predetermined number of dielectric sheets.

Abstract: A method of producing an electronic device including a dielectric layer includes a dielectric ceramic composition containing a main component expressed by a formula of {(Sr1−xCax)O}m.(Ti1−yZry)O2, wherein x fulfills 0≦x≦1.00 and y fulfills 0≦y≦0.20, and producing said dielectric ceramic composition by using a material expressed by a formula of {(Sr1−xCax)O}m′.(Ti1−yZry)O2 wherein the mole ratio m′ fulfills m′<m. It is possible to produce an electronic device, such as a chip capacitor, having excellent resistance to reducing during firing and excellent capacity-temperature characteristics after firing, wherein the insulation resistance is hard to be deteriorated particularly when made to be a thin layer and defect rate of the initial insulation resistance is low.

Abstract: It is an object of the present invention to provide a device having a crystalline oxide layer of complex compound which can form a crystalline thin film with high orientation. The lower electrode 13 comprises tantalum layer 11, titanate layer 12 and platinum layer 6, and PZT thin film 8 is formed on the lower electrode 13. Since titanate layer 12 is formed on the lower electrode 13, crystallinity of the PZT thin film can be improved. Therefore, the “lift-off” method can be used with to no thermal treatment needed when forming the platinum layer 6.

Abstract: A ferroelectric thin film coated substrate is obtained by a producing method of forming a metal oxide buffer layer on a substrate, forming a first crystalline ferroelectric thin film thereon by means of a MOCVD method and forming a second ferroelectric thin film with a film thickness thicker than that of the first ferroelectric thin film thereon by means of the MOCVD method at a temperature lower than that of the first ferroelectric thin film. This producing method makes it possible to produce a ferroelectric thin film, where its surface is dense and even, a leakage current properties are excellent and sufficiently large remanent spontaneous polarization is shown, at a lower temperature.

Abstract: A ceramic electronic component comprising external electrodes having first electrode layers containing at least a noble metal, cuprous oxide, and glass ingredient electrically connected to internal electrodes having a noble metal. As the ceramic electronic components, for example, a multi-layer ceramic capacitor, multi-layer varistor, multi-layer dielectric resonator, multi-layer piezoelectric element, etc. may be mentioned.

Abstract: A modified PbZrTiO3 perovskite crystal material thin film, wherein the PbZrTiO3 perovskite crystal material includes crystal lattice A-sites and B-sites at least one of which is modified by the presence of a substituent selected from the group consisting of (i) A-site substituents consisting of Sr, Ca, Ba and Mg, and (ii) B-site substituents selected from the group consisting of Nb and Ta. The perovskite crystal thin film material may be formed by liquid delivery MOCVD from metalorganic precursors of the metal components of the thin film, to form PZT and PSZT, and other piezoelectric and ferroelectric thin film materials. The thin films of the invention have utility in non-volatile ferroelectric memory devices (NV-FeRAMs), and in microelectromechanical systems (MEMS) as sensor and/or actuator elements, e.g., high speed digital system actuators requiring low input power levels.

Abstract: An upper electrode of an FRAM capacitor is connected to a diffusion layer on the surface of a semiconductor substrate via a contact hole, second interconnecting layer, contact hole, first interconnecting layer, and contact hole. The first interconnecting layer is formed at substantially the same level as the FRAM capacitor. This decreases the depth of the contact hole connecting the first interconnecting layer to the surface of the semiconductor substrate and thereby decreases the aspect ratio of this contact hole. This facilitates processing and filling this contact hole and allows micropatterning.

Abstract: A capacitor comprising a metal oxide dielectric film deposited by chemical vapor deposition includes dissolving at least one organometallic CVD precursor compound in a solvent system including tetrahydrofuran to form a liquid solution; vaporizing the liquid solution including the at least one organometallic compound; and forming the metal oxide dielectric thin film by depositing at least a portion of the at least one organometallic compound from the vaporized solution on a substrate.

Abstract: A monolithic capacitor includes a sintered ceramic body having a sintered ceramic matrix, a plurality of internal electrodes deposited in the thickness direction in the sintered ceramic body, separated by the sintered ceramic matrix, and alternately extending to opposing two side faces of the sintered ceramic body. Top and bottom ceramic layers are provided above and below the sintered ceramic matrix. The sintered ceramic matrix is composed of a reduction-resistant BaTiO3 ceramic. The top and bottom ceramic layers are composed of a reduction-resistant CaZrO3 ceramic. The internal electrodes are composed of a base metal. The monolithic capacitor is suitable for middle- to high-voltage use requiring high withstand voltage.

Abstract: A capacitor for memory devices including a barium strontium titanate system dielectric film, the film being formed from a chemical vapor deposition source material including a liquid solution of respective organometallic compounds of barium, strontium, and titanium dissolved in tetrahydrofuran.

Abstract: Multilayer ceramic chip capacitors which satisfy X7R requirements and which are compatible with reducing atmosphere sintering conditions so that non-noble metals such as nickel, copper, and alloys thereof may be used for internal and external electrodes are made in accordance with the invention. The capacitors exhibit desirable dielectric properties (high capacitance, low dissipation factor, high insulation resistance), excellent performance on highly accelerated life testing, and very good resistance to dielectric breakdown. The dielectric layers preferably contain BaTiO3 as the major component and CaTiO3, BaO, CaO, SrO, Si02, MnO2, Y2O3, and CoO as minor components in such proportions so that there are present 0.1 to 4 mol % CaTiO3, 0.1 to 2 mol % BaO, 0 to 1 mol % CaO, 0 to 1 mol % SrO, 0.1 to 5 mol % SiO2, 0.01 to 2 mol % MnO2, 0.1 to 3 mol % Y2O3, and 0.01 to 1 mol % CoO. The preferred form of the invention may be sintered in the temperature range 1,250 to 1,400° C.