Semiconductive Patents (Class 365/114)
  • Patent number: 5371698
    Abstract: The multi-dimensional optical memory utilizes the wavelength and intensity dimensions to effect a high density record. With incorporation of a broadband light source, scanning monochromator and photo detector array, a high speed random access optical memory system is realized. The system is executed in terms of a silicon based manufacturing technology allowing advantages of low cost and small physical size resulting from photolithographic batch-processing producibility.
    Type: Grant
    Filed: May 13, 1992
    Date of Patent: December 6, 1994
    Inventor: Dale R. Koehler
  • Patent number: 5355127
    Abstract: In a method and apparatus for transferring information in a form of electron beam, an electron beam detector detects the electron beam, and emission of the electron beam from a predetermined electron beam source is controlled in accordance with a signal from the detector upon detection of the electron beam. In the method and apparatus, a deflection electrode is also used to deflect the electron beams according to an electric or magnetic field to perform charge shifting, logical additions, Logical multiplications, image formation, and the like.
    Type: Grant
    Filed: June 24, 1992
    Date of Patent: October 11, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Fumitaka Kan, Kenji Nakamura, Masanori Takenouchi, Naoji Hayakawa, Isamu Shimoda, Masahiko Okunuki
  • Patent number: 5351209
    Abstract: An apparatus for converting optical information into an electrical information signal includes a plurality of one-dimensional conversion arrays arranged in parallel form. Each one-dimensional conversion array has first and second photoelectric conversion structures integrally formed. The first photoelectric conversion structure has photoelectric conversion elements each having a light receiving surface onto which an information light is projected. The second photoelectric conversion structure has photoelectric conversion elements each having a sweep light receiving surface onto which a sweep light is projected. The sweep light has a cross section which simultaneously scans the sweep light receiving surface of one of the photoelectric conversion elements included in each of the one-dimensional conversion arrays.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: September 27, 1994
    Assignees: Ricoh Company, Inc., Agency of Industrial Science and Technology
    Inventors: Yutaka Hayashi, Iwao Hamaguchi, Shunsuke Fujita
  • Patent number: 5272667
    Abstract: There is disclosed an optical information recording apparatus for recording optical information in a phase change type optical recording medium and a method therefor. The order of the atomic arrangement of the optical recording medium is capable of changing between a first state of order thereof and a second state of order thereof higher than the first state. A first light source generates a first light including the optical information and projecting the generated first light on the optical recording medium so as to change the order of the atomic arrangement of the optical recording medium from the first state to the second state and from the second state to the first state, mainly by heating the optical recording medium.
    Type: Grant
    Filed: December 31, 1990
    Date of Patent: December 21, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noboru Yamada, Kenichi Nishiuchi, Eiji Ohno, Nobuo Akahira
  • Patent number: 5262981
    Abstract: A process for the storage of information units in a nanometer range involves producing cup-like pits in a noble-metal surface.
    Type: Grant
    Filed: July 1, 1991
    Date of Patent: November 16, 1993
    Assignee: BASF Aktiengesellschaft
    Inventors: Juergen Rabe, Stefan Buchholz, Harald Fuchs
  • Patent number: 5235542
    Abstract: An apparatus for converting optical information into an electrical information signal includes a plurality of one-dimensional conversion arrays arranged in parallel form. Each one-dimensional conversion array has first and second photoelectric conversion structures integrally formed. The first photoelectric conversion structure has photoelectric conversion elements each having a light receiving surface onto which an information light is projected. The second photoelectric conversion structure has photoelectric conversion elements each having a sweep light receiving surface onto which a sweep light is projected. The sweep light has a cross section which simultaneously scans the sweep light receiving surface of one of the photoelectric conversion elements included in each of the one-dimensional conversion arrays.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: August 10, 1993
    Assignees: Ricoh Company, Ltd., Agency of Industrial Science & Technology
    Inventors: Yutaka Hayashi, Iwao Hamaguchi, Shunsuke Fujita
  • Patent number: 5233556
    Abstract: An optoelectronic memory and logic device has a function of a reset-set flip-flop (RS-FF) or an exclusive-OR (EOR) gate. The RS-FF includes a first and a second optical inverter circuits. The optical inverter circuit includes a parallel connection of a light emitting device and a phototransistor, and a load resistor connected in series. The phototransistor in the first (second) optical inverter circuit receives the light from the lihgt emitting device in the second (first) optical inverter circuit. The RS-FF has high contrast ratio in case of emitting high output power, and operates stably when the load resistance and the bias voltage are fluctuated. The EOR gate comprises a parallel connection of an adder circuit and a multiplier circuit, and a load resistor connected in series. The adder circuit is a series connection of a light emitting device and a first phototransistor. The multiplier circuit is a series connection of a second phototransistor and a third phototransistor.
    Type: Grant
    Filed: January 28, 1992
    Date of Patent: August 3, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenichi Matsuda, Jun Shibata
  • Patent number: 5162819
    Abstract: An information processing apparatus comprises a recording medium having at least an underlying electrode and a photoconductive thin film and having an insulating or semiconducting recording region capable of accumulating an electric charge; and a probe electrode. The invention relates to an information processing method, comprising employing the apparatus; applying a voltage between the underlying electrode and the probe electrode to inject the electric charge into the recording region to record information.
    Type: Grant
    Filed: January 16, 1991
    Date of Patent: November 10, 1992
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kunihiro Sakai, Toshimitsu Kawase, Akihiko Yamano, Ryo Kuroda, Hiroyasu Nose
  • Patent number: 5138572
    Abstract: Recording and erasing optical information can be done by using an alloy film capable of forming two stable crystalline states differing in crystal texture and optical characteristics by being irradiated with optical energies under different conditions. A thin memory film preferably including 60 to 90 atom % of Indium (IN) and 10 to 40 atom % of Bismuth (Bi) is formed on a substrate.
    Type: Grant
    Filed: February 20, 1991
    Date of Patent: August 11, 1992
    Assignee: Fujitsu Limited
    Inventors: Nagaaki Koshino, Miyozo Maeda, Yasuyuki Goto, Itaru Shibata, Kenichi Utsumi, Akira Ushioda, Ken-ichi Itoh, Kozo Sueishi
  • Patent number: 5132934
    Abstract: Method and apparatus for storing digital information in a dense memory structure. A semiconductor substrate has a thin insulating layer formed thereon. Over the thin insulating layer is formed a dielectric charge-storage layer. A piezoelectric bimorph cantilever arm has a tip formed at its free end to access certain memory sites defined by charge-storage regions in the charge-storage layer. To write infromation in the form of charges into a memory site the tip contacts or is in close proximity to the surface of the charge-storage layer and an electric field is applied between the tip and the substrate to induce charges to tunnel through the thin insulating layer into the charge-storage layer where the charges are stored as trapped charges. Information is read from a storage-site by spacing the tip of the cantilever arm a distance from the surface of the charge storage layer and applying an electric field between the tip and the substrate.
    Type: Grant
    Filed: March 13, 1991
    Date of Patent: July 21, 1992
    Assignee: The Board of Trustees of The Leland Stanford Junior University
    Inventors: Calvin F. Quate, Robert C. Barrett
  • Patent number: 5072423
    Abstract: Recording and erasing optical information can be done by using an alloy film capable of forming two stable crystalline states differing in crystal texture and optical characteristics by being irradiated with optical energies under different conditions. The thin memory film preferably includes not more than 60 atom % of Gallium (Ga) and not less than 40 atom % of Antimony (Sb).
    Type: Grant
    Filed: April 4, 1991
    Date of Patent: December 10, 1991
    Assignee: Fujitsu Limited
    Inventors: Nagaaki Koshino, Miyozo Maeda, Yasuyuki Goto, Itaru Shibata, Kenichi Utsumi, Akira Ushioda, Ken-ichi Itoh, Kozo Sueishi
  • Patent number: 5058061
    Abstract: Recording and erasing optical information can be done by using an alloy film capable of forming two stable crystalline states differing in crystal texture and optical characteristics by being irradiated with optical energies under different conditions. The memory film includes 35-45 atom % of indium (In) and 55-65 atom % of antimony (Sb). The memory film may include an additional element M selected from the group consisting of Al, Si, P, S, Zn, Ga, Ge, As, Se, Ag, Cd, Sn, Te, Tl, Pb, Bi, and a combination of these elements, the composition of the memory film being expressed by the formula (In.sub.x Sb.sub.1-x).sub.1-y M.sub.y.
    Type: Grant
    Filed: August 31, 1989
    Date of Patent: October 15, 1991
    Assignee: Fujitsu Limited
    Inventors: Nagaaki Koshino, Miyozo Maeda, Yasuyuki Goto, Itaru Shibata, Kenichi Utsumi, Akira Ushioda, Ken-ichi Itoh, Kozo Sueishi
  • Patent number: 5053992
    Abstract: An integrated circuit chip includes a secure memory element that stores secret data, an opaque layer of material encapsulating the chip, and means for eliminating the secret data from the secure memory element in the event that the encapsulation material is removed from the chip. The eliminating means comprise a protective circuit encapsulated by the encapsulation material and coupled to the secure memory element.
    Type: Grant
    Filed: October 4, 1990
    Date of Patent: October 1, 1991
    Assignee: General Instrument Corporation
    Inventors: Robert C. Gilberg, Chinh Hoang, James E. Smith
  • Patent number: 5050123
    Abstract: An improved shield for an EPROM cell comprising a first and second metalization cover sections along with upstanding elements is disclosed. The invented shield protects selected EPROM cells from exposure to radiation in redundant memory applications. The shielding structure is designed such that radiation incident upon the memory only reaches the cell after traveling a circuitous route defined by the upstanding members. The improvement also increases the reliability of the memory while adding a degree of flexibility to the layout of the cell.
    Type: Grant
    Filed: November 13, 1990
    Date of Patent: September 17, 1991
    Assignee: Intel Corporation
    Inventor: Hernan A. Castro
  • Patent number: 5038322
    Abstract: A method of and a device for sub-micron deforming a surface (15) is described, for example for the purpose of inscribing information. During scanning of the surface the tip (14) of a scanning tunneling microscrope is held at a constant distance from the surface by means of a negative feedback control loop (18) which is controlled by a tunneling current (It) between the tip and the surface, and for forming a pit (21) in the surface (15). The control loop is deactivated and a tip height drive member (8) is energized by means a control voltage (Vpz) whose amplitude increases as a function of time and which has a predetermined final value, such that the tip is lowered into the material.
    Type: Grant
    Filed: February 3, 1989
    Date of Patent: August 6, 1991
    Assignee: U.S. Philips Corporation
    Inventor: Evert J. Van Loenen
  • Patent number: 5038321
    Abstract: An erasable electro-optic storage disk for use in focused laser beam operated data handling systems comprises a semiconductor substrate with a storage layer arranged on top of it that is capable of trapping charge carriers. Electric contacts are connected to the semiconductor substrate and to the storage layer, respectively. An energy barrier with associated depletion zone is formed in the substrate near the interface with the storage layer. Upon simultaneous application of a control voltage to the contacts and of a focused laser beam directed at a storage site, electron pairs are generated in the depletion zone, and charge carriers are transferred towards the interface. This causes a reduction of the depletion zone and thus of the voltage over the depletion zone, and an increase of the field in the storage layer, whereby charge carriers are injected into and trapped in the storage layer; method of recording, reading data and apparatus therefor.
    Type: Grant
    Filed: August 27, 1990
    Date of Patent: August 6, 1991
    Assignee: International Business Machines Corporation
    Inventor: Bart J. Van Zeghbroeck
  • Patent number: 5010517
    Abstract: A semiconductor optical apparatus of the invention has a quantum well super-lattice structure essentially of only direct transition semiconductor or comprising a direct transition semiconductor and an indirect transiton semiconductor. In the semiconductor optical apparatus of the invention, by using an absorption saturation phenomenon of excitions in the direct transition semiconductor constructing the quantum well super-lattice structure, a non-volatile information recording apparatus which can record, reproduce, and erase information at a high speed even at the room temperature or even by irradiating a light of a low intensity is realized.
    Type: Grant
    Filed: November 16, 1988
    Date of Patent: April 23, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Masahito Migita, Tsuyoshi Uda, Osam Kanehisa, Masatoshi Shiiki
  • Patent number: 4947372
    Abstract: Recording and erasing optical information can be done by using an alloy film capable of forming two stable crystalline states differing in crystal texture and optical characteristics by being irradiated with optical energies under different conditions. The memory film includes 35-45 atom % of Indium (In) and 55-65 atom % of antimony (Sb).
    Type: Grant
    Filed: November 30, 1989
    Date of Patent: August 7, 1990
    Assignee: Fujitsu Limited
    Inventors: Nagaaki Koshino, Miyozo Maeda, Yasuyuki Goto, Itaru Shibata, Kenichi Utsumi, Akira Ushioda, Ken-ichi Itoh, Kozo Sueishi
  • Patent number: 4893273
    Abstract: A first insulating film of a light-transmitting material is formed on a channel region between the source and drain regions on a semiconductor substrate. A floating gate electrode is formed on the first insulating film. A second insulating film is formed on the floating gate electrode. A control gate electrode is formed on the second insulating film. An opening is formed to extend through the control gate electrode, the second insulating film, and the floating gate electrode. The opening is filled with a light-transmitting material. Light incident on the memory cell is guided by the material onto the channel region. When light becomes incident on the channel region while predetermined voltages are applied to the control gate electrode and across the source and drain regions, electron-hole pairs corresponding to the amount of light incident on the memory cell are generated in the channel region, and the electrons are trapped in the floating gate electrode.
    Type: Grant
    Filed: March 21, 1986
    Date of Patent: January 9, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiro Usami
  • Patent number: 4864168
    Abstract: A process for controlling an optical pnpn thyristor to be driven comprises a step of applying a train of pulses to maintain a low impedance state of an optical pnpn thyristor which is shifted beforehand to be in the low impedance state by a positive set pulse. Each of the train of pulses is less than in its level than the positive set pulse. When light emission is required for the reading of an information, a positive set pulse is applied to the optical pnpn thyristor. As a result, electric power consumption is reduced during a time storing the information.
    Type: Grant
    Filed: July 25, 1988
    Date of Patent: September 5, 1989
    Assignee: NEC Corporation
    Inventors: Kenichi Kasahara, Yoshiharu Tashiro
  • Patent number: 4832456
    Abstract: An improved optical memory disc is disclosed which has a liquid crystal layer on which information is written by applying electric field. The liquid crystal layer is sectioned into a plurality of concentric tracks by concentric grooves. When information is written or read, an auto-tracking method can implemented by aid of the grooves.
    Type: Grant
    Filed: February 20, 1987
    Date of Patent: May 23, 1989
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Mizunuma
  • Patent number: 4825408
    Abstract: The charge transfer apparatus of the present invention comprises an optical storage medium of either a mixture of several charge transfer compounds of varying redox potential or a single amphoteric organic charge transfer compound capable of undergoing a multistage charge transfer reaction, and a source of optical energy, typically a laser. When the optical energy illuminates a spot on the optical storage medium, the spot switches to one of a plurality of optically detectable states.
    Type: Grant
    Filed: April 7, 1987
    Date of Patent: April 25, 1989
    Assignee: The Johns Hopkins University
    Inventors: Richard S. Potember, Theodore O. Poehler
  • Patent number: 4798958
    Abstract: A method for promoting quantum efficiency (QE) of a CCD imaging sensor for UV, far UV and low energy x-ray wavelengths by overthinning the back side beyond the interface between the substrate and the photosensitive semiconductor material, and flooding the back side with UV prior to using the sensor for imaging. This UV flooding promotes an accumulation layer of positive states in the oxide film over the thinned sensor to greatly increase QE for either frontside or backside illumination. A permanent or semipermanent image (analog information) may be stored in a frontside SiO.sub.2 layer over the photosensitive semiconductor material using implanted ions for a permanent storage and intense photon radiation for a semipermanent storage.
    Type: Grant
    Filed: March 27, 1987
    Date of Patent: January 17, 1989
    Assignee: California Institute of Technology
    Inventors: James R. Janesick, Stythe T. Elliott
  • Patent number: 4774702
    Abstract: A portion of a chalcogenide transformation film in a less reflective phase responds to a low energy laser beam writing pulse by transforming to a crystalline phase. A marmem alloy, secured to the bottom side of the film, responds to a longer erasing pulse of a lower energy laser beam at the same portion by physically stressing the film only at that same portion. The film portion responds to the physical stress by transforming back to a less reflective phase. An optical reader interprets the crystalline phase as a digital logic "1", and the less reflective phase as a digital logic "0".
    Type: Grant
    Filed: July 17, 1987
    Date of Patent: September 27, 1988
    Assignee: LTV Aerospace and Defense Company
    Inventor: Jeffrey A. Giacomel
  • Patent number: 4771169
    Abstract: This invention consists of three separate functional devices fabricated from a single monolithic semiconductor chip. The three devices may be constructed as a unit to work in concert, or any of the three devices may be constructed alone in order to perform its particular operation independently.The three functional devices are: an optical modulator; an optical demodulator; and, an integrated optical logic device operating in unison and utilizing coherent light from a self contained laser diode for transmitting and receiving data and performing extremely high speed logical operations photonically.
    Type: Grant
    Filed: March 18, 1987
    Date of Patent: September 13, 1988
    Inventor: Dewey L. Boatmun
  • Patent number: 4672577
    Abstract: Adjacent memory layers of a multi-layered integrated device as optically coupled, so that data written on one layer can be copied onto its adjacent layers through the optical coupling.
    Type: Grant
    Filed: February 15, 1985
    Date of Patent: June 9, 1987
    Assignee: Hiroshima University
    Inventors: Masataka Hirose, Masamichi Yamanishi, Yukio Osaka, Tadashi Ae, Tadao Ichikawa, Noriyoshi Yoshida, Ikuo Suemune
  • Patent number: 4672578
    Abstract: An information recording method is provided, in which a p- or n-type semiconductor wafer is irradiated with an energetic particle beam such as an electron beam thereby to control, e.g., decreased or increased generation of the surface photovoltage at the irradiated area so that information may be recorded on the wafer.
    Type: Grant
    Filed: February 22, 1984
    Date of Patent: June 9, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Chusuke Munakata, Kunihiro Yagi, Masaru Miyazaki, Shiyouzou Yoneda
  • Patent number: 4665503
    Abstract: A programmable non-volatile memory cell is disclosed that can be written into the "1," "0," or "previous" state in the presence of unfocused illumination, preferrably ultraviolet (UV) light. The programmed state is controlled by low electrical voltages. Once the illumination is removed the programmed state is non-volatile. The memory cell can be fabricated using conventional MOS processing techniques with no additional mask steps. The cell can thus be implemented on virtually all silicon gate nMOS and CMOS processes.
    Type: Grant
    Filed: January 15, 1985
    Date of Patent: May 12, 1987
    Assignee: Massachusetts Institute of Technology
    Inventor: Lance A. Glasser
  • Patent number: 4642799
    Abstract: An optical processor is formed by utilizing a doped electrooptic semiconductor material. By making information in the form of light incident on the crystal, a refractive index change is effected. This information, in the form of a refractive index change, is then read utilizing a second light source.
    Type: Grant
    Filed: November 30, 1984
    Date of Patent: February 10, 1987
    Assignee: AT&T Bell Laboratories
    Inventor: Alastair M. Glass
  • Patent number: 4613519
    Abstract: A method for recording and storing information in a hydrogenated amorphous silicon device, comprising: depositing hydrogenated amorphous silicon on a substrate to form a charge-collection device; and generating defects in the hydrogenated amorphous silicon device, wherein the defects act as recombination centers that reduce the lifetime of carriers, thereby reducing charge-collection efficiency; and thus in the charge-collection mode of scanning probe instruments, regions of the hydrogenated amorphous silicon device that contain the defects appear darker in comparison to regions of the device that do not contain the defects, leading to a contrast formation for pattern recognition and information storage, in the device, which darkened areas can be restored to their original charge-collection efficiency by heating the hydrogenated amorphous silicon to a temperature of about 100.degree. C. to 250.degree. C. for a sufficient period of time to provide for such restoration.
    Type: Grant
    Filed: March 18, 1985
    Date of Patent: September 23, 1986
    Assignee: The United State of America as represented by the United States Department of Energy
    Inventor: Ben G. Yacobi
  • Patent number: 4608668
    Abstract: A semiconductor device comprising a first conductor having first and second portions which are electrically disconnected from each other, and a second conductor, formed on an insulating film separating it from the first conductor, which is electrically conductive. A radiated energy beam renders the second conductor non-conductive, while simultaneously electrically connecting the first and second portions, rendering the first conductor conductive, as needed.
    Type: Grant
    Filed: August 6, 1985
    Date of Patent: August 26, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Jun-ichi Ohno, Satoshi Konishi
  • Patent number: 4603401
    Abstract: An apparatus and method for infrared imaging is disclosed in which a pattern of infrared radiation is detected and stored in uniformly distributed localized states in a semiconductor. Photoemission of charge carriers from the localized states occurs only at locations where infrared photons interact with the carriers. When desired, a uniform electric field applied to the semiconductor allows for coherent transport of a pattern of remaining carriers in a direction substantially perpendicular to an outer surface to which the image is transported. A portion of the transported pattern of charge may be emitted from the outer surface of the semiconductor and utilized to produce an optical or electrical pattern corresponding to the incident infrared pattern.
    Type: Grant
    Filed: April 17, 1984
    Date of Patent: July 29, 1986
    Assignee: University of Pittsburgh
    Inventor: Darryl D. Coon
  • Patent number: 4602352
    Abstract: An infrared detector and method of detection based on depletion of charge stored in localized states is disclosed. The detector and method involve the determination of the depletion of charge stored in localized states at low temperatures caused by electric field-assisted photoemission of charge carriers from the localized states. The depletion of stored charge is indicative of the integrated incident flux of infrared radiation. The depletion of stored charge can be sensed by quantum mechanical field ionization, field detachment or otherwise.
    Type: Grant
    Filed: April 17, 1984
    Date of Patent: July 22, 1986
    Assignee: University of Pittsburgh
    Inventors: Darryl D. Coon, Gustav E. Derkits, Jr.
  • Patent number: 4593306
    Abstract: Information storage medium comprising a semiconductor doped with first and second impurities or dopants. Preferably, one of the impurities is introduced by ion implantation. Conductive electrodes are photolithographically formed on the surface of the medium. Information is recorded on the medium by selectively applying a focused laser beam to discrete regions of the medium surface so as to anneal discrete regions of the medium containing lattice defects introduced by the ion-implanted impurity. Information is retrieved from the storage medium by applying a focused laser beam to annealed and non-annealed regions so as to produce a photovoltaic signal at each region.
    Type: Grant
    Filed: February 24, 1983
    Date of Patent: June 3, 1986
    Assignee: Battelle Development Corporation
    Inventors: D. D. Marchant, Stefan Begej
  • Patent number: 4575822
    Abstract: Disclosed is a digital memory in which data is stored by establishing perturbations in a surface of a substrate and thereafter identifying the perturbations by establishing a tunnel electron current between the surface of the substrate and a movable probe. The perturbations can be physical, electrical, or magnetic, for example, such that the tunneling electron current is affected thereby. Storage area for a bit of data can be reduced to the order of 10.sup.-4 square microns, and the volume of a 100 megabyte mass storage can be reduced to the order of a cubic centimeter.
    Type: Grant
    Filed: February 15, 1983
    Date of Patent: March 11, 1986
    Assignee: The Board of Trustees of The Leland Stanford Junior University
    Inventor: Calvin F. Quate
  • Patent number: 4575820
    Abstract: A large scale integrated circuit device such as a random access memory or a read only memory has its top cover removed and information is read into the device in the form of radiation which is selectively applied to the exposed surface of the device. The radiation is of suitable frequency and intensity as to be capable of placing any of the individual devices within the array to a given logic state. The entire device is electrically read out in the normal fashion. The radiation may be modulated in any desired manner and can, for example, be modulated by a transparency containing the desired input information. Gray shades are obtained by employing a plurality of large scale integrated devices which are identical to one another and which receive the same radiation distribution with a different attenuation for each of the devices. The electrical readout process can then compare the state of respective identical devices within each array to determine gray shades.
    Type: Grant
    Filed: July 28, 1983
    Date of Patent: March 11, 1986
    Inventor: Irving F. Barditch
  • Patent number: 4527259
    Abstract: A highly integrated semiconductor device has two or more circuits employing non-volatile memory elements built into the same semiconductor substrate, along with read, write and erase, which may operate independently of each other. The memory includes first and second circuit sections, the first circuit section including a first non-volatile memory which is electrically writable and is erasable by ultra-violet rays, and the second circuit section including a second non-volatile memory which is electrically writable and electrically erasable, but which is not erasable by ultra-violet rays. The first circuit section may be a ROM section and the second circuit section may be a CPU in a microcomputer semiconductor device. The first non-volatile memory elements are preferably FAMOS type elements and the second non-volatile memory elements are preferably MNOS elements or F-N elements.
    Type: Grant
    Filed: September 20, 1982
    Date of Patent: July 2, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Takeshi Watanabe
  • Patent number: 4396996
    Abstract: A monolithic static memory cell has two cross-coupled inverters each comprised of a series connection of a field effect switching transistor and a load element designed as a field effect transistor. The field effect transistors forming the load elements have their channel resistances of different values. A gate insulating layer of one of the load element field effect transistors has its charge state altered, preferably by electron beam writing, so that a change in a threshold voltage of the one transistor results in a change of its channel resistance relative to the channel resistance of the other load element transistor if it was under before the selective altering, or vice-versa.
    Type: Grant
    Filed: August 19, 1981
    Date of Patent: August 2, 1983
    Assignee: Siemens Aktiengesellschaft
    Inventor: William G. Oldham
  • Patent number: 4257111
    Abstract: A digital-to-analog optical recorder incorporating both CCD and integrated optics technologies which is fabricated as a single integral unit including an electro-optical layer portion and a semiconductor layer portion. Sampling circuits and digital-to-analog converters are implemented on the semiconductor layer portion using CCD technology, and a plurality of optical channel waveguides and electro-optical modulators are implemented on the electro-optical layer portion. Each digital signal is converted into two complementary light spots at the output of the recorder.
    Type: Grant
    Filed: October 3, 1979
    Date of Patent: March 17, 1981
    Assignee: Rockwell International Corporation
    Inventors: Jack E. Soohoo, Michael J. McNutt, Shi-Kay Yao, Cecil L. Hayes, Richard A. Gudmundsen
  • Patent number: 4241421
    Abstract: An array of charge storage devices each including a pair of closely coupled conductor-insulator-semiconductor cells, one a row line connected cell and the other a column line connected cell, is provided on a common semiconductor substrate. Readout of the charges stored in a row of devices is accomplished by transferring the charge in each of the devices of the selected row of devices in one direction between the row line connected cell and the column line connected cells of a device in sequence and sensing the resultant current flow in the row line of the selected row of devices.
    Type: Grant
    Filed: July 26, 1979
    Date of Patent: December 23, 1980
    Assignee: General Electric Company
    Inventors: Hubert K. Burke, Gerald J. Michon
  • Patent number: 4236228
    Abstract: The memory device for processing picture images data is comprised from a memory bank including a number of memory boards each constituted by a bit plane, and bits constituting a picture element information are located in different memory boards. There are provided a data write circuit for writing the picture element data having any desired bit length in the memory bank starting from any desired bit location of the memory bank, and a read out circuit for reading out the stored picture element information having any desired bit length from any desired bit position of the memory bank.
    Type: Grant
    Filed: June 27, 1979
    Date of Patent: November 25, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Takashi Nagashima, Norio Aihara
  • Patent number: 4192015
    Abstract: The optical intensity pattern of a two-dimensional image field is electrically scanned a line at a time by a shift register access technique, thus providing a first stream of bits for each line. Each of these bits in a given line is compared with a dither coded second stream of bits generated in response to the background illumination (absence of image) along a line immediately adjacent to the line being scanned. The resulting sequence of comparisons is a dither coded signal representation of the line being scanned, which is compensated for nonuniform background illumination of the image field.
    Type: Grant
    Filed: March 6, 1978
    Date of Patent: March 4, 1980
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Michael F. Tompsett
  • Patent number: 4128897
    Abstract: Binary information is stored in a semiconductor archival memory medium by formation of a region of an alloy, of the semiconductor material and a non-doping material, at each of a plurality of potential memory sites at which a first binary value of information is to be stored, with the remaining data sites being devoid of the alloyed region to store the remaining value of binary data. Methods for writing the formation of the alloyed region, and reading the information value stored at each memory site, are also disclosed.
    Type: Grant
    Filed: March 22, 1977
    Date of Patent: December 5, 1978
    Assignee: General Electric Company
    Inventors: James F. Norton, Harold G. Parks, George E. Possin
  • Patent number: 4103312
    Abstract: A semiconductor memory (storage) device is provided using layered semiconductor structures which produce spatially separate electron and hole wells. The state of the device depends upon whether or not charge carriers (electrons and holes) are confined in these wells. Thus, the device has a first state exhibiting one conductance or capacitance when the wells do not have charge carriers in them, and a second state (different conductance or capacitance) when charge carriers are confined in the potential wells. The lifetime of the state in which carriers are confined in the wells depends upon the amount of time required for electron-hole recombination and is expected to be very long since the electrons and holes are spatially separated. A preferred embodiment utilizes a layered heterostructure formed in the space charge region of a p-n junction.
    Type: Grant
    Filed: June 9, 1977
    Date of Patent: July 25, 1978
    Assignee: International Business Machines Corporation
    Inventors: Leroy Ligong Chang, Leo Esaki, George Anthony Sai-Halasz
  • Patent number: 4085456
    Abstract: Line imaging and area imaging devices are described which employ the concept of storage and transfer of charge carriers in a semiconductor medium by the application of appropriate potentials to electrodes disposed above the medium. The devices are characterized by two arrays of electrodes, one functioning as an optical sensing array and the other as a storage and readout array. Charge carriers are collected in the medium under the metal electrodes of the sensing array in proportion to incident light. This information is rapidly transferred to the storage and readout array by sequentially biasing series of electrodes of the two arrays. The information may then be read out of the array without smearing while the sensing array continues to integrate. The structure includes means for preventing cross-coupling and maintaining transfer efficiency for small area electrodes.
    Type: Grant
    Filed: August 30, 1972
    Date of Patent: April 18, 1978
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Michael Francis Tompsett
  • Patent number: 4085455
    Abstract: An electrical information or latent image storage system using a storage element which comprises a layer of substantially electrically insulating material having a layer of electrically photosensitive particulate material embedded therein, with a layer of semiconductor material overcoating one surface of the layer of insulating material, and an electrode on the opposite surface of the layer of insulating material. Information in the form of localized electrical charges of an electrical latent image is placed on the element by electrical or photo-electrical means, the information can be retrieved by scanning the element using an electrode-pair grid pattern, an electron beam, or other suitable means, and the retrieved information may be used, for example, through a computer, or reconstructed into a visible image corresponding to a latent image.
    Type: Grant
    Filed: July 2, 1976
    Date of Patent: April 18, 1978
    Assignee: Xerox Corporation
    Inventor: Koji Okumura
  • Patent number: 4081794
    Abstract: A memory plane for an archival, non-volatile mass storage memory has a planar semiconductor diode with each of a plurality of small P-N junction diodes alloyed into the surface of its fabricated layer responsive to a selectively-actuated scanned energy beam at each location corresponding to a first binary value in a planar array of data sites. Formation of a P-N junction is prevented at each of the remaining sites of the planar data array to provide storage of data having the remaining binary value.Several alternative methods for formation of the alloy junction surface diodes are disclosed.
    Type: Grant
    Filed: April 2, 1976
    Date of Patent: March 28, 1978
    Assignee: General Electric Company
    Inventors: Harold G. Parks, Conilee G. Kirkpatrick