Auxiliary Lines Patents (Class 365/49.15)
  • Patent number: 7675765
    Abstract: Content-addressable memory (CAM) cells comprised of phase change material devices (PCMDs), including PCMD-based binary CAM cells (PCMD-based BCAM cells), PCMD-based ternary CAM cells (PCMD-based TCAM cells), and PCMD-based universal CAM cells (PCMD-based UCAM cells). The PCMDs of the various PCMD-based CAM cells are configured and programmed in a manner that allows a logic “0” or a logic “1” to be stored by the CAM cell. The logic value stored by a given PCMD-based CAM cell depends on the program states of the PCMDs. A program state of a PCMD is determined by whether the phase change material of the PCMD has been allowed to solidify to a crystalline, low-resistance state during a programming operation, or whether the phase change material of the PCMD is forced to solidify to an amorphous, high-resistance state during the programming operation.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: March 9, 2010
    Assignee: Agate Logic, Inc.
    Inventors: Narbeh Derharcobian, Colin Neal Murphy
  • Publication number: 20080151588
    Abstract: A content-addressable memory circuit includes a first local bit line coupled to a first memory location, a second local bit line coupled to a second memory location, a global bit line coupled to the first and second local bit lines and a global bit line accelerator coupled to the first and second local bit lines and the global bit line. The global bit line accelerator sets the second local bit line to a first logical value depending on a signal from the first local bit line. In this way, the global bit line accelerator accelerates the evaluation phase of operation of the second local bit line.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Inventors: Amit Agarwal, Steven Hsu, Ram Krishnamurthy
  • Publication number: 20080137387
    Abstract: In one embodiment, a CAM cell is provided that includes: an SRAM cell adapted to store a bit; a data line adapted to provide a corresponding comparand bit; an XOR gate adapted to XOR the stored bit and the comparand bit to provide an XOR output, and a switch adapted to close in response to the XOR output.
    Type: Application
    Filed: January 25, 2008
    Publication date: June 12, 2008
    Inventors: Gil I. Winograd, Esin Terzioglu, Morteza Cyrus Afghahi