Abstract: An electronics device comprising a time information acquisition unit which acquires time information representing present time from an external device, an update unit which updates reference time stored in a reference time storage unit to time represented by the latest time information acquired by the time information acquisition unit each time the time information is acquired, a counter circuit which is formed by hardware and updates its count value at fixed cycles, an elapsed time measurement unit which measures an elapsed time since the update of the reference time by use of the counter circuit, a present time calculation unit which calculates present time by adding the elapsed time to the reference time stored in the reference time storage unit, and a response unit which makes the present time calculation unit calculate the present time and outputs the calculated present time if a present time output request is issued.

Abstract: A master generator that updates time data of remote devices comprises an acquisition module, a clock module, an encoding module, and a transmission module. The acquisition module acquires time data representing current time of day. The clock module receives and stores the time data from the acquisition module and periodically updates the time data. The encoding module encodes the time data from the clock module into time messages. The transmission module selectively superimposes the time messages onto a power signal.

Abstract: Disclosed is a clock for use in a master/slave clock system, including a system and method for semi-automatically performing diagnostic self-tests on the status and operability of a plurality of components of one or more secondary clocks. The invention addresses a multitude of diagnostic and problem detection issues, including “no fault found.

Abstract: Disclosed is a clock for use in a master/slave clock system, including a system and method for semi-automatically performing diagnostic self-tests on the status and operability of a plurality of components of one or more secondary clocks. The invention addresses a multitude of diagnostic and problem detection issues, including “no fault found.

Abstract: A radio wave correction timepiece has an antenna 21 for receiving external radio information including time information consisting of external time data, a reception circuit 22, and a time counter 53 for producing internal time data. A control circuit 24 has a comparison circuit 54 for determining the difference between received external time data and internal time data, and outputting a difference data value. A reception information storage unit 71 stores at least a plurality of data sets, each consisting of received external time data and its resultant difference data value. A correction calculation unit 62 calculates an estimated correction value using the plurality of stored data sets, and the elapsed time from the last reception. An internal time correction control unit 61 corrects the internal time using the estimated correction value.

Abstract: Disclosed is a clock for use in a master/slave clock system, including a system and method for semi-automatically performing diagnostic self-tests on the status and operability of a plurality of components of one or more secondary clocks. The invention addresses a multitude of diagnostic and problem detection issues, including “no fault found.

Abstract: Disclosed is a method for automatically detecting and selecting a time correction protocol and a time base, from among many possible protocols, in a master/slave clock system. A “self-teaching” feature is also disclosed, which includes a table stored at the slave clock containing data representative of characteristics, such as the relative frequency and spacing, of each one of numerous different time correction pulses that can be received by the slave clock from the master clock. Then, at a time of time correction, the slave clock selects the protocol most likely being used by the master clock, based on historical data. The time displayed by the slave clock is the then updated to match the time displayed by the master clock.

Abstract: A master secondary clock system of the analog impulse type consisting of separate motor driven secondary clocks and a master control unit. The secondary clocks can be set at any time by an appropriate signal from the master clock so that even widely scattered secondary clocks can be brought at any time to the correct time. In one disclosed embodiment, the secondary clocks are moved by a series of rapid pulses form the master clock to a predetermined known time, the secondary clocks are brought into registry, the master clock calculates the time disparity between the registration time and the real time, and the secondary clocks are moved in unison to the real time.

Abstract: A master/secondary clock system of the impulse type consisting of stepper motor driven secondary clocks and a master control unit. At five minutes before a predetermined registration time, for example 6:00, the sensor of each secondary clock movement is activated by a reverse polarity signal from the master control unit and a series of reset pulses are thereafter transmitted to the secondary clocks with each secondary clock stopping as the window in its drive train gear moves into alignment with the emitter and detector of its sensor mechanism. After this five minute pulse reset phase to correct clocks that are five or less minutes fast, the master control unit transmits a rapid pulse train so as to quickly move all of the remaining clocks to the 6:00 position with each clock being halted at the 6:00 position by movement of the window of its gear into alignment with the emitter and detector of the sensor mechanism of that clock.

Abstract: A radio controlled timepiece includes a radio receiver for demodulating a transmitted signal on which time and date information has been encoded. A pulse sequence is derived from the transmitted radio signal which is used to drive the stepping motor which advances the hands of a standard display timepiece. If unfavorable reception conditions exist, then the stepping motor will not be driven smoothly and the poor reception will be readily apparent from the irregular movement of the clock hand. A switch is provided to allow the stepping motor to be normally driven by a pulse sequence output of a standard time keeping circuit. A comparator compares the time displayed on the face of the timepiece with the time information encoded on the radio signal and, if the displayed time deviates from the actual time, the frequency of the pulse sequence from the time keeping circuit is adjusted to correct the displayed time.

Abstract: A master/slave clock system including a slave clock configured for inexpensive and reliable control from the master. Each slave clock has an unregulated d-c supply adapted to be supplied with a-c power from the master clock. Threshold switching means in each slave clock is coupled across the d-c supply to sense an abnormally low d-c voltage level intentionally created by lowering the a-c supply level from the master. The threshold switching means switches the clock from the normal operating mode to the set mode where time is incremented at a predetermined rate for a duration controlled by the master clock in order to controllably set all slave clocks in the system to the correct time of day. The system conveniently allows all slaves to be reset to the same time when time is reset at the master, provides for automatic recovery after power failures, and provides a convenient means for automatically resynchronizing all slave clocks twice a day.