Abstract: An alarm information processing method, apparatus, system, and computer storage medium are provided. The method includes receiving alarm information generated by a first node at a first time. It is determined whether the alarm information is a root alarm, and in response to a determination that the alarm information is a root alarm, a plurality of first links comprising the first node are obtained, to generate a first link set. The plurality of first links of the first link set are searched for one or more nodes located before the first node, and alarm information is generated within a first time range before the first time and a second time range after the first time, to obtain a second node. Alarm root source analysis is performed on the second node, and an analysis result is notified.

Abstract: A system and method for suppressing jitter in a digital data signal in a signal processor system. The digital data signal has spaced apart byte allocation units wherein such spacing is increased such that unallocated bytes can be identified and removed from the digital data signal. The byte allocation units of the digital data signal are suppressed with a digital data signal being outputted from the signal processor system having suppressed byte allocation units to suppress the occurrence of jitter.

Abstract: A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code is determined. The calculated distance is compared with the expected distance to determine the difference. Based on the difference, the frequency error is determined.

Abstract: New and useful methods and systems for detecting sync signals/patterns in streams of data are disclosed. For example, in an embodiment system for processing data includes a first module having dedicated processing circuitry configured to detect a sync signal embedded in a received stream of data and to produce an output stream of data, and second module that includes a firmware-controlled processor configured to correct sufficient errors within the received stream of data so as to allow the first module to detect the sync signal on a condition when the first module by itself is incapable of resolving the sync signal caused by the errors in the received stream of data.

Abstract: An audio apparatus according to an embodiment includes an audio signal receiving unit, a music gap signal receiving unit, a playback unit, and a determining unit. The audio signal receiving unit receives an audio signal in which successive multiple music data are contained in a single block of data. The determining unit determines a boundary of the music data on the basis of the time at which the music gap signal that indicates the boundary of the music data by the music gap signal receiving unit and the duration of a silent period in the audio signal that is played back by the playback unit.

Abstract: Systems and methods are provided for reducing jitter in a write strategy for an optical drive. A pattern on an optical medium is recorded according to a first write strategy. Edge timings corresponding to the pattern recorded on the optical medium are measured, and edge timing sensitivities are determined based at least in part on the measured edge timings. A second write strategy is determined based on the edge timing sensitivities, such that the second write strategy is associated with a second jitter amount less than a first jitter amount associated with the first write strategy.

Abstract: New and useful methods and systems for detecting sync signals/patterns in streams of data are disclosed. For example, in an embodiment system for processing data includes a first module having dedicated processing circuitry configured to detect a sync signal embedded in a received stream of data and to produce an output stream of data, and second module that includes a firmware-controlled processor configured to correct sufficient errors within the received stream of data so as to allow the first module to detect the sync signal on a condition when the first module by itself is incapable of resolving the sync signal caused by the errors in the received stream of data.

Abstract: A circuit includes a converter that samples a signal read from a storage medium to generate a sample. The signal includes a physical address of data read from a track on the storage medium. A timing control device generates a clock signal based on a deviation of the track from a reference line. A scaling device generates a scale factor based on the clock signal. A multiplier multiplies the sample by the scale factor to generate a scaled sample. An integrator integrates the scaled sample over a period of the clock signal to generate a resultant value. A comparator compares the resultant value to a threshold to generate an output. The output indicates whether no phase imperfection exists in the scaled sample. A decoder, based on the output of the comparator, decodes the resultant value to obtain the physical address of the data.

Abstract: Aspects of the disclosure provide a signal processing circuit that includes a signal processing circuit includes a processing path configured to process an electrical signal to produce input data samples, and a feed-forward correction module configured to delay the input data samples to produce delayed data samples, to apply the delayed data samples to a timing loop during periods when a profile variation of the data samples is not detected, and to apply the input data sample to the timing loop during periods when a profile variation of the data samples is detected.

Abstract: Provided is a signal processing device including: an adaptive filter; a PRML circuit for sequentially generating binarized data from a filtered reproduced waveform by sampling at sampling points in a period based on a clock signal and sequentially generating a partial response waveform which is to be the target waveform from the binarized data; a calculating unit for sequentially calculating first phase errors from a difference between the target waveform and the filtered reproduced waveform; a limiting unit for outputting second phase errors by excluding a specific phase error from the first phase errors; and a clock generating unit for generating the clock signal of a frequency corresponding to the second phase errors; wherein the specific phase error includes a phase error at a time when the partial response waveform reaches a specific level which excludes at least a level not less than a predetermined amplitude level.

Abstract: Techniques are described herein that synchronize media streams using time signal(s) from an independent time source. An independent time source is a time source that is independent from (i.e., that is not connected to) an asynchronous data network via which the media streams are transferred. In accordance with the techniques described herein, media server(s) transfer the media streams to client(s) via an asynchronous data network. The independent time source provides the time signal(s) to the media server(s) and/or the client(s). If the time signal(s) are provided to the media server(s), the media server(s) may provide timing information that is based on the timing signal(s) to the client(s). The client(s) use the timing information from the media server(s) and/or the timing signal(s) from the timing source to synchronize the media streams.

Abstract: In some implementations, a method includes receiving rotational speed information corresponding to a rotational speed of a spindle motor having a plurality of poles, down sampling the rotational speed information to obtain speed-related information associated with the spindle motor, and adjusting the rotational speed of the spindle motor based on the speed-related information.

Abstract: A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code is determined. The calculated distance is compared with the expected distance to determine the difference. Based on the difference, the frequency error is determined.

Abstract: A circuit including a wobble signal phase imperfection detector configured to detect and correct a phase transition imperfection in a first scaled wobble signal sample. The wobble signal phase imperfection detector includes an integrator configured to integrate the first scaled wobble signal sample over substantially a half-period portion of the wobble clock signal, and a selector configured to select as an output either i) the first scaled wobble signal sample integrated over substantially one period of the wobble clock signal or ii) the first scaled wobble signal sample integrated over substantially the half-period portion of the wobble clock signal, wherein selection of the first scaled wobble signal sample integrated over substantially one period of the wobble clock signal indicates that the phase transition imperfection does not exist with the first scaled wobble signal sample.

Abstract: A method for recording information in form of a hologram. The method can generate a displacement signal by detecting a displacement of a holographic recording medium. The method can perform an exposure control operation that, if the sampling value of the displacement signal falls within an allowable displacement range, records the information item in the holographic recording medium, and if the sampling value of the displacement signal falls outside the allowable displacement range, blocks or reduces at least one of the information light and the reference light to a light intensity with which the information item is not recorded in the holographic recording medium.

Abstract: A phase error detection apparatus includes: a sampling block; a first phase error calculation block; a second phase error calculation block; and a selective output block.

Abstract: A system and method for suppressing jitter in a digital data signal in a signal processor system. The digital data signal has spaced apart byte allocation units wherein such spacing is increased such that unallocated bytes can be identified and removed from the digital data signal. The byte allocation units of the digital data signal are suppressed with a digital data signal being outputted from the signal processor system having suppressed byte allocation units to suppress the occurrence of jitter.

Abstract: A method for determining a phase difference of a tracking error signal is provided. The method includes: predetermining a plurality of phase differences, measuring MPP and SPP signals, establishing a phase difference curve by use of an amplitude ratio between (MPP+SPP) and (MPP?SPP), measuring MPP and SPP signals for a tracking error signal under test, calculating the amplitude ratio (MPP+SPP)/(MPP?SPP), and comparing with the phase difference curve to promptly determine the phase difference.

Abstract: An instantaneous jitter information detection section detects, based on first and second digital values indicating different polarities relative to a predetermined reference value, an instantaneous gradient value corresponding to a difference value between the first and second digital values, and an instantaneous deviation value corresponding to a difference value between an intermediate value between the first and second digital values and the reference value. An information conversion section converts, based on an inversely proportional conversion table, the instantaneous gradient value to an inversely proportional value. An arithmetic section detects an instantaneous variance value by multiplying the instantaneous deviation value and the inversely proportional value together, and squaring a value obtained by the multiplication, and detects an integrated value by accumulating the instantaneous variance value.

Abstract: A model is derived for write parameters of a laser in an optical drive. A parameter range for the write parameters is set based on a recordable medium. A number of test runs are recorded on the recordable medium while varying the write parameters. Write performance characteristics are measured over the test runs, and a model of write performance as a function of the write parameters is derived. Values for write parameters are selected for use in writing actual data based on the derived model. A first section of user data is written to the data-carrying region of the recordable medium using the selected values. The write performance characteristics of the first section of user data are measured, and the model is updated by including the measurements from the data-carrying region. New values for the write parameters of the laser are selected based on the updated model.

Abstract: A disc apparatus is disclosed that includes a jitter-value detection unit configured to detect a jitter value based on a signal to be read from a medium. A detrack-value setting unit is configured to set a detrack value for focusing an objective lens in the medium based on the jitter value. A detrack-value adjusting unit is configured to detect the jitter value every time the detrack value is changed stepwise within a predetermined range of the detrack value including a reference value of the detrack value, to obtain an optimum detrack value to be set in the detrack-value setting unit, based on a maximum jitter value and a minimum jitter value of the detected jitter values.

Abstract: In one embodiment the present invention includes a circuit comprising a switch and a switch driver. The switch is configured to provide synchronous rectification switching of a back-EMF voltage. The synchronous rectification switching produces a source voltage. The switch driver is configured to receive the back-EMF voltage and the source voltage. The switch driver provides a control signal to a control terminal of the switch. The control signal has a frequency. The frequency is used to control an amount of the synchronous rectification switching. Accordingly, the frequency reduces a dissipated power associated with the synchronous rectification switching.

Abstract: The invention relates to write strategy modification, and in particular, to dynamic write strategy modification. A dynamic write strategy modification apparatus comprises a measurement module, a write strategy development module, and a write laser module. The measurement module measures a plurality of different parameters. The write strategy development module calculates or chooses an optimal parameter from the plurality of different parameters and modifies a default strategy to generate a modified write strategy. The write laser module drives to write data onto an optical disc. A write strategy modification will be repeated until writing is finished.

Abstract: A semiconductor integrated circuit is equipped with a reproduction ECC circuit, a recording ECC circuit, a host interface circuit, and a memory control circuit. The memory control circuit includes an arbitration circuit and a count circuit. The arbitration circuit arbitrates ECC access with a priority order higher than the access of a host interface with a host apparatus. The count circuit counts the number of output times of the ECC request, and, when the count reaches a prescribed number, the count circuit generates a count termination signal. The arbitration circuit performs switching of priority orders to arbitrate the host with a priority order higher than that of ECC. The prescribed number corresponds to number of output times of the ECC access request necessary for accessing a semiconductor memory in relation to data of one ECC block or of an integral multiple of the one ECC block.

Abstract: A recording medium comprising a recording area, the recording area includes a first area and a second area, the first area includes a frame area, the frame area includes an area in which a second synchronization code sequence and at least a portion of data are to be recorded, and the second area includes an area of linking frames in which a third synchronization code sequence and a fourth synchronization code sequence are to be recorded.

Abstract: Systems, methods and computer program products for removing speed adjustment errors attributed by pole asymmetry are described. In some implementations, the spindle motor speed can be down sampled. Down sampling the spindle motor speed can include determining the spindle motor speed every two (or multiple of two) electrical cycles. Determining the spindle motor speed every two electrical cycles can lead to an accurate determination of the actual spindle motor speed, as the timing and position differences between two adjacent poles can be equalized (e.g., timing and position errors associated with the second pole can be used to cancel out the timing and position characteristics errors with the first pole).

Abstract: A signal pattern detecting apparatus, which is capable of detecting a physical mark in a read back signal being read from an optical disc, includes a matching signal generator, a signal comparing device, and a decision circuit. The matching signal generator is utilized for generating a matching signal, capable of being utilized to identify the physical mark, according to a reference clock and a wobble clock. The signal comparing device is electrically connected to the matching signal generator, and utilized for comparing the matching signal with a wobble data signal to generate a comparison signal. The decision circuit is electrically connected to the signal comparing device, and utilized for generating an indication signal according to the comparison signal and a threshold value. Both the wobble data signal and the wobble clock are derived from the read back signal.

Abstract: In a synchronous reproduction signal processor, when a phase error between reproduction data and a clock is repeatedly detected such that a clock synchronized with a reproduction signal is generated based on the phase error, a filtering process unit (34) performs a filtering process which performs a weighed addition with respect to a phase error series prior to the current time from a phase error calculation unit (33) using, e.g., a FIR filter with a plurality of taps so as to generate a reference value under reduced influence of noise mixed in the phase error series by feedback correction. A cross detection unit (32) detects the timing with which the sampled reproduction data crosses the reference value generated by the filtering process unit (34). This allows effective use of the dynamic range of the feedbacked reference value without limiting it, and simultaneously achieves the enhancement of noise immunity.

Abstract: A system including a demodulator module, a timing module, and a writing module. The demodulator module demodulates a wobble signal having a first period using timing signals having a second period and generates a phase error signal based on the wobble signal. The wobble signal is generated based on wobble information stored on an optical medium. The first period is a first multiple of a channel bit period of the optical medium. The second period is a second multiple of the channel bit period. The timing module generates a clock signal based on the phase error signal. The writing module writes, based on the clock signal, a predetermined number of bits on the optical medium during the first period. The predetermined number of bits written during the first period is based on the second multiple in response to the second multiple being greater than the first multiple.

Abstract: A method for controlling the quality of storage media, and more specifically a method for determining if the quality of a storage medium decreases. The method includes: determining one or more quality parameters of the storage medium; and comparing one or more of the determined quality parameters with previously determined quality parameters of the storage medium stored in a memory in case the quality of the storage medium has been determined before.

Abstract: There is provided a recording medium playback device that includes a first binarization portion that binarizes, by a PRML method, a signal that is read from a recording medium, a second binarization portion that binarizes the signal based on a magnitude relationship to a specified threshold value, a first frame synchronization signal detection portion that detects a synchronization pattern in a first binarized data string that is produced by the first binarization portion, and a second frame synchronization signal detection portion that detects a synchronization pattern in a second binarized data string that is produced by the second binarization portion. If the synchronization pattern is not detected by the first frame synchronization signal detection portion, a signal that is derived from the synchronization pattern that is detected by the second frame synchronization signal detection portion is used as the frame synchronization signal.

Abstract: A device for controlling access to an optical disc includes a control word calculator and a numerically controlled oscillator (NCO). The control word calculator is arranged to calculate a control word corresponding to a radius where the optical disc is accessed. In addition, the NCO is arranged to generate an output frequency according to the control word, wherein the output frequency is utilized for accessing the optical disc. An associated method for controlling access to an optical disc includes: calculating a control word corresponding to a radius where the optical disc is accessed; and generating an output frequency according to the control word, wherein the output frequency is utilized for accessing the optical disc.

Abstract: An optical disc apparatus includes an emitter which emits a laser beam to a optical disc, a divided photodetector including a first dived portion and a second dived portion disposed in a light path of the reflected beam from the optical disc, and producing a first photodetector signal and a second photodetector signal, a phase difference detector which produces a phase difference signal from a phase difference between the first and the second photodetector signals, an integrator which produces a integral signal from a integration of the phase difference signal, a tracking controller configure to perform tracking control based on the integral signal, and a limiter which limits a signal to be supplied from the divided photodetector to the phase difference detector or a signal to be supplied from the phase difference detector to the integrator based on a detection status of a signal detected by the dived photodetector.

Abstract: A method and apparatus for recovering clock timing from a bi-phase modulated portion of a high frequency modulation (HFM) signal. The HFM signal includes signal transitions between a high level and a low level. A clock count is initiated upon detection of a first signal transition in the bi-phase modulated portion of the HFM signal. The clock count corresponds to an expected clock timing of the HFM signal. The clock count is stopped upon detection of a second signal transition in the bi-phase modulated portion of the HFM signal subsequent to the first signal transition. An actual clock count includes a number of clock cycles occurring between the first and second signal transitions based on the expected clock timing. An expected clock count between signal transitions of the bi-phase modulated portion of the HFM signal is identified if the actual clock count between the first and second signal transitions falls within a range of clock counts.

Abstract: An address-accessing device includes first and second information generators for producing first and second information according to the received address signals; a phase offset detector for producing a phase offset according to the first and second information; a reference signal generator for producing a reference signal according to the phase offset, the first information and the second information; and a decoder used to determine the structure type of an address-in-pregroove unit (ADIP) according to the reference value. This address-accessing device is capable of adjusting the decision level and the phase offset automatically to lower the error rate occurring in the address access procedure.

Abstract: The present invention is aimed at providing an optical disc device and a recording condition setting method which can automatically determine an optical recording condition to an optical disc, and the optical disc device comprises an optical pickup which records data on a disc; a data encoder which modulates data to be recorded; a recording timing setting means which sets a timing of recording the data on the disc; a phase error detection means which measures an error amount of a mark recorded on the disc from a position where the mark should be properly located; an error convergence means which calculates error information indicating an optimum position of the mark; a recording timing calculation means which calculates a correction value of the recording timing to be set on the recording timing setting means, based on the error information; and a control means which feedbacks an output of the recording timing calculation means to the recording timing setting means, thereby to optimize the recording timing.

Abstract: In a device for controlling a focus to an optical disc having a land section and a groove section, the control is performed so as to avoid a focus step difference at a land-area/groove-area switching point. When performing write-in or readout of data to an optical disc on which a land area and a groove area are continuously formed, using an optical pickup, there are provided a land learning unit (1) for determining a focus position in the land area, a groove learning unit (2) for determining a focus position in the groove area, and a focus position calculation unit (3) for determining a focus position in an area where the land area and the groove area are switched, and the focus position of the optical pickup is moved so that it is located at the third focus position when the switching signal is inverted according to the switching between the land area and the groove area.

Abstract: A demodulation circuit accurately demodulates a wobble signal of an optical disk without being affected by a phase shift induced by crosstalk. An A-D converter subjects wobble signal reproduced from an optical disk to A-D conversion and feeds a result of conversion to a zero-crossing detection circuit. The zero-crossing detection circuit detects zero-crossing points of the wobble signal. A sinusoidal wave generation circuit generates a sinusoidal wave by means of sequentially connecting sinusoidal wave elements whose periods are each equal to a time interval between zero-crossing points. A multiplier multiplies an original wobble signal by a sinusoidal wave signal. A slicer detects an HMW-modulated portion of the wobble signal, and another slicer detects an MSK-modulated portion of the wobble signal.

Abstract: An information reproduction device according to the present invention is a device for accessing a recording medium having first address information and second address information recorded thereon. The first address information is represented by a shape formed on the recording medium in advance; and the second address information is recorded on the recording medium together with data. The information reproduction device includes a head section for accessing the recording medium to generate a reproduction signal; a first detection section for detecting the first address information from the reproduction signal; a second detection section for detecting the second address information from the reproduction signal; and a control section for, based on a detection result of either the first detection section or the second detection section which detected the address information first, controlling an access after the detection to the recording medium.

Abstract: A method and apparatus for recovering clock timing from a hi-phase modulated portion of an HFM signal. The signal includes transitions between high and low levels. A clock count is initiated upon detection of a first transition, which corresponds to an expected clock timing of the signal. The count is stopped upon detection of a second transition. An actual clock count includes a number of clock cycles occurring between the transitions based on the expected timing. A first expected clock count between transitions is identified if the actual clock count between the transitions falls within a first range of clock counts. A first error between the actual and first expected clock counts is determined. A second expected clock count between transitions is identified if the actual clock count between transitions falls within a second range of clock counts. A second error between the actual expected clock counts is determined.

Abstract: An optical disk apparatus to record data on an optical disk on which a wobble is formed, the optical disk apparatus including; a detection unit including a BPF which a signal obtained from a reflected light from an optical disk passes, the detection unit to detect a wobble signal from a wobble based on the signal passing the BPF; and a register to store an adjustment value for adjusting the BPF as a register value, so as to adjust the BPF based on each of register values obtained by changing the register value 1 LSB by 1 LSB; acquire an amplitude of the signal passing the BPF, the amplitude corresponding to each of the register values; identify one of the register values for the largest acquired amplitude; and adjust the BPF based on a value obtained by adding 1 LSB to the identified register value when data is recorded.

Abstract: A recording medium comprising a recording area, the recording area includes a first area and a second area, the first area includes a frame area, the frame area includes an area in which a second synchronization code sequence and at least a portion of data are to be recorded, and the second area includes an area in which a third synchronization code sequence and a fourth synchronization code sequence are to be recorded.

Abstract: A recording condition approximate to the optimal is obtainable for a media even if unknown to the drive. A technique is provided that is effective for improving the signal quality, particularly, at a Wobble and Lpp. By regulating an intermediate pulse condition PWD, Tmp of a recording pulse configured with a top pulse, an intermediate pulse and a last pulse, the pit width W in a saturation code is controlled. The pit length and phase in the saturation code is controlled based on a front phase correction amount Ttop and rear phase correction amount Tlast.

Abstract: An optical axis shift correcting device is provided in an optical information device including an irradiation element for applying a laser, an optical system for guiding a laser applied to an optical disc having a recording track, and a light reception element for receiving the light from the optical disc generated by the guided laser via the optical system. The optical axis shift correcting device includes a jitter acquisition element, an optical axis modification element modifying the direction of the optical axis with respect to the light reception element, and a control element controlling the optical axis modification element to reduce the shift when the acquired jitter amount exceeds a predetermined threshold value. The optical axis shift correcting device thus corrects the optical axis light shift on the surface of the light reception element with respect to the radial direction of the optical disc set in the optical information device.

Abstract: A technique capable of realizing a power saving in a device for reproducing/recording digital signals by properly controlling a frequency of a clock. The device for reproducing/recording digital signals (device for reproducing an optical disk) includes: a difference comparing circuit for comparing a first parameter (demodulating block counter) updated each time a process for one correcting block is done in a demodulating circuit with a second parameter (error correcting block counter) updated each time a process of one correcting block is done in an error correcting circuit; and a circuit (clock controlling circuit etc.) for switching a frequency of a master clock (MCLK) depending on a comparison result of the difference comparing circuit. Thereby, the frequency of the clock can be switched both of when the demodulation for one correcting block is ended and when the correcting process for one correcting block is ended by using the switched master clock.

Abstract: In a circuit, a wobble detector detects a wobble signal from an optical recording medium and a synchronization signal based on the wobble signal and provides a wobble clock signal. A wobble signal phase imperfection detector responds to the wobble signal and detects and corrects a phase transition imperfection in the wobble signal. The imperfection detector integrates a first scaled wobble signal sample over a half period portion of the wobble clock signal; compares the first scaled wobble signal sample integrated over one period of the wobble clock signal to a variable threshold value; and based on the comparison, outputs either the half period integrated and scaled wobble sample or the first scaled wobble sample integrated over one period of the wobble clock signal. The imperfection detector further decodes the output to obtain wobble address period data.

Abstract: A model is derived for write parameters of a laser in an optical drive. A parameter range for the write parameters is set based on a recordable medium. A number of test runs are recorded on the recordable medium while varying the write parameters. Write performance characteristics are measured over the test runs, and a model of write performance as a function of the write parameters is derived. Values for write parameters are selected for use in writing actual data based on the derived model. A first section of user data is written to the data-carrying region of the recordable medium using the selected values. The write performance characteristics of the first section of user data are measured, and the model is updated by including the measurements from the data-carrying region. New values for the write parameters of the laser are selected based on the updated model.

Abstract: A disc apparatus comprising: a jitter-value detection unit configured to detect a jitter value based on a signal to be read from a medium; a defocus-value setting unit configured to set a defocus value for focusing an objective lens in the medium based on the jitter value; and a defocus-value adjusting unit configured to detect the jitter value every time the defocus value is changed stepwise within a predetermined range of the defocus value including a reference value of the defocus value, to obtain an optimum defocus value to be set for the defocus-value setting unit within a predetermined time period, based on a maximum jitter value and a minimum jitter value of the detected jitter values.

Abstract: According to one embodiment, a disk drive configured to write data to a disk being rotated by a spindle motor has a synchronous clock generator that generates a synchronous clock to use during the write operation. The synchronous clock generator inputs the rotational acceleration of the spindle motor, as feed-forward control value, to the feedback control system provided in the drive disk, thereby generating a clock that is synchronous with the rotational speed of the disk.

Abstract: An optical disc drive having an optical pickup head emitting a light beam to an optical storage medium, detecting the light beam reflected from the optical storage medium, and outputting a signal based on the received reflected light, having a jitter measuring unit measuring jitter in signals output from the optical pickup head and having an evaluation unit determining from the measured jitter if the optical storage medium is good or defective. The jitter measuring unit measures jitter in a train of 3T or longer marks or spaces from an optical storage medium to which digital information is recorded as a train of marks or spaces of length kT based on a period T and an integer k of two or more.