Binary Signal Level Detecting Using A Reference Signal Patents (Class 369/59.17)
  • Patent number: 6421309
    Abstract: A maximum mark length detector comprising a total value register for storing a total value Lsum of measured mark lengths; a measured value register for storing a measured value of a mark length; an arithmetic unit for computing the sum Lp of a current measured value Lk and a previously measured value PLk stored in the measured value register and subtracting a maximum value Lmax from the total value Lsum when the total value Lsum reaches the measured maximum value Lmax; a counter to count the number of times the subtraction is performed; and a comparator for completing the detection when a count value C of the counter reaches a predetermined value.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: July 16, 2002
    Assignee: International Business Machines Corporation
    Inventors: Toshio Kanai, Teruhiko Ushio
  • Publication number: 20020085471
    Abstract: A circuit arrangement including means (5) for determining a slicer level from incoming signal levels for slicing the incoming signal levels on the basis of the slicer level thus determined, includes a first (15, 21, 131, 43) and a second (16, 22, 132, 44) register circuit, which register circuits are connected to an output (11, 12) of a discriminator circuit (8). The discriminator circuit (8) compares an incoming signal level with a set discrimination level and is adapted to apply an incoming signal level to the first register circuit (15, 21, 131, 43) if the incoming signal level is higher than the set discrimination level and to apply an incoming signal level to the second register circuit (16, 22, 132, 44) if the incoming signal level is lower than the set discrimination level.
    Type: Application
    Filed: January 2, 2001
    Publication date: July 4, 2002
    Inventors: Gerardus Rudolph Langereis, Willem Marie Julia Marcel Coene, Constant Paul Marie Jozef Baggen, Johannus Leopoldus Bakx
  • Publication number: 20020085472
    Abstract: An optical disk device reproduces an RF signal by projecting a light beam on an optical disk and detecting a reflected light therefrom. On the optical disk, information is recorded by forming a pit on a track determined according to a groove having a wobble signal recorded thereon. The optical disk device comprises a comparator comparing the RF signal with a threshold value so as to output a binary signal, a first band-pass filter filtering a frequency band of the wobble signal from the binary signal so as to extract a wobble signal component, and a first adder obtaining a value by adding the wobble signal component to a fixed reference value so as to supply the value to the comparator as the threshold value.
    Type: Application
    Filed: November 28, 2001
    Publication date: July 4, 2002
    Inventor: Akira Mashimo
  • Publication number: 20020080694
    Abstract: A defect protecting circuit and a method for data slicer in an optical drive is disclosed. As a defect occurs in a disk, the gain of the data slicer is switched to a high gain. After the defect does not occur further, the gain is switched back to a normal gain. Therefore the slicing level can return back to a correct slicing level for reducing incorrect data after the defect terminates, and the jitter in the output data is also reduced.
    Type: Application
    Filed: November 13, 2001
    Publication date: June 27, 2002
    Inventors: Sue-Hong Chou, Yi-Lin Lai
  • Patent number: 6411580
    Abstract: An encoder converts a binary data word to a binary code word. The encoded bits have first and second binary values at a predetermined clock interval. A pulse generator responds to the encoded bits to generate energizing pulses during each clock interval in which the encoded bits have the first binary value. The energizing pules have a uniform duration less than the clock interval. A laser responds to the energizing pulses for recording on a medium.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: June 25, 2002
    Inventors: Noboru Kimura, Ronald G. Vitullo, Yasuhiro Yamazaki
  • Patent number: 6407970
    Abstract: A method, circuit and system for selectively and adaptively effecting conditioning of selected samples of a read signal in storage technologies. A circuit embodying the present invention includes sample logic, arithmetic logic and conditioning logic. The sample logic receives samples and provides a main sample and one or more selected neighbor samples. The arithmetic logic compares the main sample to the neighbor samples toward determining satisfaction of selected conditioning criteria. If the selected conditioning criteria are satisfied, the conditioning logic selectively and adaptively effects level conditioning as to the main sample. Further, the level conditioning is combined with a rule compliance system to insure the read data is following the protocol of the data coding format being used.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: June 18, 2002
    Assignee: Plasmon LMS, Inc.
    Inventor: Johannes J. Verboom
  • Patent number: 6353585
    Abstract: An apparatus of forming an evaluation signal used in adjusting focus bias and adjusting skew of a disk drive in which phase error information between a phase of a read data signal and a phase of a clock signal formed in synchronism with the read data signal, is detected, the phase error signal is converted into an analog signal and is outputted as an evaluation signal having a signal level in accordance with the phase error amount and the evaluation signal is inputted after A/D conversion to a portion for carrying out signal quality evaluation by using the evaluation signal whereby pertinent signal evaluation can be carried out by a simple constitution.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: March 5, 2002
    Assignee: Sony Corporation
    Inventors: Tetsuji Kawashima, Mamoru Akita, Shunji Yoshimura
  • Publication number: 20020021645
    Abstract: To correct a bit shift of binary data read from a medium and further enable correction of a bit error caused by mis-correction of the bit shift, a data recovery apparatus according to the present invention comprises: circuits for respectively correcting time at an intersection of a read signal and a slice signal; and a circuit for generating gray bits representing a time cell including an intersection, the time of the intersection being uncorrected and a time cell adjacent to the time cell, positioned in the direction of the intersection being shifted for correction.
    Type: Application
    Filed: August 3, 2001
    Publication date: February 21, 2002
    Inventors: Toshio Kanai, Mikiko Roji
  • Patent number: 6339580
    Abstract: An apparatus of forming an evaluation signal used in adjusting focus bias and adjusting skew of a disk drive in which phase error information between a phase of a read data signal and a phase of a clock signal formed in synchronism with the read data signal, is detected, the phase error signal is converted into an analog signal and is outputted as an evaluation signal having a signal level in accordance with the phase error amount and the evaluation signal is inputted after A/D conversion to a portion for carrying out signal quality evaluation by using the evaluation signal whereby pertinent signal evaluation can be carried out by a simple constitution.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: January 15, 2002
    Assignee: Sony Corporation
    Inventors: Tetsuji Kawashima, Mamoru Akita, Shunji Yoshimura
  • Publication number: 20020001264
    Abstract: A data recording method for calculating a digital sum value (DSV) corresponding to a proportion of positive data and negative data included in predetermined data ranges, selecting a resync pattern to be inserted between the data ranges according to the DSV, and inserting the selected resync pattern between the data ranges, has a step of selecting a resync pattern that minimizes differences in DSV between the data ranges.
    Type: Application
    Filed: January 18, 2001
    Publication date: January 3, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi Furuta, Kenichi Hamada, Akira Nanba, Masakazu Taguchi
  • Patent number: 6335912
    Abstract: An optical information recording apparatus detects an irradiated position by a laser beam, and modulating additional information in accordance with a track address and angular information as the results of the position detecting to record the modulated additional information at a prescribed position on an optical information recording medium.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: January 1, 2002
    Assignee: Sony Corporation
    Inventors: Seiji Kobayashi, Tamotsu Yamagami
  • Publication number: 20010055259
    Abstract: Digital signal sequences to be recorded in predetermined unitary recording areas are transformed into blocks, a plurality of bit data carrying all digit levels to be read and determined upon reproduction are included in the resultant blocks, and sequences of the data blocks are recorded in the recording medium in the unitary recording areas. Upon reproduction, the blocks of the read signals obtained from a recording medium are recognized, a threshold value is determined for each block on the basis of the values of read signals corresponding to bit data carrying all digit levels to be read and determined, and each digit level of bit data in the read signal are read and determined on the basis of the threshold values.
    Type: Application
    Filed: March 5, 2001
    Publication date: December 27, 2001
    Inventors: Toshio Goto, Takashi Yamaji
  • Patent number: 6324145
    Abstract: The present invention has an objective of providing a digital data reproduction apparatus and a method for correcting a reproduced signal digitization level in which the signal quality of a reproduced signal from a recording medium is kept high while ensuring the reproduction stability. The digital data reproduction apparatus includes: reproduced signal digitization means for digitizing a reproduced signal; synchronization means for producing a clock whose phase is synchronized with a leading edge and a trailing edge of the digitized signal produced by the reproduced signal digitization means; and jitter detection means for integrating and thereby converting absolute values of phase errors between the digitized signal and the clock to a voltage value. The apparatus further includes digitization level correction means for correcting a reproduced signal digitization level so as to minimize a signal produced by the jitter detection means.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: November 27, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventors: Motoyuki Kobayashi, Ryusuke Horibe, Yasuki Matsumoto, Yasuaki Edahiro
  • Patent number: 6295259
    Abstract: To more precisely digitize a signal read from a data storage medium into a binary value to reduce the rate of occurrence of bit error in reproduction. A phase difference of the intersecttion between a signal read from a data storage medium and a slice signal is evaluated to select a probable time cell in which the intersection should be contained for more precisely digitizing the read signal into a binary value.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: September 25, 2001
    Assignee: International Business Machines Corporation
    Inventor: Toshio Kanai
  • Patent number: 6288992
    Abstract: An optical reproducing device according to the present invention detects mean amplitude values of short marks and long marks, which are recorded marks for reproducing power control, by means of a short mark level detecting circuit and a long mark level detecting circuit. Then a differential amplifier compares a ratio between these two mean amplitude values with a standard value, and outputs the result of this comparison. Thereafter, a reproducing power control circuit controls reproducing power of a semiconductor laser such that the absolute value of this comparison result is reduced. Since mean values of the amplitude values of the short marks and long marks are detected, the detection results are very accurate, and the precision of control of reproducing power can be greatly improved.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: September 11, 2001
    Assignee: Sharp Kabushiki Kaisah
    Inventors: Tetsuya Okumura, Hiroshi Fuji
  • Patent number: 6285647
    Abstract: A method for writing an optical record carrier, in which a mark representing recorded data is written in the record carrier by a sequence of radiation pulses. The radiation power has a different level in between the pulses of a sequence and immediately after the last pulses of a sequence. This allows an independent control of the leading and trailing edge jitter of the marks written.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: September 4, 2001
    Assignee: U.S. Philis Corporation
    Inventors: Roel Van Woudenberg, Johan P. W. B. Duchateau, Hermanus J. Borg
  • Publication number: 20010017834
    Abstract: The present invention relates to a device for reading from and/or writing to optical recording media (1) having an optical scanner (2) for scanning the recording medium (1) by means of a light beam (3) and for generating scanning signals (HF) from the reflected beam (3), a data slicer (5) for converting a scanning signal (HF) output by the optical scanner (2) into a binary signal (HF″), an averaging unit (6) for forming an average value (M) from the scanning signal (HF, HF″) as input signal of the data slicer (5), and a control unit (14) for changing a parameter (T, OF) of the averaging unit (6).
    Type: Application
    Filed: December 18, 2000
    Publication date: August 30, 2001
    Inventors: Alexander Kravtchenko, Marten Kabutz, Bruno Peytavin
  • Patent number: 6278675
    Abstract: A waveform equalizer which can improve an S/N ratio without causing a jitter in a read signal read out from a recording medium. An amplitude level of the read signal read out from the recording medium is limited by a predetermined amplitude limitation value and, thereafter, is subjected to a filtering process.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: August 21, 2001
    Assignee: Pioneer Electronics Corporation
    Inventors: Hiroki Kuribayashi, Shogo Miyanabe
  • Patent number: 6246653
    Abstract: A method and apparatus for reducing the effect of inter-wave interference on signals read from a storage medium and to precisely digitize the read signals are described. An apparatus for digitizing a signal read from a storage medium according to an embodiment of the invention, comprises: a peak detector, for detecting a peak value for an amplitude of a signal read from the storage medium; a threshold value determiner, for employing the peak value obtained by the peak detector to determine a compensation value that is used for compensating for the effect of inter-wave interference on the signal, and for employing the threshold value calculated by the conventional method and the compensation value to determine a compensated threshold value; and a digitization circuit, for digitizing the signal by using the threshold value determined by the threshold value determiner. Optionally an interpolator may be used to obtain more accurate peak values which occur between sample points.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: June 12, 2001
    Assignee: International Business Machines Corporation
    Inventors: Toshio Kanai, Takeo Yasuda, Kazuhiro Tsuruta, Wataru Ichihara
  • Patent number: 6243344
    Abstract: A sector mark detecting circuit for detecting a sector mark on an optical storage medium includes a binarizing circuit which binarizes a reading signal of an optical head in accordance with a predetermined detection parameter and is capable of changing the detection parameter. A recognizing circuit is adapted to recognize a sector mark from an output of the binarizing circuit, and a control circuit is adapted to measure an optimal value of the detection parameter of the binarizing circuit and control the detection parameter of the binarizing circuit to the optimal value. A sector mark detection rate is thereby enhanced.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: June 5, 2001
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Tani