By Interpolating Or Maximum Likelihood Detecting Patents (Class 369/59.22)
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Patent number: 8169871Abstract: Provided herein are hybrid laser diode drivers (LDDs) that drive a laser diode in response to receiving enable signals from a controller. In accordance with specific embodiments, a hybrid LDD includes a read channel to selectively output a read current, one or more write channel each to selectively output a write current, and an oscillator channel to selectively output an oscillator current. Additionally, in specific embodiments the hybrid LDD includes a state machine that receives the enable signals from the controller, and based on the enable signals, controls timing of the currents output by the read, write and oscillator channels.Type: GrantFiled: October 4, 2010Date of Patent: May 1, 2012Assignee: Intersil Americas Inc.Inventors: Theodore D. Rees, Akihiro Asada
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Patent number: 8165007Abstract: An information detection device includes an equalizer that equalizes the readout signal to a PR channel having equalization target levels of four or more values, and a Viterbi detector. The Viterbi detector generates branch metrics with the equalization target levels as reference levels to determine recording data from an output of the equalizer. The Viterbi detector has a mode of generating the branch metrics and determining the recording data by limiting at least one out of a maximum value and a minimum value of the equalization target levels.Type: GrantFiled: November 9, 2010Date of Patent: April 24, 2012Assignee: Renesas Electronics CorporationInventor: Hiromi Honma
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Patent number: 8159918Abstract: A reproduction signal evaluation method evaluates the quality of a reproduction signal reproduced from an information recording medium based on a binary signal generated from the reproduction signal using a PRML signal processing system. The method includes a pattern extraction step of extracting, from the binary signal, a specific state transition pattern which has the possibility of causing a bit error; a step of computing a differential metric based on the binary signal; an extraction step of extracting the differential metric which is not greater than a predetermined signal processing threshold; a step of determining a mean value of the differential metrics which are not greater than the signal processing threshold and extracted in the extraction step; a standard deviation computing step of determining a standard deviation which corresponds to an error rate predicted from the mean value; and an evaluation step of evaluating a quality of the reproduction signal using the standard deviation.Type: GrantFiled: July 1, 2009Date of Patent: April 17, 2012Assignees: Panasonic Corporation, Sony CorporationInventors: Harumitsu Miyashita, Yasumori Hino, Junya Shiraishi, Shoei Kobayashi
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Patent number: 8159922Abstract: A high-density optical disc such as a high density-digital versatile disc (HD-DVD) or Blu-ray disc, and a method for reproducing or recording data of the high-density optical disc. The high-density optical disc includes a lead-in area, a data area and a lead-out area. The lead-in area has control information. A minimum mark or space length of the control information recorded in the lead-in area is longer than that of data recorded in the data area. The control information of the lead-in area is copied to the lead-out area. On the basis of the data reproduction or recording method, an optical disc device can correctly read and confirm the control information from the high-density optical disc, minimize the interference between a mark and space in high-density recording data, reduce the effects of scratches or dust on the disc, and efficiently prevent an erroneous data reproduction or recording operation.Type: GrantFiled: July 25, 2007Date of Patent: April 17, 2012Assignee: LG Electronics Inc.Inventors: Kyung Chan Park, Young Kuk Kim
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Patent number: 8154973Abstract: A highly efficient and reliable reproduced signal evaluation method and an optical disc drive using that method in which assuming that the number of 2T's appearing successively in a predetermined evaluation bitstream is i, the evaluation bitstream is divided into a main bitstream (5+2i) long and sub bitstreams at the ends of the main bitstream. The check process to determine whether a predetermined evaluation bitstream is included in the binarized bitstreams is replaced with a main bitstream agreement check. This can prevent an increase in the circuit size. At the same time, by separately summing up for each main bitstream the calculated results of Euclidean distance between the reproduced signal and the target signal corresponding to the evaluation bitstream, the size of an evaluation summing circuit can be reduced.Type: GrantFiled: August 16, 2011Date of Patent: April 10, 2012Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Hiroyuki Minemura, Soichiro Eto, Takahiro Kurokawa, Shuichi Kusaba
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Patent number: 8149673Abstract: An optical recording method for recording information by irradiating an optical disc medium with a modulated write pulse train of laser light variable over a plurality of power levels such that a plurality of marks are formed on the optical disc medium, edge positions of each of the marks and a space between adjacent two of the marks being utilized for recording of the information.Type: GrantFiled: October 5, 2009Date of Patent: April 3, 2012Assignee: Panasonic CorporationInventors: Atsushi Nakamura, Isao Kobayashi, Shigeru Furumiya
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Patent number: 8134901Abstract: The present invention relates to an optical disk reproducing apparatus, and provides a technology capable of supporting even a situation in which a reproduction signal characteristic is changed due to a factor other than recording density of an optical disk by using PRML of different constrained length and capable of improving reading accuracy. The optical disk reproducing apparatus includes a PRML circuit of first constrained length (for example, 4) and a PRML circuit of second constrained length (for example, 5). Equalization error values obtained during calculation of equalization learning in respective circuits are compared with each other in a determination circuit. Switching control of a switch is performed so that an output of one of the PRML circuits having a smaller equalization error value is selected.Type: GrantFiled: November 30, 2007Date of Patent: March 13, 2012Assignee: Renesas Electronics CorporationInventors: Yusuke Nakamura, Masakazu Ikeda
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Patent number: 8130618Abstract: According to one embodiment, a method for operating log likelihood ratios in a disk apparatus is disclosed. Iterative decoding is applied to the disk apparatus. The method can set windows for a sequence of the log likelihood ratios output by a soft-decision most-likelihood decoder based on the sequence of the log likelihood ratios or an amplitude of a read signal acquired in response to read of data from a data sector on a disk carried out by a head. The method can multiply the log likelihood ratios contained in each of the windows, by a multiplier specific to each window. In addition, the method can transmit the sequence of the log likelihood ratios multiplied by the multiplier for each of the windows to a parity check decoder.Type: GrantFiled: October 14, 2010Date of Patent: March 6, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Nobuhiro Maeto
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Patent number: 8107341Abstract: An information reproducing apparatus (1) is provided with: a judging device (20) for judging whether or not a read signal (RRF) read from a recording medium (100) satisfies a desired reproduction property; a correcting device (18) for correcting waveform distortion occurring in a read signal corresponding to a long mark, of the read signal if it is judged that the read signal does not satisfy the desired reproduction property; and a waveform equalizing device (15) for performing a waveform equalization process on the read signal in which the waveform distortion is corrected.Type: GrantFiled: December 5, 2006Date of Patent: January 31, 2012Assignee: Pioneer CorporationInventors: Yoshio Sasaki, Shogo Miyanabe, Hiroyuki Uchino
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Patent number: 8107339Abstract: A highly efficient and reliable reproduced signal evaluation method and an optical disc drive using that method in which assuming that the number of 2T's appearing successively in a predetermined evaluation bitstream is i, the evaluation bitstream is divided into a main bitstream (5+2i) long and sub bitstreams at the ends of the main bitstream. The check process to determine whether a predetermined evaluation bitstream is included in the binarized bitstreams is replaced with a main bitstream agreement check. This can prevent an increase in the circuit size. At the same time, by separately summing up for each main bitstream the calculated results of Euclidean distance between the reproduced signal and the target signal corresponding to the evaluation bitstream, the size of an evaluation summing circuit can be reduced.Type: GrantFiled: September 29, 2009Date of Patent: January 31, 2012Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Hiroyuki Minemura, Soichiro Eto, Takahiro Kurokawa, Shuichi Kusaba
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Patent number: 8102744Abstract: There is provided a recording medium playback device that includes a first binarization portion that binarizes, by a PRML method, a signal that is read from a recording medium, a second binarization portion that binarizes the signal based on a magnitude relationship to a specified threshold value, a first frame synchronization signal detection portion that detects a synchronization pattern in a first binarized data string that is produced by the first binarization portion, and a second frame synchronization signal detection portion that detects a synchronization pattern in a second binarized data string that is produced by the second binarization portion. If the synchronization pattern is not detected by the first frame synchronization signal detection portion, a signal that is derived from the synchronization pattern that is detected by the second frame synchronization signal detection portion is used as the frame synchronization signal.Type: GrantFiled: March 6, 2008Date of Patent: January 24, 2012Assignee: Sony CorporationInventors: Ryuya Tachino, Kenichi Hayashi
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Patent number: 8098557Abstract: A signal evaluation method according to the present invention is a method for evaluating a read signal, retrieved from an information recording medium, based on a binarized signal generated from the read signal by a PRML method.Type: GrantFiled: February 25, 2011Date of Patent: January 17, 2012Assignee: Panasonic CorporationInventors: Harumitsu Miyashita, Kohei Nakata, Yasumori Hino, Naohiro Kimura
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Patent number: 8094534Abstract: An information reproducing apparatus (1) is provided with: a waveform shaping device (14) for performing waveform shaping on a read signal (RRF) read from a recording medium (100), on the basis of a reference amplification factor; a correcting device (18) for correcting waveform distortion occurring in a read signal corresponding to at least a long mark, of the read signal on which the waveform shaping is performed; and a waveform equalizing device (15) for performing a waveform equalization process on the read signal in which the waveform distortion is corrected, the waveform shaping device arbitrarily increases the reference amplification factor.Type: GrantFiled: December 5, 2006Date of Patent: January 10, 2012Assignee: Pioneer CorporationInventors: Yoshio Sasaki, Shogo Miyanabe, Hiroyuki Uchino
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Patent number: 8094533Abstract: A hybrid LDD includes a read channel to selectively output a read current, a plurality of write channels, each to selectively output a different write current, and an oscillator channel to selectively output an oscillator current. Additionally, the hybrid LDD includes programmable LDD controller that receives the plurality of enable signals from the external controller, and based on the enable signals, controls timing of the currents output by at least the write channels. The programmable LDD controller can also control timing of the currents output by the read and oscillator channels, based on the enable signals. Further and alternative embodiments are also provided.Type: GrantFiled: May 3, 2011Date of Patent: January 10, 2012Assignee: Intersil Americas Inc.Inventors: Theodore D. Rees, Akihiro Asada, D. Stuart Smith
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Patent number: 8094536Abstract: In a reproducing apparatus, a reading unit reads an information signal from a storage medium, and a converter converts the information signal reproduced by the reading unit into a first digital signal by sampling the information signal in accordance with a reference clock signal with a predetermined frequency higher than the frequency of the information signal. An oversampling unit generates a second digital signal by increasing the number of samples of the first digital signal output from the converter. A data detector selects two adjacent samples from the second digital signal on the basis of the frequency of the information signal reproduced by the reading unit and a phase change of the information signal. The data detector then generates read data using the selected samples of the digital signal.Type: GrantFiled: October 31, 2008Date of Patent: January 10, 2012Assignee: Canon Kabushiki KaishaInventor: Yasuyuki Tanaka
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Patent number: 8094535Abstract: A write type optical disk device with the PRML mode allows accuracy in the trial writing to be improved accompanied with the high speed processing while assuring the readout compatibility. A readout signal that has been A/D converted at timing that interposes the edge has its phase compensated with the even numbered FIR filter. The level at the edge point and the absolute values thereof are accumulated respectively so as to provide a circuit for detecting the edge shift and jitter. Coping with the high speed processing, the edge shift of the readout signal is detected at the position where the edge shift is around zero, thus improving the accuracy in learning of trial writing.Type: GrantFiled: July 26, 2006Date of Patent: January 10, 2012Assignees: Hitachi, Ltd, Hitachi-LG Data Storage, Inc.Inventor: Hiroyuki Minemura
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Patent number: 8085639Abstract: An A/D converter samples a read signal in synchrony with a system clock sclk having a fixed frequency, to perform an A/D conversion. A fluctuation compensator is configured as an internal-feedback-type compensation filter, and suppresses fluctuation of a digital signal output from the A/D converter. A digital PLL uses an interpolator to generate, by interpolation, a sampled value of the read signal at a timing in synchrony with a channel frequency, and uses NCO to generate a synchronizing clock and an interpolated-phase signal that is fed back to the interpolator. A binarization circuit binarizes the read signal based on the interpolated value output from the interpolator. The frequency characteristic of the fluctuation compensator is controlled based on the frequency value output from the loop filter.Type: GrantFiled: December 11, 2007Date of Patent: December 27, 2011Assignee: NEC CorporationInventor: Hiromi Honma
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Patent number: 8085641Abstract: The present invention aims to provide a reproduced signal evaluation method and a write adjustment method for offering a Blu-ray disc having a large storage capacity with excellent media compatibility. An evaluation index L-SEAT is calculated through signed addition using a Euclidean distance difference calculated from at least one of target signals in which a focused edge is shifted to the right and left, and the quality of the reproduced signal is evaluated based on the evaluation index. Write condition adjustment using the index enables write adjustment not depending on SNR and achieving high adjustment accuracy.Type: GrantFiled: July 15, 2010Date of Patent: December 27, 2011Assignees: Hitachi Consumer Electronics Co., Ltd., Sony Corporation, Panasonic CorporationInventors: Hiroyuki Minemura, Takahiro Kurokawa, Junya Shiraishi, Shoei Kobayashi, Harumitsu Miyashita, Yasumori Hino
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Patent number: 8085640Abstract: A method for evaluating reproduced signal wherein when Euclidean distance is calculated by judging the coincidence between a binary bit array and a predetermined evaluation bit array in the evaluation of the quality of reproduced signal, the assumption is made that a continuous 2T count included in a predetermined evaluation bit array is denoted by i and that each evaluation bit array is composed of a main bit array having a bit length of (5+2i); and judgment on whether binary bit arrays include the predetermined evaluation bit array, is concentrated on the coincidence judgment of the main bit arrays.Type: GrantFiled: September 29, 2009Date of Patent: December 27, 2011Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Hiroyuki Minemura, Takahiro Kurokawa
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Patent number: 8068399Abstract: A signal evaluation method according to the present invention is a method for evaluating a read signal, retrieved from an information recording medium, based on a binarized signal generated from the read signal by a PRML method.Type: GrantFiled: February 27, 2009Date of Patent: November 29, 2011Assignee: Panasonic CorporationInventors: Harumitsu Miyashita, Kohei Nakata, Yasumori Hino, Naohiro Kimura
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Patent number: 8059510Abstract: In an information reproducing device for performing maximum likelihood decoding using asynchronous sample data, data from the recording medium 101 is sampled by an A/D converter 103 at an asynchronous sampling clock generated by a clock generator 104, to obtain asynchronous sample data. A timing detector 106 detects a phase ? of the asynchronous sampling clock, where recording timings of data of the recording medium 101 are reference points. A reference value generator 108 generates reference values used in a Viterbi decoder 107, based on basic phase reference values at a phase of 0 and a phase signal ? of the asynchronous sampling clock. A basic reference value learner 109 learns and modifies the phase-0 basic reference values based on the phase signal ?, the asynchronous sample data, and the reference values.Type: GrantFiled: January 26, 2007Date of Patent: November 15, 2011Assignee: Panasonic CorporationInventor: Akira Yamamoto
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Patent number: 8059511Abstract: An information reproducing apparatus (1) is provided with: a correcting device (18) for correcting waveform distortion occurring in a read signal corresponding to a long mark, of a read signal (RRF) read from a recording medium (100); and a processing device (15) for performing a PRML (Partial Response Maximum Likelihood) process on the read signal in which the waveform distortion is corrected.Type: GrantFiled: December 5, 2006Date of Patent: November 15, 2011Assignee: Pioneer CorporationInventors: Yoshio Sasaki, Shogo Miyanabe, Hiroyuki Uchino
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Publication number: 20110261668Abstract: An apparatus for improving decoding accuracy of an equalized signal having a direct current (DC) level obtained from an optical disk is provided. A Viterbi decoder is configured to decode the equalized signal and output a Viterbi-decoded signal. A DC controller is configured to adjust the DC level of the equalized signal such that the equalized signal with the adjusted DC level is decoded.Type: ApplicationFiled: April 21, 2010Publication date: October 27, 2011Applicant: MEDIATEK INC.Inventors: Chih-Ching YU, Yu-Hsuan LIN
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Publication number: 20110228662Abstract: The present invention relates to an optical disk reproducing apparatus, and provides a technology capable of supporting even a situation in which a reproduction signal characteristic is changed due to a factor other than recording density of an optical disk by using PRML of different constrained length and capable of improving reading accuracy. The optical disk reproducing apparatus includes a PRML circuit of first constrained length (for example, 4) and a PRML circuit of second constrained length (for example, 5). Equalization error values obtained during calculation of equalization learning in respective circuits are compared with each other in a determination circuit. Switching control of a switch is performed so that an output of one of the PRML circuits having a smaller equalization error value is selected.Type: ApplicationFiled: June 1, 2011Publication date: September 22, 2011Inventors: Yusuke NAKAMURA, Masakazu Ikeda
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Patent number: 8023382Abstract: A small size circuit reproducing data with low error rate even when a signal includes a non-linear distortion is desired. In such a circuit, the Viterbi method is performed. In the Viterbi method, branch metrics are calculated based on a difference of a sampled reproduction signal and a predetermined expectation values. Path metrics are calculated from the branch metrics. Paths among the plurality of paths having the calculated path metrics and merging at a same state are compared with one another. Based on the magnitude of the compared path metrics, survivor path is selected. In the circuit, for the path metrics of paths merging at a same state, offset corresponding to a determination result until a merging point is added to the paths for the comparison for determining the survivor path from the plurality of merging paths.Type: GrantFiled: June 30, 2010Date of Patent: September 20, 2011Assignee: Renesas Electronics CorporationInventor: Kinji Kayanuma
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Patent number: 8023381Abstract: An information reproducing apparatus (1) is provided with: an offset adding device (19-1, 19-2) for adding a first offset value (OFS) which can be set to be variable, to a read signal (RRF) read from a recording medium (100); a correcting device (18) for correcting waveform distortion occurring in a read signal corresponding to a long mark, of the read signal to which the first offset value is added; an offset subtracting device (19-2, 19-3) for subtracting a second offset value (OFS) which can be set to be variable, from the read signal in which the waveform distortion is corrected; and a waveform equalizing device (15) for performing a waveform equalization process on the read signal in which the second offset value is subtracted.Type: GrantFiled: December 5, 2006Date of Patent: September 20, 2011Assignee: Pioneer CorporationInventors: Yoshio Sasaki, Shogo Miyanabe, Hiroyuki Uchino
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Patent number: 8018809Abstract: A hybrid LDD includes a read channel to selectively output a read current, a plurality of write channels, each to selectively output a different write current, and an oscillator channel to selectively output an oscillator current. Additionally, the hybrid LDD includes programmable LDD controller that receives the plurality of enable signals from the external controller, and based on the enable signals, controls timing of the currents output by at least the write channels. The programmable LDD controller can also control timing of the currents output by the read and oscillator channels, based on the enable signals. Further and alternative embodiments are also provided.Type: GrantFiled: November 25, 2008Date of Patent: September 13, 2011Assignee: Intersil Americas Inc.Inventors: Theodore D. Rees, Akihiro Asada, D. Stuart Smith
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Patent number: 8018810Abstract: A recording control apparatus includes a waveform rectification section for receiving a digital signal generated from an analog signal representing information reproduced from an information recording medium, and rectifying a waveform of the digital signal; a maximum likelihood decoding section for performing maximum likelihood decoding of the digital signal having the waveform thereof rectified, and generating a binary signal representing a result of the maximum likelihood decoding; a reliability calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the digital signal having the waveform thereof rectified and the binary signal; and an adjusting section for adjusting a shape of a recording signal for recording the information on the information recording medium based on the calculated reliability.Type: GrantFiled: October 13, 2008Date of Patent: September 13, 2011Assignee: Panasonic CorporationInventors: Harumitsu Miyashita, Takeshi Nakajima, Naohiro Kimura
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Patent number: 8004443Abstract: An information readout apparatus includes analog to digital converting means, equalizing means, interpolating means, maximum likelihood detecting means and PLL means. The analog to digital converting means converts a read signal read out from an optical disc medium, on which data is recorded with run length limited code that the shortest run length is 1, into a digital signal, and outputs the digital signal in synchronous with a first clock signal with a frequency which is N/M times of a channel frequency. At this time, N is an integer equal to or more than 2 and M is an integer meeting N/M>0.5. The equalizing means equalizes said digital signal to a previously specified partial response (PR) characteristic in synchronous with said first clock signal signal. The interpolating means converts N input data outputted from said equalizing means into M output data, and outputs output data in synchronous with a second clock signal with a frequency of 1/M times of the channel frequency.Type: GrantFiled: January 7, 2008Date of Patent: August 23, 2011Assignee: NEC CorporationInventor: Hiromi Honma
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Publication number: 20110199880Abstract: According to one embodiment, a device includes a filter which limits a frequency bandwidth of a reproduced signal from an optical disc, an AD conversion module which converts an output signal from the filter into a multilevel digital signal, an equalizing module for equalizing a waveform of the multilevel digital signal based on a predetermined partial response class and generating an equalizing playback signal, a detection module for generating binary data corresponding to data recorded on the optical disc based on the equalizing playback signal, a module for determining an amplitude value of each of an input signal to and an output signal from the equalizing module with respect to each binary data sequence output from the detection module, and a module for adjusting a high-frequency amplification amount of the filter such that an amplitude value before waveform equalization and an amplitude value after waveform equalization satisfy a predetermined relationship.Type: ApplicationFiled: April 25, 2011Publication date: August 18, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hideyuki YAMAKAWA
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Publication number: 20110188365Abstract: According to one embodiment, a method for operating log likelihood ratios in a disk apparatus is disclosed. Iterative decoding is applied to the disk apparatus. The method can set windows for a sequence of the log likelihood ratios output by a soft-decision most-likelihood decoder based on the sequence of the log likelihood ratios or an amplitude of a read signal acquired in response to read of data from a data sector on a disk carried out by a head. The method can multiply the log likelihood ratios contained in each of the windows, by a multiplier specific to each window. In addition, the method can transmit the sequence of the log likelihood ratios multiplied by the multiplier for each of the windows to a parity check decoder.Type: ApplicationFiled: October 14, 2010Publication date: August 4, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Nobuhiro MAETO
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Patent number: 7969848Abstract: A media defect compensation system and method may decouple effects of asymmetry from baseline error compensation computations. In some embodiments, a switching mechanism passes a baseline error signal into a baseline loop when a determination is made that a baseline error signal is not affected by asymmetry, and otherwise freezes the baseline loop when asymmetry may influence baseline error calculations.Type: GrantFiled: January 22, 2008Date of Patent: June 28, 2011Assignee: Marvell International Ltd.Inventors: Jin Xie, Mats Oberg, Jingfeng Liu, Zachary Keirn
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Patent number: 7965604Abstract: In step S1, the address generator generates address information composed of a sync signal which is recorded on an optical disc, address data and an error correction code for the address data, pre-encodes and supplies it to a modulator. At the same time, a carrier signal generator generates a carrier signal which is to carry the address information, and supplies it to the modulator. In step S2, the modulator makes MSK modulation of the carrier signal supplied from the carrier signal generator on the basis of the pre-encoded address information supplied from the address generator, and supplies a resultant MSK modulation signal to a wobbling unit. In step S3, the wobbling unit forms, on the optical disc, a spiral groove wobbled adaptively to the MSK modulation signal supplied from the modulator. In this optical disc, a given address can be accessed quickly and accurately.Type: GrantFiled: July 31, 2008Date of Patent: June 21, 2011Assignee: Sony CorporationInventors: Shoei Kobayashi, Nobuyoshi Kobayashi, Tamotsu Yamagami, Shinichiro Iimura
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Patent number: 7944791Abstract: An information reproducing method using PRML technology which provides asymmetry compensation and also assures media interchangeability. To compensate for asymmetry, target levels are basically adapted to readout signals and either restriction type (1) (time reversal and level reversal symmetry) or restriction type (2) (time reversal symmetry) is imposed between target levels. As a consequence, asymmetry compensation is made regardless of a readout signal distortion such as mark shift which might deteriorate media interchangeability.Type: GrantFiled: October 1, 2008Date of Patent: May 17, 2011Assignees: Hitachi, Ltd., Hitachi-LG Data Storage, Inc.Inventors: Hiroyuki Minemura, Masaki Mukoh
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Patent number: 7937650Abstract: According to one embodiment, a maximum likelihood decoder includes a branch metric calculator, a processor configured to perform addition, comparison, and selection of an output from the branch metric calculator and a path metric memory, and outputs a selection signal for identifying a selection result, a path memory configured to store a time variation of the selection signal, and a path detection module configured to detect a decoding signal based on the time variation of the stored selection signal. A decoding method includes selecting operation modes of at least one of the branch metric calculator, the processor, and the path memory between a first operation mode in which an operation is performed at a channel rate frequency and a second operation mode in which an operation is performed at a specific frequency lower than the channel rate frequency.Type: GrantFiled: June 4, 2009Date of Patent: May 3, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Norikatsu Chiba
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Patent number: 7936655Abstract: A read circuit of a disk drive system that adaptively reduces signal-dependent noise including a sequence detector, a signal-dependent adaptive engine and a signal-dependent post-processor. The sequence detector recovers a data sequence from equalized data. The signal-dependent adaptive engine generates signal-dependent coefficients, a mean value and a standard deviation of a signal-dependent error. The signal-dependent post-processor corrects the signal-dependent error.Type: GrantFiled: July 24, 2007Date of Patent: May 3, 2011Assignee: SAMSUNG Electronics Co., Ltd.Inventors: Ju-Hyung Hong, Il-Won Seo, Hyun-Wook Lim
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Patent number: 7920453Abstract: An adaptive equalization circuit (105) operates for PR-equalization of the reproduced signal that is subjected to an A/D conversion by an A/D converter (103) and shaped by a waveform shaping circuit (104). An ideal-waveform generation circuit (110) generates an ideal waveform that corresponds to the reproduced signal that is binarized by a Viterbi-decoding circuit (108). A mark-length/space-length calculation circuit (112) calculates the actual mark length/space length relative to the mark length/space length to be formed, based on the equalization error that arises when the ideal waveform assumes a central reference level as calculated by an equalization-error calculation circuit (111) and the intervals of polarity inversions of binarized data detected by a 0-cross detection circuit (109). A system controller (114) adjusts the edge shift quantity of the recording waveform when forming a mark based on the calculated mark length/space length.Type: GrantFiled: June 27, 2007Date of Patent: April 5, 2011Assignee: NEC CorporationInventor: Masaru Nakamura
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Patent number: 7916605Abstract: The present techniques provide systems and methods for decoding a data signal with a control bit to improve bit estimation. The techniques in one embodiment involve using decoding algorithms to estimate the a posteriori state probabilities and the a posteriori transition probabilities of the data encoding, and estimating bit state probabilities. The techniques further involve using a control bit in the bit stream and comparing the estimation of the control bit state in the segment of the bit stream with a test control bit determined based on an average of bit states from the encoded segment of the bit stream. If the estimation of the control bit and the test control bit are not equal, the state of the bit estimate with the lowest confidence probability will be changed.Type: GrantFiled: March 30, 2009Date of Patent: March 29, 2011Assignee: General Electric CompanyInventors: John Anderson Fergus Ross, Aria Pezeshk
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Patent number: 7907487Abstract: A recording/reproduction apparatus, comprising a first recording section for recording test information onto a medium using at least one recording power, a reproduction section for reproducing at least one test signal indicating the test information from the medium, and a second recording section for recording information onto the medium using one of the at least one recording power. The reproduction section comprises a decoding section for performing maximum likelihood decoding of the at least one test signal and generating at least one binary signal indicating a result of the maximum likelihood decoding, a calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the at least one test signal and the at least one binary signal, and an adjustment section for adjusting a recording power for recording the information onto the medium to the one recording power based on the reliability.Type: GrantFiled: November 6, 2009Date of Patent: March 15, 2011Assignee: Panasonic CorporationInventors: Harumitsu Miyashita, Takeshi Nakajima, Mamoru Shoji, Yasumori Hino
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Patent number: 7900124Abstract: The use of a multi-track format in both optical and magnetic data storage applications provides for a number of improvements to system performance including data density and data transfer rates. However, the full advantage in data density can only be achieved through the use of joint equalization and joint detection. The complexity of implementation of these functions arc addressed with a transform domain equalization architecture and a reduced complexity detection method based on a breadth first search of a time-varying trellis. The trellis results from a one dimensional representation of a two dimensional target response, obtained by arranging samples from adjacent tracks in a sequence that respects the original proximity of the samples.Type: GrantFiled: November 7, 2005Date of Patent: March 1, 2011Assignee: Koninklijke Philips Electronics N.V.Inventors: Thomas Conway, Richard Conway
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Publication number: 20110013500Abstract: A small size circuit reproducing data with low error rate even when a signal includes a non-linear distortion is desired. In such a circuit, the Viterbi method is performed. In the Viterbi method, branch metrics are calculated based on a difference of a sampled reproduction signal and a predetermined expectation values. Path metrics are calculated from the branch metrics. Paths among the plurality of paths having the calculated path metrics and merging at a same state are compared with one another. Based on the magnitude of the compared path metrics, survivor path is selected. In the circuit, for the path metrics of paths merging at a same state, offset corresponding to a determination result until a merging point is added to the paths for the comparison for determining the survivor path from the plurality of merging paths.Type: ApplicationFiled: June 30, 2010Publication date: January 20, 2011Applicant: NEC ELECTRONICS CORPORATIONInventor: Kinji KAYANUMA
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Patent number: 7852728Abstract: A digital signal reproducing apparatus includes an analog to digital converter for sampling and quantizing a signal read from an optical recording medium in accordance with a reproduced clock having a frequency which is one-half of a channel bit frequency and outputting an obtained digital RF signal, an offset compensation circuit for reducing an offset component in an amplitude direction from the digital RF signal, and a simplified interpolation filter for reconstructing a signal indicating a predetermined pattern recorded in the optical recording medium from the output signal of the offset compensation circuit and outputting the reconstructed signal. A control operation is performed to reduce the magnitudes of respective values shown by first phase error information on a section with the predetermined pattern and by second phase error information on a section other than the section with the predetermined pattern.Type: GrantFiled: July 20, 2006Date of Patent: December 14, 2010Assignee: Panasonic CorporationInventors: Youichi Ogura, Tatsushi Hiraki, Yorikazu Takao
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Patent number: 7835245Abstract: An evaluation value calculating apparatus includes the following elements. A difference metric selecting unit selects a difference metric for a specific recorded sequence in recorded sequences obtained in a maximum likelihood decoding process when information expressed with marks and spaces on a recording medium is played back, the difference metric being obtained in the maximum likelihood decoding process. A difference metric error value calculating unit determines a difference metric error value for the selected difference metric using a calculation method that is selected according to an edge shift direction of each of the marks on a time axis, the difference metric error value representing an error from an ideal difference metric and the edge shift direction on the time axis. A statistical processing unit performs statistical processing on the determined difference metric error value on the basis of each of states of path meeting points to generate an evaluation value.Type: GrantFiled: November 3, 2006Date of Patent: November 16, 2010Assignee: Sony CorporationInventors: Toshiki Shimizu, Jumpei Kura, Mariko Fukuyama
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Patent number: 7830766Abstract: A data reproduction apparatus for reproducing recorded data from an optical disk by using a PRML detection method is disclosed that includes an optical head including a light source, an optical system having an objective lens for condensing light emitted from the light source to the optical disk, and a photodetector for receiving light reflected from the optical disk, a signal generation circuit for generating an RF signal from a signal output from the photodetector, a phase correction circuit for correcting phase distortion of the RF signal when the recorded data are recorded in recording marks arranged with a pitch less than a diffraction limit, a clock extraction circuit for extracting a clock from the corrected RF signal, and a decoding circuit for decoding the recorded data from the RF signal in synchronization with the clock extracted by the clock extraction circuit.Type: GrantFiled: March 14, 2007Date of Patent: November 9, 2010Assignee: Ricoh Company, Ltd.Inventor: Ryosuke Kasahara
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Patent number: 7826323Abstract: A reproducing apparatus includes a signal reading unit for reading a signal from a recording medium, an equalizing unit for performing partial response equalization on the read signal and outputting an equalized signal, a maximum likelihood decoding unit for performing maximum likelihood decoding on the equalized signal to decode binary data and outputting a binary data string, a determining unit for determining whether or not a shortest code in the binary data string obtained by the maximum likelihood decoding is correct, on the basis of information on an amplitude of the equalized signal corresponding to the shortest code, a code correcting unit for correcting the shortest code in the binary data string, in accordance with a result of the determination of the determination unit, and a data demodulating unit for demodulating the binary data string obtained through the code correcting unit to obtain reproduction data from the recording medium.Type: GrantFiled: June 12, 2007Date of Patent: November 2, 2010Assignee: Sony CorporationInventor: Kenichi Hayashi
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Publication number: 20100260025Abstract: A method for evaluating reproduced signal wherein when Euclidean distance is calculated by judging the coincidence between a binary bit array and a predetermined evaluation bit array in the evaluation of the quality of reproduced signal, in a large capacity optical disc system with constraint length equal to or greater than 5, the assumption is made that the continuous 2T count included in a predetermined evaluation bit array is denoted by i and that each evaluation bit array is composed of a main bit array having a bit length of (5+2i) and auxiliary bit arrays added before and after the main bit array; judgment on whether binary bit arrays include the predetermined evaluation bit array, is concentrated on the coincidence judgment of the main bit arrays; and at the same time, the Euclidean distance between the reproduced signal and the target signal corresponding to the evaluation bit array is calculated with respect to each main bit array and the results of such calculations are separated and counted.Type: ApplicationFiled: September 29, 2009Publication date: October 14, 2010Inventors: Hiroyuki MINEMURA, Takahiro KUROKAWA
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Patent number: 7813247Abstract: Provided herein are hybrid laser diode drivers (LDDs) that drive a laser diode in response to receiving enable signals from a controller. In accordance with specific embodiments, a hybrid LDD includes a read channel to selectively output a read current, one or more write channel each to selectively output a write current, and an oscillator channel to selectively output an oscillator current. Additionally, in specific embodiments the hybrid LDD includes a decoder that receives the enable signals from the controller, and based on the enable signals, controls timing of the currents output by the read, write and oscillator channels.Type: GrantFiled: May 16, 2007Date of Patent: October 12, 2010Assignee: Intersil Americas Inc.Inventors: Theodore D. Rees, Akihiro Asada
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Patent number: 7808872Abstract: Provided herein are hybrid laser diode drivers (LDDs) that drive a laser diode in response to receiving enable signals from a controller. In accordance with specific embodiments, a hybrid LDD includes a read channel to selectively output a read current, one or more write channel each to selectively output a write current, and an oscillator channel to selectively output an oscillator current. Additionally, in specific embodiments the hybrid LDD includes a state machine that receives the enable signals from the controller, and based on the enable signals, controls timing of the currents output by the read, write and oscillator channels.Type: GrantFiled: May 16, 2007Date of Patent: October 5, 2010Assignee: Intersil Americas Inc.Inventors: Theodore D. Rees, Akihiro Asada
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Patent number: 7804754Abstract: In three consecutive cells consisting of a preceding cell, a center cell, and a subsequent cell, a possible change rate of the amplitude of a reproduced signal for the center cell with respect to the sum of the multiple values of the preceding and subsequent cells is obtained in advance. Then, for reproduction, the sum of the multiple values of the adjacent preceding and subsequent cells is obtained with respect to each cell. The amplitude of the reproduced signal obtained at the center cell is corrected to be closer to a reference value on the basis of the obtained change rate and sum.Type: GrantFiled: August 14, 2006Date of Patent: September 28, 2010Assignee: Canon Kabushiki KaishaInventors: Masakuni Yamamoto, Jun Sumioka, Kaoru Okamoto
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Patent number: 7778134Abstract: A waveform equalization control device includes a waveform equalizer that has a filter provided with a plurality of taps, updates the tap coefficient of each of the plurality of taps in accordance with a tap coefficient signal inputted thereto, causes the plurality of taps to respectively receive a plurality of values sampled at different time points from an input signal, performs waveform equalization with respect to the input signal, and outputs the signal after the waveform equalization, an equalization target value generation unit for determining an equalization target value, an error estimation unit for obtaining the error between the equalization target value and the signal after the waveform equalization, and a coefficient update unit for determining an amount of updating the coefficient of each of the taps of the filter of the waveform equalizer based on the error signal and on the input value to each of the taps and outputting the amount of updating the tap coefficient as the tap coefficient signal.Type: GrantFiled: July 20, 2006Date of Patent: August 17, 2010Assignee: Panasonic CorporationInventors: Seiji Matsui, Youichi Ogura