Abstract: A node in a network that receives data from a data source, such as another node. The receiving node sends a token identifier to the data source and receives data from the data source, along with the token identifier. A token identifier identifies a location in memory on the receiving node, but is not the same as an address in the memory. Thus, a token identifier is preferably neither a physical memory address nor a virtual address.

Abstract: Methods, systems, and computer program products producing, transporting, and capturing network traffic data are provided. The method includes associating a mirroring policy with a service profile assigned to a service subscriber, the service subscriber identified by a static Internet Protocol address. The method also includes associating a routing policy with the service profile. Upon detecting an active session for the service subscriber, the method includes mirroring traffic data generated as a result of subscriber activity, the mirroring implemented in accordance with the mirroring policy. The method further includes routing the mirrored traffic data through a public network to a central collection facility in accordance with the routing policy.

Abstract: One aspect relates to a communication protocol for communicating between one or more entities, such as devices, hosts or any other system capable of communicating over a network. A protocol is provided that allows communication between entities without a priori knowledge of the communication protocol. In such a protocol, for example, information describing a data structure of the communication protocol is transferred between communicating entities. Further, an authentication protocol is provided for providing bidirectional authentication between communicating entities. In one specific example, the entities include a master device and a slave device coupled by a serial link. In another specific example, the communication protocol may be used for performing unbalanced transmission between communicating entities.

Abstract: An image processing apparatus includes a compression/expansion device capable of compressing and expanding image data in a form of JBIG format, a nonvolatile memory which stores the image data compressed in the form of the JBIG format by the compression/expansion device, a deleting portion which makes image data-to-be-deleted stored in the memory un-restorable by deleting only head data of each plane having restoration information of the data-to-be-deleted.

Abstract: A high speed serial link structure and method are provided, comprising a data driver and a replica driver structure, the replica driver structure comprising a replica driver, a calibration engine and a peak level detector. The calibration engine compares a peak level detector output to a reference value and responsively performs a data driver adjustment, wherein the data driver adjustment comprises at least one of a driver biasing adjustment, a driver intermediate stage bandwidth adjustment and a driver equalization setting adjustment. In some embodiments, the calibration engine incorporates a comparator and a digital state machine; in other embodiments, it incorporates an analog operational amplifier.

Abstract: In a method and device for transfer of data over a data connection from a transmitter to a receiver by means of packets, repetition packets with respect to predetermined packets are transmitted given free transfer capacity The packets and their corresponding repetition packets comprise an identifier by use of which the receiver can identify the packets. Given a faulty transfer of a packet, the receiver can identify this quickly via the provision of the repetition packets and can introduce corresponding countermeasures This method is in particular provided for serial high-capacity data connections in which a faulty transfer of individual packets cannot be precluded in principle.

Abstract: A hardware emulation system is disclosed which reduces hardware cost by time multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The hardware emulation system comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common I/O pins and circuit board traces through the use of multiplexing.

Abstract: The yield of a semiconductor device is improved which has a large-scale logic circuit or which has both a logic circuit and a memory. A basic circuit block is provided with an input/output circuit. A transmission line and a branch line connect the input/output circuits so that information can be exchanged through the input/output circuits between one basic circuit block and another basic circuit block. The memory in each basic circuit block or in each input/output circuit can be programmed from the outside to designate the destination of a signal. By thus changing the program in the memory, the transmission destination of a signal can be changed to give various functions efficiently with a limited circuit scale. Moreover, if a basic circuit block fails another basic circuit block substitutes for it to improve the yield drastically.

Abstract: In one embodiment, distributed path computation elements (PCEs) collaboratively build local portions of an inter-domain P2MP path to each path destination or to each ingress border router of one or more respective successor domains based on a cost associated with using one or more local ingress border routers received from each predecessor domain. Once a furthest destination is reached, each PCE may recursively return a list of local ingress border routers used in the P2MP path to each predecessor domain, where each PCE receiving the list correspondingly prunes segments of its computed local portion of the P2MP path that lead to unused successor ingress border routers, and sends a prune message to its predecessor domains accordingly. A root PCE receives the final prune message(s) and a representation of each locally computed portion of the inter-domain P2MP path, and combines the portions into a final inter-domain P2MP path.

Abstract: An Intelligent Data Multiplexer (“IDM”) can be used to interface a plurality of host computers with a semiconductor manufacturing tool. In one embodiment, the IDM has a plurality of host-side ports configured to receive messages from each of the host computers interfaced with the semiconductor manufacturing tool. The IDM also includes a multiplexer configured to multiplex the messages received from the host-side ports. To process possible conflict messages from the host computers, the IDM has a conflict resolve module. The messages are then delivered from the IDM to the semiconductor manufacturing tool through a tool-side port used to connect the semiconductor manufacturing tool to the IDM.

Abstract: One embodiment of the present invention provides a control queue for an asynchronous circuit that includes a number of control modules coupled together linearly to form the control queue. These control modules include a prior module, a present module, and a next module. The present module is configured to receive one or more forward-going inputs from the prior module and one or more reverse-going inputs from the next module. The present module asynchronously generates one or more forward-going outputs to the next module and one or more reverse-going outputs to the prior module. The modules within the control queue are constructed so that the latency of the forward-going signals through the control queue is equal to the latency of the reverse-going signals through the control queue.

Abstract: The invention comprises several vehicle parameters transducers (1, 2, 3, 4) associated to respective slave circuits (10, 20, 30, 40) connected by a single, time-shared serial bus (60) with a master slave (50) which, when activated from a digital processing unit (DP), performs a communication with each one of the slave circuits, a bit frame circulating through said serial bus (60) according to a transmission protocol, without error correction, formed by a series of bit packets, each one with information from a corresponding slave circuit and separated by a short time interval, which information is stored in said master circuit (50) from where it is acquired by the (DP) through a parallel bus (70).

Abstract: One embodiment of the present invention provides an apparatus that selectively multiplexes a plurality of signal lines through an I/O pin on a semiconductor chip. This apparatus includes an I/O pin, for coupling a signal line within the semiconductor chip to a signal line outside of the semiconductor chip. A transmitting circuit is configured to selectively multiplex the plurality of signal lines onto the I/O pin. A receiving circuit is configured to receive multiplexed data from the I/O pin, and to reverse the multiplexing so that values originally from the multiplexed signal lines are separated into distinct signals in the receiving circuit. Note that the transmitting circuit and the receiving circuit are driven by a common clock signal. The apparatus additionally includes an initialization circuit that selectively configures the transmitting circuit and the receiving circuit to multiplex at least one of the plurality of signal lines through the I/O pin.

Abstract: A system for planning maintenance activities in a communication network is provided. The system comprises a query execution module, an out of sync record generator module, and a network maintenance function command module. The query execution module is operative to search a database to identify elements in the network that are out of sync. The out of sync record generator module is operative to record the identity of all the elements identified by the query execution module as being out of sync. The network maintenance function command module is operative to issue a series of commands wherein each command is operative to cause one of the out of sync elements to become in sync. The command module is also operative to issue the commands during a scheduled maintenance window.

Abstract: A packet detection technique is disclosed in which an average correlation signal is generated representative of the match between a repetitive sequence of symbols; an average power signal is generated representative of the average power in the sequence of symbols; a scaled magnitude of the average correlation signal scaled by a first predetermined scale factor is produced; and one of the average power signal and scaled magnitude of the average correlation signal are multiplied by the second scale factor and compared to determine whether there is a match between a repetitive sequence of symbols.

Abstract: A communication apparatus (100) includes a plurality of distributed communication elements (200). Each communication element (200) functions to communicate only with other neighboring communication elements. The coverage is so set as to allow local communications with other neighboring communication elements. The local communications allow a signal to be successively communicated between the communication elements, thereby conveying the signal to the communication element at the destination. The plurality of communication elements are divided into ranks according to their management functions. Route data can be set in each rank, thereby allowing a signal to be efficiently conveyed to the final destination.

Abstract: One embodiment of the present invention provides an apparatus that selectively multiplexes a plurality of signal lines through an I/O pin on a semiconductor chip. This apparatus includes an I/O pin, for coupling a signal line within the semiconductor chip to a signal line outside of the semiconductor chip. A transmitting circuit is configured to selectively multiplex the plurality of signal lines onto the I/O pin. A receiving circuit is configured to receive multiplexed data from the I/O pin, and to reverse the multiplexing so that values originally from the multiplexed signal lines are separated into distinct signals in the receiving circuit. Note that the transmitting circuit and the receiving circuit are driven by a common clock signal. The apparatus additionally includes an initialization circuit that selectively configures the transmitting circuit and the receiving circuit to multiplex at least one of the plurality of signal lines through the I/O pin.

Abstract: One embodiment of the present invention provides a method for selectively multiplexing a plurality of signal lines through an I/O pin on a semiconductor chip. The method starts by initializing a transmitting circuit and a receiving circuit to selectively multiplex the plurality of signal lines from the transmitting circuit through the I/O pin and into the receiving circuit. This initialization process includes selecting at least one of the plurality of signal lines to be multiplexed through the I/O pin, as well as synchronizing the transmitting circuit and the receiving circuit by asserting a reset signal. Once the transmitting and receiving circuits are initialized, the selected signal lines are multiplexed from the transmitting circuit through the I/O pin and into corresponding memory elements in the receiving circuit. Note that the transmitting circuit and the receiving circuit are driven by a common clock signal.

Abstract: A data transmission apparatus and a camera system for multiplexing serial data into horizontal blanking portions of video data for transmission between a CHU (1) and a CCU (2). On the transmitting side, resampled data is obtained by sampling the serial data using a clock signal of a frequency higher than that of the transmission rate of the serial data. A predetermined number of resampled data items are selected as multiplexing data from the resampled data obtained in each of the horizontal periods of the video data. The multiplexing data is multiplexed into the horizontal blanking portions of the video data for transmission. On the transmitting side, the multiplexing data is separated from the received video data. The separated multiplexing data is decoded so as to extract successively definite data constituting the initial serial data.

Abstract: A method for combining signals being conveyed across a digital interface is disclosed. In one embodiment, a subharmonic of a frequency is superimposed on asynchronous data. The subharmonic can be used to carry a frequency reference across the digital interface. In another embodiment, a time stamp algorithm is used to carry a time reference from a master circuit to a slave circuit across a digital interface. The transmission delay between the master circuit and slave circuit is measured. The master circuit transmits time correction messages to the slave circuit, based on the time the correction message is transmitted plus the transmission delay. In another embodiment, a reset signal is carried across a digital interface by discontinuing the transfer of a frequency reference for a predetermined time. A lowpass filter can be used at the receiving side of the interface to recognize the absence of the frequency reference and initiate a reset procedure at that side.

Abstract: A cost-effective power supply for providing full time electrical power to a customer premises telecommunications hub is disclosed. The supply includes an AC to DC power converter for converting power from the AC power grid to a DC voltage suitable for operating telecommunications equipment and for maintaining a backup battery at a fully charged float voltage. The converter includes a first rectifier section for generating an unregulated DC voltage. This voltage is switched through the primary of an isolation transformer by a pulse width modulated voltage controller. The output of the transformer is connected to a second rectifier circuit and filter to produce a regulated DC output voltage. The regulated voltage is connected to a voltage correction circuit through a divider including a temperature compensator so that the feedback to the voltage controller causes the regulated output voltage to follow the battery float voltage at all temperatures.

Abstract: An enhanced system and method is provided for network implementation to facilitate network users' access to an Internet Service Provider. The system and method employ an approach whereby a network user may initiate an Internet access request from the user's network interface (e.g., personal computer) and the Internet access service provider (ISAP) may in turn select a station number corresponding with one of a plurality of different Internet Service Providers to provide the desired Internet access. The system and method are particularly apt for use in a telephony environment. In such environment, a central office switch receives a request from a telephony subscriber and suspends processing of the call pending receipt of routing instructions from a service control point. Such service control point selects the telephone number for an ISP from a listing of ISP telephone numbers corresponding with a plurality of different ISPs. Such number is provided to the central office switch to complete call processing.

Abstract: A billing method and server for gathering and processing billing information for Internet telephony connections. Originating and terminating clients and Internet Service Providers ("ISPs") are identified by the server from information contained in digital packets. The digital packets also identify the beginning and ending time of the connection, as well as enhancements chosen for the particular connection, and choices of information to be displayed during the connection. The billing server transmits selected information to each client during the connection, such information including packet routing, packet density, elapsed time of connection, and available and selected enhancements. The server constructs a billing detail for each connection and constructs a billing record for each ISP and client over a specific time period. The server periodically forwards each billing record to its associated ISP.

Abstract: A receiver time at the reception instant of a transmission time marker contained in received data elements is determined. A multiplicity of successively received data elements are stored, and a receiver time which corresponds to a data element reception instant is also stored. Then the stored data elements are searched for a transmission time marker, and the receiver time is determined which corresponds to the reception instant of the transmission time marker, using the stored receiver time(s). The novel method is distinguished by the fact that the receiver time which corresponds to the reception instant of a single data element is stored per specific or indefinite multiplicity of stored data elements, and that the determination of the receiver time corresponding to the reception instant of the transmission time marker takes place on the basis of the stored receiver time(s). The determination is effected by extrapolating or interpolating based on the stored receiver time(s).

Abstract: A method for performing centralized billing for transactions conducted over the Internet between a user and an Internet Service Provider (ISP) (106) through an Internet Access Provider (IAP) (104) is disclosed. Upon connection of the user's terminal (101) to the IAP, the IAP transmits to a billing platform (108) a message that associates the user's identity and the temporary Internet Protocol (IP) address that is assigned by the IAP to the user's session for use by to that user's terminal. In response to a chargeable transaction with an ISP, the ISP transmits to the billing platform the IP address of the user making the transaction and the charge for the transaction. The charges for all such transactions are accumulated by a transaction server (109) and stored in an account on an associated database (110) identified with the IP address of the requesting terminal.

Abstract: The fiber-optic transceiver system combines EIA-232 data with IRIG-B time code information in a time multiplexing arrangement. The combined signal is transmitted to a receiver where the time code information is decombined from the data so that the two signals are replicas of their originals. The time multiplexing is accomplished by inserting a pulse into the data stream following the occurrence of a minimum time for each data bit and the coincidence of a time code pulse.

Abstract: An automobile multiplex communication system has a plurality of control units mounted on an automobile and interconnected by a communication cable for multiplex communications therethrough between the control units. The communication cable has a uniform characteristic impedance and comprising a plurality of communication cable segments. A plurality of modified-impedance units, each having an impedance different from the uniform characteristic impedance, are each connected between adjacent two of the communication cable segments.

Abstract: In a bandwidth-on-demand type communications system, like that provided with a code division multiple access (CDMA) cellular communications system, charging subscribers for calls based on communications length provides an inaccurate measure of communication cost, and further serves to discourage use of the system for data transmission applications. To provide a more accurate cost determination, the amount of bandwidth used by each communication is metered and multiplied by a charging rate. In particular, measurements of the maximum amount of bandwidth used during predetermined time intervals are made during the course of each communication, with the maximum bandwidth measurements being summed to determine an estimate of the total amount of bandwidth used during the communication. The charge for the communication is then determined by multiplying the estimated total bandwidth measurement by a charging rate multiplier.

Abstract: A programmable data link module (32) for use in a time division multiplexing control system (30) having a plurality of modules interconnected by a bus (40) for passing control signals between data link modules on a serial multiplex basis. Each module includes an integrated circuit (80) having signal conditioning circuits (180, 186 and 188) including a programmable hysteresis circuit (126), a power on reset delay circuit (190), a safety input inhibit circuit (220), a clock loss detect circuit (240), a safety output protection circuit (262), a data verifier (260), a polarity selector for a third output terminal (350), an input synchronizer (182 and 184), a combined mode/sync output terminal (110), a multiplex clock output terminal (108), a programing circuit (232) for accepting programing over the clock bus (44) and data bus (46), input/output word extender circuits (104, 106), a high voltage protection circuit (420) including a transistor (600) and a data bus integrity checker (630).

Abstract: A programmable data link module (32) for use in a time division multiplexing control system (30) having a plurality of modules interconnected by a bus (40) for passing control signals between data link modules on a serial multiplex basis. Each module includes an integrated circuit (80) having signal conditioning circuits (180, 186 and 188) including a programmable hysteresis circuit (126), a power on reset delay circuit (190), a safety input inhibit circuit (220), a clock loss detect circuit (240), a safety output protection circuit (262), a data verifier (260), a polarity selector for a third output terminal (350), an input synchronizer (182 and 184), a combined mode/sync output terminal (110), a multiplex clock output terminal (108), a programming circuit (232) for accepting programming over the clock bus (44) and data bus (46), input/output word extender circuits (104, 106), a high voltage protection circuit (420) including a transistor (600) and a data bus integrity checker (630).

Abstract: An automobile multiplex communication system has a plurality of control units mounted on an automobile body and having respective circuits which are connected to communication signal lines through respective connectors for multiplex communications between the control units. Shield wires which cover the communication signal lines between the control units are electrically separate from the connectors and connected to ground. The shield wires have respective ends grounded to a conductor of the automobile body outside of the control units or grounded to conductor housings of the control units.