Loopback Mode Patents (Class 375/221)
  • Patent number: 8238450
    Abstract: An apparatus comprising an artificial noise (AN) controller coupled to a digital subscriber line (DSL) transmitter and configured to adjust an AN level for a signal transmitted by the DSL transmitter, wherein the AN level is adjusted based on an actual signal to noise ratio (SNR) of the signal from the receiver to achieve a desired SNR for the signal. Also disclosed is a method comprising maintaining a data rate in a line at about a desired level by adjusting an AN level in a transmitted signal based on a SNR of a received signal.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: August 7, 2012
    Assignee: Futurewei Technologies Inc.
    Inventors: Sanjay Gupta, Amir H. Fazlollahi, Guozhu Long, Ying Li, Raphael Jean Cendrillon
  • Patent number: 8234540
    Abstract: A communication interface device, system, method, and design structure for error correcting code (ECC) protected quasi-static bit communication (SBC) on a high-speed bus are provided. The communication interface device includes high-speed sampling logic to capture high-speed data from the high-speed bus using a high-speed sampling clock and SBC sampling logic to capture SBC samples from the high-speed bus using an SBC sampling clock. The SBC sampling clock is slower than the high-speed sampling clock. The communication interface device also includes an SBC finite state machine (FSM) to detect a received SBC command in response to a static pattern persisting for a predetermined number of the SBC samples and command decoding logic to decode the received SBC command.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Peter Buchmann, Kevin C. Gower, Robert J. Reese, Martin L. Schmatz, Michael R. Trombley
  • Patent number: 8233520
    Abstract: A radio frequency (RF) signal communication system provided with amplifier predistortion comprises an antenna for wireless communication. Through the antenna and a receiving path of the system, RF signals are received and transmitted to a baseband module. The transmission path of the system comprises a predistorter and an amplifier, in which the predistorter performs predistortion to compensate signal distortion under the amplification by the amplifier. A coupler is utilized to sample a portion of RF signals output by the amplifier as the feedbacks for the predistortion.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: July 31, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Kwo-Jyr Wong
  • Patent number: 8229037
    Abstract: A system, method, and apparatus for a multiple data rate communication system is presented herein. The communication system receives data samples that are either sampled at a narrowband rate or a wideband rate and provides various functions and services, such as echo cancellation, DTMF detection and generation, and call discrimination. For wideband signals, a down-sampled signal is provided for each of the foregoing function and service. The output of the function or services is then recombined with the wideband signal.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: July 24, 2012
    Assignee: Broadcom Corporation
    Inventors: Wilf LeBlanc, Phil Houghton, Kenneth Cheung
  • Patent number: 8228972
    Abstract: A first device transmits data over a first branch of a communications link toward a second device. That second device loops the received data pattern back over a second branch of the communications link. A bit error rate of the looped back data pattern is determined and a pre-emphasis applied to the transmitted data pattern is adjusted in response thereto. The first device further perturbs the data pattern communications signal so as to increase the bit error rate. The pre-emphasis is adjusted so as to reduce the determined bit error rate in the looped back data pattern in the presence of the perturbation. The steps for perturbing the signal and adjusting the pre-emphasis are iteratively performed, with the perturbation of the signal increasing with each iteration and adjustment of the pre-emphasis being refined with each iteration. The signal is perturbing by injecting modulation jitter into the signal (increasing each iteration) and adjusting amplitude of the signal (decreasing each iteration).
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: July 24, 2012
    Assignee: STMicroelectronics, Inc.
    Inventors: Davide Tonietto, John Hogeboom
  • Patent number: 8224387
    Abstract: A beamforming system that can be used for both receive and transmit beamforming is provided. The system receives samples of a number of signals, each sample containing a band of frequencies and routes all sampled signals associated with the same beamformed frequency band to a predetermined processing block. A predetermined number of the routed sampled signals are selected sequentially according to predetermined criteria, weighted and accumulated to form a composite signal. Individual signals are then selected from the composite signal and routed to an appropriate output. The system uses a much smaller number of weighting functions than conventionally required, with processing for a single frequency being performed in the same processing block. This reduces the complexity of beamforming processing substantially and simplifies frequency reuse. In addition a single DSP design that works for both transmit and receive beamforming can be implemented.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: July 17, 2012
    Assignee: Astrium Limited
    Inventor: Andrew Mark Bishop
  • Patent number: 8218419
    Abstract: An access node of a communication system comprises a plurality of transmitters adapted for communication with at least one receiver. The access node is operative to simultaneously estimate channel coefficients between multiple ones of the transmitters and the receiver, and to utilize the estimated channel coefficients to control at least one data signal sent by at least one of the multiple transmitters to the receiver. In the process of simultaneously estimating the channel coefficients, the access node transmits a plurality of distinct probing signals, each of which is generated based on a distinct combination of a common probing sequence and a selected one of a plurality of different frequency expansions. The access node may comprise at least a portion of at least one central office of a DSL communication system.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: July 10, 2012
    Assignee: Alcatel Lucent
    Inventors: Gerhard Guenter Theodor Kramer, Carl Jeremy Nuzman
  • Patent number: 8214706
    Abstract: A semiconductor device including an electronic circuit, a memory, and an error detecting module. The electronic circuit is configured to receive an input signal having been generated by a test module, and generate an output signal based on the input signal. The memory is configured to store a predetermined output value that is expected to be output from the electronic circuit based on the electronic receiving the input signal, wherein the predetermined output value is stored in the memory prior to the input signal being generated by the test module. The error detecting module is configured to (i) generate a sample value of the output signal, (ii) compare the sample value of the output signal to the predetermined output value stored in the memory, and (iii) generate a result signal that indicates whether the sample value of the output signal matches the predetermined output value.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: July 3, 2012
    Assignee: Marvell International Ltd.
    Inventors: Masayuki Urabe, Akio Goto
  • Patent number: 8199836
    Abstract: Systems and methods are for generating a codebook by: generating a multi-resolution codebook by selecting a common precoder index from a low resolution codebook for a group of adjacent resource blocks (RB)s and for each RB within the group, selecting a high-resolution codebook to fine-tune each RB precoder; and generating feedback for the multi-resolution codebook by quantizing channel state variations.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: June 12, 2012
    Assignee: NEC Laboratories America, Inc.
    Inventors: Mohammad Ali Khojastepour, Xiaodong Wang
  • Patent number: 8200165
    Abstract: An embodiment of the present invention provides an apparatus, including a transceiver adapted for use in a wireless network using a fast feedback channel design that incorporates a 2-two level adaptive fast feedback channel framework separating uplink (UL) fast feedback channels into primary and secondary UL fast feedback channels.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: June 12, 2012
    Inventors: Hongmei Sun, Changlong Xu, Qinghua Li, Yuan Zhu, Senjie Zhang, Yang Y. G. Gao, Jong-Kae J. K. Fwu, Hujun Yin
  • Patent number: 8194721
    Abstract: An integrated circuit 2 includes a serial data transmitter 12 and a serial data receiver 14. A signal amplitude distorting circuit 30 is provided to introduce distortion in the amplitude of a serial data signal generated by the serial data transmitter 12 and looped back to the serial data receiver 14 so as to stress test the serial data receiver 14.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: June 5, 2012
    Assignee: Integrated Device Technology, inc
    Inventors: Carl Thomas Gray, Jason Thurston
  • Patent number: 8184752
    Abstract: A Multiple-Input Multiple-Output (MIMO) wireless communication system is provided. A receiving end includes a selector for selecting at least one stream for a MultiUser (MU) mode; a first generator for generating per stream channel quality information for the at least one selected stream as at least one candidate for channel information for the MU mode; and a determiner for determining one per stream channel quality information of the candidates as channel information for the MU mode.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: May 22, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Seok Ko, Yung-Soo Kim, Myeon-Kyun Cho, Eun-Yong Kim
  • Publication number: 20120120992
    Abstract: A VCO of a PLL outputs a first differential signal of frequency FVCO. A first divide-by-two circuit local to the VCO divides the first differential signal and outputs a first quadrature signal of frequency FVCO/2. Two of the component signals of the first quadrature signal are routed to a second divide-by-two circuit local to a first mixer of a first device. The second divide-by-two circuit outputs a second quadrature signal of frequency FVCO/4 to the first mixer. All four signals of the first quadrature signal of frequency FVCO/2 are routed through phase mismatch correction circuitry to a second mixer of a second device. In one example, FVCO is a tunable frequency of about ten gigahertz, the first device is an IEEE802.11b/g transmitter or receiver that transmits or receives in a first band, and the second device is an IEEE802.11a transmitter or receiver that transmits or receives in a second band.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 17, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Babak Soltanian, Jafar Savoj
  • Patent number: 8180003
    Abstract: The generation of per stream Channel Quality Information (CQI) in a Multiple-Input Multiple-Output (MIMO) wireless communication system is provided. An apparatus includes a receiver for receiving signals from a transmitting end via a plurality of antennas; an estimator for estimating channels per antenna in relation with the transmitting end using the received signals and constituting a channel matrix; and a generator for deriving per stream effective noise when a lattice reduction scheme is adopted and generating per stream CQI using the per stream effective noise. Thus, feedback information for a Closed Loop (CL) MIMO system can be produced by generating the per stream CQI using the effective noise obtained through the lattice reduction.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: May 15, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yajun Kou, Joo-Hyun Lee, Sang-Boh Yun
  • Patent number: 8179952
    Abstract: An integrated circuit is provided comprising: a serial transmitter, a serial receiver and a serial connection providing communication between the serial transmitter and the serial receiver. The integrated circuit further comprises a duty cycle distortion circuit so that the integrated circuit can be stress tested by distorting the duty cycle of a signal within the integrated circuit.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: May 15, 2012
    Assignee: Integrated Device Technology inc.
    Inventors: Jason Thurston, Carl Thomas Gray
  • Publication number: 20120063496
    Abstract: Transmitter circuits for generating baseband signals having low receiver-band noise are disclosed. In one embodiment, the transmitter circuit comprises an active filtering-and-amplifying component comprising a first input configured to receive a first input signal, and a first output configured to output a first output signal. The transmitter circuit further comprises a passive filtering component comprising a second input connected to the first output and configured to receive the first output signal, a passive pole arrangement comprising a number of switchable resistance elements and a capacitance element connected across the plurality of switchable resistance elements, and a second output configured to output a second output signal having reduced noise as compared to the first output signal. The transmitter still further comprises a number of feedback loops connecting the passive filtering component to the first input.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 15, 2012
    Applicants: RENESAS ELECTRONICS CORPORATION, IMEC
    Inventors: Vito Giannini, Tomohiro Sano, Mark Ingels, Jan Craninckx
  • Patent number: 8126038
    Abstract: The present invention overcomes various problems by defining two upstream masks (U1, U2) and two downstream masks (D1, D2) and using a mask selectable system for the long reach digital subscriber line (LDSL), in which a unique modem feature is activated during handshake to automatically check for physical layer status in terms of spectral compatibility and, thus, automatically optimize the boosted mode with the use of the mask selectable system choose the best combination of upstream/downstream masks in any physical layer noise scenario.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: February 28, 2012
    Assignee: Conexant Systems, Inc.
    Inventors: Patrick Duvaut, Ehud Langberg
  • Patent number: 8116362
    Abstract: A line card is proposed in which one or more DMT processing modules 1 communicate with a data link layer platform, such as an ATM, POSPHY or Ethernet processor. The data relating to a single symbol is transmitted between the data link layer platform and a given one of DMT processing modules in a plurality of data portions spaced apart in time. The data portions relating to different channels of a given DMT processing module (or to different DMT processing modules) are interleaved in time. Since the data portions of a given symbol are spaced apart in time, the data relating to a single symbol is transmitted over a longer time period than in conventional devices which reduces the effective burstiness of the traffic, and thus reduces the memory requirements of the data link layer platform.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: February 14, 2012
    Assignee: Lantiq Deutschland GmbH
    Inventors: Raj Kumar Jain, Hak Keong Sim
  • Publication number: 20120020392
    Abstract: A network element for a wireless communication system is locatable to couple at least one base station to an antenna array comprising a plurality of antenna elements. The network element comprises a plurality of independent transceiver circuits coupled to at least one of a plurality of respective antenna elements of the antenna array; and logic arranged to apply at least one complex digital signal to at least one transceiver signal path of a transceiver circuit of the plurality of independent transceiver circuits. A feedback path is arranged to provide feedback of the at least one complex digital signal such that it is capable of facilitating determination of latency mismatch error response between at least two transceiver signal paths. Adjustment means comprises delay logic arranged to receive a complex digital signal and provide a modified representation of the received complex digital signal in response to the latency mismatch error response of the at least two transceiver signal path.
    Type: Application
    Filed: February 10, 2010
    Publication date: January 26, 2012
    Inventors: Conor O'Keeffe, Michael William O'Brien
  • Patent number: 8090009
    Abstract: A test apparatus includes a transmitting-side jitter measuring unit which measures a jitter of a transmission signal output from a transmitting circuit, a jitter applying unit which applies a jitter to the transmission signal and inputs the signal to a receiving circuit, a jitter range measuring unit which determines whether the logical value of the transmission signal detected by the receiving circuit is equal to a preset expectation value for each amplitude of the jitter applied to the transmission signal by the jitter applying unit, and measures the range of jitter amplitudes within which the logical value of the transmission signal is equal to the expectation value, and a jitter tolerance measuring unit which calculates jitter tolerance of the receiving circuit based on the jitter of the transmission signal measured by the transmitting-side jitter measuring unit and the range of jitter amplitudes measured by the jitter range measuring unit.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: January 3, 2012
    Assignee: Advantest Corporation
    Inventor: Kenichi Nagatani
  • Patent number: 8077763
    Abstract: A system comprising a transmitter element creating an interrogation signal and transmitting the interrogation signal and a receiver element receiving a reflection signal of the interrogation signal and combining the reflection signal and a feedback signal to cancel at least a portion of radio frequency echo signals in the reflection signal.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: December 13, 2011
    Assignee: Symbol Technologies, Inc.
    Inventors: Mark Duron, Raj Bridgelall
  • Patent number: 8073069
    Abstract: A multi-user MIMO downlink beamforming system with limited feedback (200) is provided to enable preceding for multi-stream transmission, where a channel codeword (ui) and one or more channel quality indicator values (CQIA, CQIB) are computed at the user equipment (201.i) on the basis of maximizing a predetermined SINR performance metric (?i) which estimates the receive signal-to-noise-ratio (SINR) at the user equipment (201.i). The computed codeword (ui) and CQI values (or differential values related thereto) are quantized and fed back to help the base station (210) which applies a correction to the appropriate CQI value in the course of designing the transmit beamforming vectors w and determining the appropriate modulation and coding level to be used for downlink data transmission.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: December 6, 2011
    Assignee: Apple Inc.
    Inventors: Jayakrishnan C. Mundarath, Jayesh H. Kotecha
  • Publication number: 20110292978
    Abstract: Calibration of quadrature imbalance in direct conversion transceivers is contemplated. A transceiver controller may perform a self-calibration to address quadrature imbalance. The controller may couple the radio frequency (RF) section of the transmitter to the RF section of the receiver via a loopback path and transfer a wideband signal into the transmitter. In the loopback path, the controller may phase-shift the wideband signal that propagates through the transmitter using two different phase angles to produce two different signals that propagate into the receiver. By measuring the transmitter and receiver signals, and performing a Fast Fourier Transform calculation, the controller may be able to calculate correction coefficients, or parameters, which may be used to adjust elements that address or correct the quadrature imbalance for both the transmitter and receiver.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Inventor: Lior Kravitz
  • Patent number: 8069378
    Abstract: A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive circuit. A similar pattern of information is generated in the receive circuit and used as a reference. The receive circuit compares the patterns. Any differences between the patterns are observable. In one embodiment, a linear feedback shift register (LFSR) is implemented to produce patterns. An embodiment of the present disclosure may be practiced with various types of signaling systems, including those with single-ended signals and those with differential signals. An embodiment of the present disclosure may be applied to systems communicating a single bit of information on a single conductor at a given time and to systems communicating multiple bits of information on a single conductor simultaneously.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: November 29, 2011
    Assignee: Rambus Inc.
    Inventors: Jared Zerbe, Pak Shing Chau, William Franklin Stonecypher
  • Patent number: 8064503
    Abstract: A multicarrier communication apparatus and the like wherein the arithmetic amount required for calculating a reception weight by which a multicarrier signal is to be multiplied is suppressed, while the reception characteristic for the multicarrier signal is improved. In the apparatus, a subcarrier transmission weight generating part (513) generates a transmission weight of each subcarrier, based on channel information of each subcarrier received from a channel information generating part (511) and a reception weight of each subcarrier group received from a subcarrier group reception weight generating part (512). The subcarrier transmission weight generating part (513) inputs the generated transmission weights of the respective subcarriers to the corresponding ones of multipliers (522).
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: November 22, 2011
    Assignee: Panasonic Corporation
    Inventors: Yasuaki Yuda, Tomohiro Imai, Kenichi Miyoshi
  • Patent number: 8059703
    Abstract: A system includes a plurality of modules which are configured for determining a suitable impedance for a modem. The plurality of modules send signals with a plurality of signal frequencies to a telephone and receive feedback signals from the telephone under each of a plurality of impedances of the modem, compute a total decibel value of the feedbacks under each impedance, and determine a suitable impedance according to a minimum total decibel value from the plurality of total decibel values.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: November 15, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Che-Ming Lee, Yew-Min Lo
  • Patent number: 8054892
    Abstract: Described embodiments provide a method and system for signal compensation in a SERDES communication system that includes monitoring the quality of a data signal after passing through a transmission channel. The quality of the data signal is monitored with at least one of a BER calculation algorithm and a received eye quality monitoring algorithm. Variations in channel length of the transmission channel are compensated for by i) adjusting a length of transmission line delay of the data signal from the transmission channel, ii) comparing the data signal quality with a threshold for the adjusted data signal; and iii) repeating i) and ii) until the data signal quality meets the threshold.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: November 8, 2011
    Assignee: Agere Systems Inc.
    Inventors: Pervez M. Aziz, Adam Healey, Shawn Logan
  • Patent number: 8050373
    Abstract: A system and method is provided for phase interpolator based transmission clock control. The system includes a transmitter having a phase interpolator coupled to a master timing generator and a transmission module. The phase interpolator is also coupled to a receiver interpolator control module and/or an external interpolator control module. When the system is operating in repeat mode, the transmitter phase interpolator receives a control signal from a receiver interpolator control module. The transmitter phase interpolator uses the signal to synchronize the transmission clock to the sampling clock. When the system is operating in test mode, a user defines a transmission data profile in an external interpolator control module. The external interpolator control module generates a control signal based on the profile. The transmitter phase interpolator uses the signal to generate a transmission clock that is used by the transmission module to generate a data stream having the desired profile.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: November 1, 2011
    Assignee: Broadcom Corporation
    Inventors: Aaron W. Buchwald, Michael Le, Hui Wang, Howard A. Baumer, Pieter Vorenkamp
  • Patent number: 8040940
    Abstract: A transmitter/receiver device includes: a transmitter unit including a parallel/serial converting circuit, a waveform deteriorating circuit, and a transmitter circuit; and a receiver unit including a receiver circuit, a serial/parallel converting circuit, and an error detecting circuit. The parallel/serial converting circuit converts a transmitter-side parallel signal to a transmitter-side serial signal. The waveform deteriorating circuit deteriorates a signal waveform of the transmitter-side serial signal. The transmitter circuit transmits to the receiver unit the signal whose waveform is deteriorated. The receiver circuit receives, as a receiver-side serial signal, the signal transmitted from the transmitter circuit. The serial/parallel converting circuit converts the receiver-side serial signal to a receiver-side parallel signal. The error detecting circuit detects a bit error rate of the receiver-side parallel signal.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: October 18, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Tsutomu Satou
  • Publication number: 20110243205
    Abstract: A method of compensating for an error and a transceiver system using the method. The method includes determining whether a distortion occurs in data received by a receiving unit; if it is determined that the distortion occurs in the received data, changing at least one of a plurality of transmission parameters of the received data by one step; transmitting the received data using the changed at least one transmission parameter in a transmitting unit; and repeatedly performing the determining, the changing, and the transmitting until it is determined that the distortion does not occur in the received data.
    Type: Application
    Filed: February 18, 2011
    Publication date: October 6, 2011
    Inventors: Dong-ho CHOI, Young-min Ku, O-deuk Kwon
  • Patent number: 8019014
    Abstract: A pre-coding process and apparatus on account of adaptive estimation is provided, which comprises a plurality of channel state information detectors, a reduction sampler, a plurality of adaptive estimators, an error-estimation averager, and a parallel/serial transducer. The pre-coding implementation of the present apparatus can be divided in an initial stage of acquisition and a following tracking stage. The present invention can be applied to Single-Input Single-Output (SISO) antenna system and Multiple-Input Multiple-Output (MIMO) antenna system, in order to advance the dependability and stability of the system, which also have advantage in further decreasing the complexity, power consumption and cost of the end-user host receiver, easy implementation, and high immunity from channel noise interference.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: September 13, 2011
    Assignee: Chunghwa Telecom Co., Ltd.
    Inventor: Chia-Hung Liau
  • Patent number: 8018914
    Abstract: A demodulation section 13 receives a TDMA-TDD based phase-modulated burst signal of mobile communications and demodulates the burst signal by a synchronous detection system (or a quasi-synchronous detection system). The demodulation section 13 includes a frequency deviation compensation section and a carrier recovery section each having a loop filter 14 with three or more stages of time constants. The time constants are switched by a selector switch 15 based on a control signal from a demodulation control section 16. This achieves quick pull-in and jitter after convergence is minimized, thereby allowing highly efficient performance of frequency deviation compensation, etc. that is required for synchronous detection (or quasi-synchronous detection) without increasing the size of circuit.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: September 13, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Taisei Suemitsu
  • Patent number: 8019018
    Abstract: In one aspect, the invention is a method that includes transferring data at an initial mode from a transmitter to a receiver, determining a suggested mode based on the data transferred and determining a count of the data transferred from the transmitter to the receiver. The method also includes transferring the suggested mode and the count to the transmitter and determining a pending mode based on the suggested mode and the count.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: September 13, 2011
    Assignee: Powerwave Cognition, Inc.
    Inventors: Daniel R. Cormier, Peter Do, Alan V. Ly
  • Patent number: 8014440
    Abstract: A frequency adjusting method of a CDR circuit and apparatus thereof are provided. The adjusting method is applied to a receiver apparatus connected to an outer apparatus. The outer apparatus, after actuated, sends out an outer data signal to the receiver apparatus according to its operational frequency and a PLL of the receiver apparatus outputs a transmitter clock according to an operational frequency of the receiver apparatus. The CDR circuit of the receiver apparatus generates a receiver clock according to the outer data signal. The CDR circuit is set in a phase mode such that the receiver clock follows transmitting frequency of the outer data signal. Then, a difference between frequencies of the receiver clock and the transmitter clock is checked. If the difference is larger than a threshold value, an operational frequency of the outer data signal is reduced.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: September 6, 2011
    Assignee: VIA Technologies, Inc.
    Inventor: Chin-Fa Hsiao
  • Patent number: 8009571
    Abstract: A method, system and apparatus are provided for detecting a loop-back in a physical layer on an Ethernet link. In the physical layer, a device sends a base page on the Ethernet link. The base page has at least one next page capability bit set. Subsequently, the device receives a received base page. Thereafter, for detecting the loop-back, the next page capability bit is set in the received base page is determined.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: August 30, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Saravan Arunachalam, Hugh Barrass
  • Patent number: 8009726
    Abstract: In the present invention, a plurality of carriers in a multi-carrier DMT communication system is grouped into one or multiple carrier groups according to at least one carriergroup parameter. A carriergroup parameter defines a parameter relating to each carrier group rather than to individual carriers, and is used for receiving and transmitting messages or data using the carrier group or groups. In one embodiment of the present invention, multiple carrier groups of fixed-size are determined and the worst case signal-to-noise ratio for each carrier group is used for the carriergroup parameter for that specified carrier group. In another embodiment of the present invention, multiple carrier groups of variable-size are determined based on a carriergroup parameter such as a carriergroup bitloading parameter. The carriergroup bitloading parameter and the worst case carriergroup SNR parameter for each carrier group are used to define each carrier group for transmitting and receiving messages or data.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: August 30, 2011
    Assignee: Broadcom Corporation
    Inventor: Dimitri Saey
  • Patent number: 8009780
    Abstract: A multiple-input multiple-output (MIMO) wireless communication system includes a first calculator for calculating pairwise error rates (PERs) for each modulation scheme combination which comprise elements smaller than or equal to receive antennas in number; a second calculator for calculating symbol error rates (SERs) for the each modulation scheme combination using the PERs; a converter for converting the SERs to effective signal to noise ratios (SNRs); and a determiner for determining one among sets of effective SNR per stream acquired from the modulation scheme combinations, as a final effective SNR per stream.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: August 30, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Seok Ko, Tak-Ki Yu, Yung-Soo Kim, Myeon-Kyun Cho
  • Publication number: 20110206100
    Abstract: Data is received with a transceiver circuit with a receiver branch (14) that comprises a notch filter (140) and a digital Fourier transformer (146). Furthermore the transceiver circuit has a transmitter branch (16) comprising an inverse digital Fourier transformer (160). Prior to reception the transceiver circuit is switched to a calibration mode, wherein an output of the transmitter branch (16) is coupled to an input of the notch filter (140). The inverse digital Fourier transformer (160) of the transmitter is used to compute an inverse transform of a spectrum with a frequency component at a selected position. A signal derived from the inverse transform is applied to an input of the notch filter (140) in the calibration mode. The digital Fourier transformer (146) is used to Fourier transform an output signal of the notch filter (140). A control setting of the notch filter to suppress the frequency component from an output of the digital Fourier transformer (146) is determined.
    Type: Application
    Filed: August 6, 2009
    Publication date: August 25, 2011
    Applicant: NXP B.V.
    Inventors: Ajay Kapoor, Maurice Stassen, Jozef Reinerus Maria Bergervoet, Harish Kundur Subramaniyan
  • Patent number: 8000382
    Abstract: Certain aspects and embodiments provide for accurate measurement and estimation of imbalances between in-phase (I) and quadrature (Q) components of a complex baseband signal. The accuracy of I/Q phase imbalance estimates may be enhanced by conducting them on a transmitter and a receiver that are connected via a local, loopback connection and by removing cross-spectrum interference in transferred packets. Once these accurate I/Q phase imbalances are determined, they may be used to adjust a signal processed by the transmitter or the receiver to increase the performance and data throughput of communications using the signal.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: August 16, 2011
    Assignee: Qualcomm Incorporated
    Inventors: Hakan Inanoglu, Leon Metreaud, Mark S. Wallace, Xiangdong Zhang
  • Patent number: 7995644
    Abstract: An apparatus, system, method and computer program product for secure ranging between at least two devices in radio communications with each other. In particular, an apparatus, system, method and computer program product for secure ranging between at least two devices communicating via ultra wideband (UWB) protocols. Either ternary-IR or time-hope-IR sequences are used for ranging and security. A first device transmits a range packet. A second device responds to the range packet after a delay time known only to the first and second devices. The delay time can be selected randomly by either to the first device or the second device and made known to the other device in an encrypted notification packet.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: August 9, 2011
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Zafer Sahinoglu, Philip V. Orlik, Andreas F. Molisch
  • Patent number: 7992058
    Abstract: A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The endpoint device loops back the unencoded test symbols to the host device. The host device drives at least some bits of each unencoded test symbol onto host device data signals and drives at least some bits of each unencoded test symbol onto host device control signals.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: August 2, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter D. Maroni, Gregg B. Lesartre
  • Patent number: 7978664
    Abstract: A multimode-multiband terminal includes an RF antenna for transceiving a CDMA-2000 signal and/or a WCDMA signal; an RF transceiver for demodulating a WCDMA pilot signal received from the RF antenna and outputting the demodulated WCDMA pilot signal; a pilot signal measurement unit for measuring an intensity of the demodulated WCDMA pilot signal to generate an Ec/Io; a WCDMA modem and a CDMA-2000 modem for performing a call processing according to protocols defined by a WCDMA standard and a CDMA-2000 standard, respectively; a flash memory for storing therein a modem-to-modem switching program capable of performing a switching between the WCDMA modem and the CDMA-2000 modem based on the Ec/Io; and a controller for loading the modem-to-modem switching program and activating the CDMA-2000 modem if a time lapse during which the Ec/Io is maintained smaller than a predetermined CDMA-2000 ON threshold THON is greater than a preset CDMA-2000 ON condition time Hd.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: July 12, 2011
    Assignee: SK Telecom Co., Ltd.
    Inventor: Young-Iak Kim
  • Patent number: 7962103
    Abstract: A PDMA terminal establishes communication by forming a plurality of spatial paths to another single radio apparatus. A plurality of antennas constituting an array antenna are divided into a plurality of subarrays corresponding to the plurality of spatial paths respectively. An adaptive array processing unit can perform an adaptive array processing for each of the plurality of subarrays. A memory stores in advance information on the number of antennas associated with the number of spatial paths that can be formed by the array antenna. A control unit controls a processing to transmit possible multiplicity information to another radio apparatus at a prescribed timing.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: June 14, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yoshiharu Doi
  • Patent number: 7962808
    Abstract: The present application describes a method and system for testing the compliance of a PCIE expansion system to verify that data signals transmitted through multiple data lanes in the expansion system comply with the PCIE requirements. The method for testing a PCIE expansion system comprises delivering the data signals from the data lanes to a compliance board that is configured to loop back at least a first portion of the data signals and transmit a complementary second portion of the data signals to a testing device, and testing a compliance of the second portion of the data signals with the PCIE requirements. The first portion of the data signals is then tested through a second compliance board that is configured to loop back the second portion of the data signals and transmit the first portion of the data signals to the testing device.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: June 14, 2011
    Assignee: NVIDIA Corporation
    Inventor: Yuan Li
  • Patent number: 7949041
    Abstract: A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: May 24, 2011
    Assignee: Rambus Inc.
    Inventors: Jared L. Zerbe, Fariborz Assaderaghi, Brian S. Leibowitz, Hae-Chang Lee, Jihong Ren, Qi Lin
  • Patent number: 7944235
    Abstract: High-speed serial interface (“HSSI”) transceiver circuitry (e.g., on a programmable logic device (“PLD”) integrated circuit) includes input buffer circuitry with adaptive equalization capability. The transceiver circuitry also includes an output driver, which may include pre-emphasis capability (preferably controllably settable). Selectively usable loop-back circuitry is provided for allowing the output signal of the input buffer to be applied substantially directly to the output driver. The loop-back circuitry may include a loop-back driver, which may be turned on substantially only when needed for loop-back operations.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: May 17, 2011
    Assignee: Altera Corporation
    Inventors: Sergey Shumarayev, Thungoc M. Tran, Simardeep Maangat, Wilson Wong
  • Patent number: 7936809
    Abstract: Any number of transceiver channels is tested for jitter generation/tolerance simultaneously. Tested channels use a serial loopback path to connect a transceiver transmit channel to a transceiver receiver channel. Both the transmitter and receiver PLLs are connected to a common reference clock. The reference clock is modulated with jitter at a frequency below the bandwidth of the transmitter PLL but above the bandwidth of the receiver PLL. The magnitude of eye closure (in an eye diagram), which is equivalent to the amplitude of the jitter, is used to filter out bad transceiver units.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: May 3, 2011
    Assignee: Altera Corporation
    Inventors: Kenneth T. Daxer, Sergey Shumarayev
  • Publication number: 20110075715
    Abstract: Apparatuses, systems, and methods for calibration of quadrature imbalance in direct conversion transceivers are contemplated. A transceiver controller may perform a self-calibration to address quadrature imbalance. The controller may isolate the transmitter and receiver from any antennas, couple the radio frequency (RF) section of the transmitter to the RF section of the receiver via a loopback path, and inject a calibration signal into the transmitter. In the loopback path, the controller may phase-shift the signal that propagates through the transmitter using two different phase angles to produce two different signals that propagate into the receiver. By measuring the two different signals that exit the receiver, the controller may be able to calculate correction coefficients, or parameters, which may be used to adjust elements that address or correct the quadrature imbalance for both the transmitter and receiver.
    Type: Application
    Filed: September 25, 2009
    Publication date: March 31, 2011
    Inventor: Lior Kravitz
  • Patent number: 7903746
    Abstract: A mechanism uses in-situ bidirectional cable wrapping for determining different cable lengths. A calibration mechanism calibrates the high speed transmitter/receiver pair characteristics, and, thus, optimizes the transmission performance between subsystems. The calibration mechanism mitigates the need for frequent error correction and does not incur the performance degradation associated with error correction techniques.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: March 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Brian James Cagno, Gregg Steven Lucas, Thomas Stanley Truman
  • Patent number: 7873031
    Abstract: Certain exemplary embodiments provide a method, comprising: receiving, at a subscriber interface line card, an analog signal from a POTS subscriber loop circuit; quantizing the analog signal into a plurality of digital samples; encoding the plurality of digital samples via codec instructions running on a digital signal processor installed on the subscriber interface line card; and converting, via conversion instructions running on the digital signal processor, the encoded plurality of digital samples to a plurality of VoATM packets.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: January 18, 2011
    Assignee: AT&T Intellectual Property II, L.P.
    Inventors: Farhad Barzegar, Irwin Gerszberg, Thomas W. Hill, Scott J. Mollica