Abstract: A receiver of a frequency-shift-keying, continuous-wave radar comprises at least sampling means taking real samples of the signals in each reception channel and extrapolation means, the extrapolation means producing fictitious samples synchronous with the real samples, the reception signals being formed out of real samples and fictitious samples. Application especially to radars fitted into automobiles.

Abstract: A system for the estimation of the complex gain of a transmission channel is designed for parallel type modulators/demodulators that can be used in digital radio broadcasting. The system includes a given number N of sets of interpolators to estimate the gain on a useful symbol from known symbols constituting gain references evenly positioned in the transmitted signal, each set of interpolators being adapted to a particular situation of reception, ranging from a stable single-path channel to a channel with high temporal dispersion and high instability. The outputs of the interpolators are coupled to a selection device programmed to choose the set of interpolators that gives the weakest estimated noise during a specified length of time. Such a system may find application to digital radio transmission.

Abstract: A digital broadcast program broadcast with a first network is transmitted to a second network. A tuner 41 selects digital broadcast signal having a predetermined transmission frequency and ECC decoder 43 obtains MPEG2 TS packet S3 as the digital broadcast data on the digital satellite broadcasting. An NIT detecting circuit 44 detects NIT from the MPEG2 TS packet S3 and a control unit 31 changes the NIT to obtain a table NITb applicable to CATV. A NIT substitution circuit 48 detects NIT from the MPEG2 TS packet S3 and substitutes table the NITb for the NIT to obtain MPEG2 TS packet S4 as the digital broadcast data on the CATV. Then, an error correct code is added to the MPEG2 TS packet S4 and the added packet S4 is modulated. Then, modulated one is frequency-converted to obtain digital broadcast signal BS-1 having a predetermined transmission frequency for the CATV.

Abstract: A method for handling missing or untimely synchronization signals in digital communications systems. Upon detecting the absence of a synchronization signal, an estimation of the absent synchronization signal is made based on a plurality of previously received synchronization signals, and the estimated synchronization signal is used in place of the absent synchronization signal. The estimated synchronization signal is corrected upon the receipt of a subsequent synchronization signal.

Abstract: In a splitterless Digital Subscriber Line (DSL) modem 30, a receiver architecture (100) that permits monitoring of harmonics within the upstream channel of a DSL connection. The receiver (100) can detect the harmonics by monitoring the harmonics in some empty tones or specified tones. A threshold can be set to differ the normal noise power and harmonics power in those empty or specified tones. When a POTS device (10) coupled to same wire line pair (20) as the DSL modem (30) goes off-hook, the DSL modem (30) can switch from the normal state to an off-hook state in which the harmonics are reduced to minimum by transmitting only the upper sub-band tones of the upstream transmission channel at reduced power levels.

Abstract: A frequency shift modulation circuit has a direct digital synthesizer DDS and a phase-locked loop PLL. DDS stores output signal frequency data in a plurality of registers. DDS selects the register storing the frequency data in accordance with a frequency shift keying FSK data signal whose voltage was controlled by a comparator. A signal output from DDS is input to PLL. PLL generates a signal whose phase is synchronized with the signal supplied from DDS, and outputs a frequency shift signal having a shift amount corresponding to the digital value of the FSK data signal. The FSK data signal is input via a balance adjustor to PLL so that a large frequency shift is possible. Since the frequency data is set to DDS, a stable modulation even for a low frequency is possible. In this manner, the frequency of an output signal can be stably shifted.

Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.

Abstract: A frequency modulation method and modem unit for a frequency modulation using a common filter which uses a large number of carrier frequencies include a frequency-shifting unit for subjecting an input data to a frequency shift corresponding to a binary data value, a filter for limiting an output obtained by the frequency-shifting unit to a common band, and a modulation unit for frequency-modulating an output obtained by the filter, by a carrier frequency having an intermediate value of the frequencies respectively corresponding to the binary data values.

Abstract: The present invention includes a method for generating a GMSK modulating signal from a serial digital data bit stream whereby the GMSK modulating signal modulates a carrier frequency signal associated with a GMSK transmitter of a digital communications system. Specifically, the method includes converting each set of m consecutive data bits of the bit stream into a parallel symbol, whereby there are 2.sup.m possible symbols. Each symbol is generally defined as (B.sub.-(m-1). . . B.sub.0), where B.sub.0 is the current data bit and B.sub.-(m-1) is the mth previous data bit with respect to B.sub.0. Next, a corresponding phase advance is assigned to each of the 2.sup.m symbols, each phase advance being substantially equivalent to a percent phase advance contributed by the m consecutive data bits of each symbol. Also, four corresponding accumulated phases are assigned to each of the 2.sup.m symbols, each accumulated phase being derived from a multiple of 90 degrees.

Abstract: An M-ary FSK receiver in which a frequency down-converted signal is treated as an M-ary DPSK signal with symbol repetition coding. The output of a frequency demodulator (20) is integrated (22) over an optimally chosen time interval which is a fraction of the symbol interval to obtain N phase change estimates per symbol. These N sub-symbols are manipulated (24, 26) to obtain corresponding soft decisions which are then summed (32, 34) over a symbol period (or a substantial fraction thereof) to provide an overall soft decision for each bit comprising an M-ary symbol. These outputs may be used directly as soft decisions for forward error correction or applied to a threshold circuit to obtain hard decisions.

Abstract: A highly reliable and high-speed data transmission is made by using an FH or MFSK mode as suitably selected according to the usage of channels. When a reception signal is entered into a receiver through a transmission line, (i) a signal processing unit supplies the spectrum intensity values of carrier frequencies, (ii) a channel detection unit controls the phase of a time slot based on the spectrum intensity values, selects the MFSK or FH modulation mode, and supplies reception code data corresponding to detected carrier frequencies, and (iii) a decoder supplies reception information data based on the reception code data.

Abstract: A selective call communication system (10) has a selective call device (100) for transmitting a frequency hopped spread spectrum signal (320) encoded as Reed Solomon code words and modulated as a four-level frequency shift keying (4FSK) signal. A base site transceiver (156) receives the signal on a plurality of narrow band channels. A digital signal processor (DSP)(152) performs a fast fourier transform on the signal to generate frequency samples. The DSP (152) has a comparator (342) that compares an 4FSK symbol to a predetermined threshold, a determinator (344), in response to the comparator (342), determines when there is an interference signal jamming the narrow band channel, an erasure marker (346) marks a position in the Reed Solomon symbol determined to be jammed as an erasure and an error correcting code (348) corrects errors in the Reed Solomon code words marked with erasures.

Abstract: A frequency-locked loop (100) employs a controllable oscillator (102) for generating an output signal having a frequency, optional sampler (104), coupled to oscillator (102), for sampling the frequency of the output signal, a divider (106), coupled to optional sampling circuit (104), for dividing the output signal frequency to generate a prescaled signal and a microprocessor (108), coupled between the divider 106 and oscillator (102), for comparing the prescaled signal to a reference signal and generating a control signal for correcting frequency shifts based upon the comparison. The control signal generated by microprocessor (108) is non-continuous. During that time when microprocessor (108) generates no control signals, power is removed from various frequency-locked loop circuitry.

Abstract: A class 2 or UART data communication bus is subject to disruption by induce high frequency currents because of an impedance mismatch between a passive pull-up or pull-down resistor and a lower impedance active current sourcing or sinking stage. An impedance reduction circuit across the passive resistor balances the impedance in the presence of high frequency noise. The impedance reduction circuit is operative when it senses a bus line voltage slew rate greater than that caused by data pulses and a voltage change greater than one diode drop.

Abstract: A communications system employs a high-speed digital link with discrete multiple tone (DMT) the outward paths from a central transmitter/receiver to further transmitter/receivers receiving signals therefrom using one set of carrier frequency channels and the return signal paths using a different set of carrier frequency channels.In one form the central transmitter/receiver is an exchange and the further transmitter/receivers are subscribers connected to the exchange.

Abstract: An apparatus and method of transmitting digital data over a coaxial cable a noisy environment using several carriers with narrower bandwidths in place of the single carrier with a wide bandwidth. In a frequency spectrum, these several carriers are located between interfering harmonic and spurious noise frequencies generated by the other signals, an particularly clock signals. These narrow signals are then combined for transmission over a cable, substantially reducing noise in the signal recovered at the receiving end.

Abstract: Continuous phase modulated (CPM) signals, such as quaternary CPFSK signals, are filtered to limit their bandwidth while simultaneously minimizing the amount of amplitude modulation and intersymbol interference introduced by this filtering process. By designing a modulation filter such as a finite impulse response (FIR) filter to add only a nominal, controlled amount of amplitude modulation, high efficiency, nonlinear power amplifiers may be employed to transmit the filtered CPFSK signals. Although the filter adds a small amount of amplitude modulation and intersymbol interference, digital signal processor-based receivers satisfactorily demodulate this type of signal using sequence estimation algorithms such as the Viterbi algorithm. Thus, the filtering of CPM signals permits narrowing of the transmitted signal spectrum while managing the intersymbol interference resulting from the controlled amount of amplitude modulation added by filtering.

Abstract: A communication system that reduces significantly the processing required to search over unknown time delays and unknown frequency shifts. Convolutional type processing with a unique re-indexing of the desired signal's Fourier transform is provided so as to allow for the design of a communication system that is invariant to time of arrival and frequency shift such as that caused by doppler effects from moving vehicles or moving satellites. The processing required is several orders of magnitude less computationally intensive than conventional approaches to solving this problem. In addition, the inventive convolutional ambiguity multiple access (CAMA) system can be used in conjunction with M-Ary FSK (Frequency Shift Keying) and other coding techniques to decode the various frequency codes efficiently.

Abstract: A DTMF signal generating circuit for producing output of a selection signal having a frequency corresponding to a signal entered from push buttons. A high frequency oscillation signal output from an oscillatory circuit are delivered to both a first frequency dividing circuit for dividing high frequency signals by a first dividing ratio and a second frequency dividing circuit for dividing high frequency signals by a second dividing ratio, thereby producing two kinds of divided signals each of which has its own predetermined frequency. A fractional frequency division is then accomplished by switching from an output of a first frequency dividing circuit to an output of a second frequency dividing circuit at a predetermined timing. The signals output form the switch are then counted by a ROM address counter, producing an output of an address value signal.