Abstract: A method and apparatus for recovering data by a digital audio interface, where the data may be transmitted over a single transmission path in accordance with the AES3-1992 standard, begins by receiving a stream of biphase encoded data. The biphase encoded data is organized as a series of data block that each include a plurality of frames. The processing continues by determining whether a next transition of a frame of the plurality of frames occurs during a first, second, or third time window after a preceding transition of the frame. When the next transition occurs during the second predetermined time, the digital audio interface synchronizes to a data rate of the stream of biphase encoded data based on the next transition and the preceding transition. In other words, the transitions of the data within the frame are occurring at the data rate.

Abstract: A decoder that receives a Manchester encoded signal including a start of frame sequence followed by coded data values followed by an end of frame sequence. The decoder also includes a detector that detects the start of frame sequence and the end of frame sequence to determine a beginning and end of the coded data values in the Manchester encoded frame. The decoder includes an integrator with hysteresis that includes an up-down counter and provides an output signal responsive to upper and lower threshold values. The output signal is applied to a discriminator that includes a counter which counts up in response to one value of the output signal of the integrator and is reset in response to the other value of the output signal of the integrator.

Abstract: A digital data modulator is coupled to a source of a digital data signal. An encoder encodes the digital data using a variable pulse width code. A pulse signal generator generates pulses representing edges of the encoded digital data signal. A carrier signal generator generates a carrier signal having carrier pulses corresponding to the pulses from the pulse signal generator. A corresponding digital data demodulator is coupled to a source of a modulated signal having carrier pulses spaced relative to each other to represent a variable pulse width encoded digital data signal. A detector generates a variable pulse width encoded signal in response to received carrier pulses. A decoder decodes the variable pulse width encoded signal to generate the digital data signal.

Abstract: A method and system for decoding a biphase-mark input stream is disclosed. Aspects of the present invention include receiving an external biphase-mark input stream by a receiver module; recovering timing information from the input stream; decoding the input stream to generate decoded data and storing the decoded data in a data buffer; reading, by an audio out module, the decoded data from the data buffer at a rate determined by a programmable clock; using the timing information from the receiver module to calculate a sampling frequency of the input stream; and adjusting a frequency of the programmable clock to substantially match the sampling frequency so that the audio out module reads the decoded from the buffer at substantially the same rate that the receiver module inputs the decoded data into the data buffer.

Abstract: A clock synchronization system for synchronizing a first communications device and a second communications device to enable digital communication there between. A first device generates a first clock signal Fa. A second device generates a second clock signal Fb2. The second device includes a first PLL circuit and a second PLL circuit. The first PLL circuit is adapted to increase Fa by a factor K to produce a signal Fak. The second PLL circuit is adapted to increase Fak by a factor L to produce a signal Fbn. The second PLL circuit is further adapted to decrease Fbn by a factor N to produce the signal Fb2. The first PLL circuit and the second PLL circuit are adapted to adjust the values of K, L, and N such that a frequency lock is achieved between Fa and Fb2. enabling digital communication between the first device and the second device without requiring a predetermined phase lock between Fa and Fb2.

Abstract: A method for a cellular telephone receiver to detect the presence of a dotting sequence for a Manchester encoded cellular signal in a deep fading environment, wherein the presence of a single edge transition during the mask pulse for a predetermined number of consecutive clock cycles and the absence of any transition edges outside of the mask pulse for the predetermined number of consecutive clock cycles, indicate the presence of a dotting sequence and that the cellular receiver locked to a masked edge, thereby preventing the receiver from receiving the signal. In response, the receiver will shift the phase of its clock by 180 degrees so that it can lock to an unmasked edge of the cellular signal and thereby receive the signal.

Abstract: A method for conveying application data via carrierless ultra wideband wireless signals, and signals embodied in a carrierless ultra wideband waveform. Application data is encoded into wavelets that are transmitted as a carrierless ultra wideband waveform. The carrierless ultra wideband waveform is received by an antenna, and the application data is decoded from the wavelets included in the waveform. The waveforms of the signals include wavelets that have a predetermined shape that is used to modulate the data. The signals may convey, for example, Web pages and executable programs between mobile devices. The signals are low power and can penetrate obstructions making them favorable for use with a wireless node of a network.

Abstract: Techniques for an electronic shelf label (ESL) system which uses a digital modulation technique for a modulated backscatter uplink from an ESL to a communication base station (CBS) which utilizes pseudo-random sequences instead of a single continuous wave frequency. The CBS transmits a message to an ESL using a Manchester coded amplitude modulated carrier. After receiving the message, the ESL responds by reflectively modulating a continuous wave (CW) signal with a pseudo-random code sequence. Multiple pseudo-random code sequences may be chosen, with each code sequence corresponding to a particular response. The code sequence is modulated onto a kHz carrier which is used to reflectively modulate the CW signal received from the CBS. The CBS then receives the reflectively modulated signal and correlates the received signal to determine message transmitted.

Abstract: A method for conveying application data via carrierless ultra wideband wireless signals, and signals embodied in a carrierless ultra wideband waveform. Application data is encoded into wavelets that are transmitted as a carrierless ultra wideband waveform. The carrierless ultra wideband waveform is received by an antenna, and the application data is decoded from the wavelets included in the waveform. The waveforms of the signals include wavelets that have a predetermined shape that is used to modulate the data. The signals may convey, for example, Web pages and executable programs between mobile devices. The signals are low power and can penetrate obstructions making them favorable for use with a wireless node of a network.

Abstract: A method and system for transmitting digital data by means of phase modulation is characterized in that the data are coded at the transmitting end with a code after the fashion of the Differential Manchester Code and are then phase-modulated, and in that a demodulation without phase recovery is carried out at the receiving end. The receiving-end expenditure can thereby be reduced.

Abstract: An RF modem used with a host device for transmitting information to, and receiving information from, other host devices. Prior to a transmission, the information is Manchester encoded and transmitted by On/Off Keying. A superregenerative receiver circuit (which may also operate as the transmitter) operating at the transmitted frequency detects the transmitted information. The information is recovered in conjunction with a timing function which times the buildup of RF energy within the receiver circuit so that a transmitted binary 1 can be distinguished from a binary 0. For use in a system with a plurality of hosts, multiple channels of operation are provided. In order to conserve power, the apparatus is operated in a power saving, sleep or scanning mode, as well as a full power active mode.

Abstract: A local area network is based on a ring of twisted pair cable links (UTP), each carrying at least 1.4 Mbps gross data rate. Each station on the network includes an encoder and a following station includes a decoder for PSK (phase shift keying) modulated serial data. The encoder uses an analog sine wave oscillator and inverter for generating antiphase analog sine wave signals at a carrier frequency and a switching circuit for selecting between the carrier signals according to the data signal to be transmitted. The decoder may use a simple integrator and comparator arrangement. The encoder and decoder may be provided in the form of an adapter circuit, such that a network based on optical fibre can be replaced by a network based on twisted pair cable using the same digital circuits. Generation of the PSK waveform by analog circuitry rather than digital synthesis reduces radio frequency emissions to a level suitable for use in an automotive audio/video communications network.

Abstract: An apparatus is described for reducing coherent signal interference between at least two bit streams framed with a common clock signal. The apparatus includes an internal clock signal generated from the common clock signal and a Manchester encoder for encoding the internal clock signal with a unique signature. Also included is a logic AND-gate for combining one bit stream of the two bit streams with the encoded clock signal to produce an encoded output signal. When the encoded output signal is combined with another of the two bit streams during transmission, individual bits of the combined bit streams are identifiable at a receiving end. The receiving end decodes the combined bit streams and properly discriminates between ONEs and ZEROs.

Abstract: Apparatus, and an accompanying method, for transmitting a frame synchronization signal and a data signal simultaneously through a serial transmission medium (170). Specifically within a data transmitter (105), a frame synchronization signal, a clock signal and a data signal, are encoded to form a single bi-phase mark signal having the frame synchronization signal incorporated into the bi-phase mark signal as a phase-shift. The bi-phase mark signal is then transmitted through a suitable serial transmission medium. A receiver (175), connected to the transmission medium, receives and amplifies an incoming bi-phase mark signal appearing on the medium, and, in turn, synthesizes the clock, frame synchronization, and data signals from this bi-phase mark signal.

Abstract: A digital television transmitting system is presented having a recovery circuit for recovering non-return to zero (NRZ) data pulses and transport clock pulses from a biphase-mark serial data pulse stream and wherein the recovered NRZ data pulses and the recovered transport clock pulses are applied to modulation and amplifying circuits for broadcasting by an antenna. The recovery circuit includes a first circuit for receiving the biphase-mark serial pulse stream and providing therefrom a train of first clock pulses wherein the rising edge of each the biphase-mark pulse corresponds with a rising edge of one of the first clock pulses. A second circuit receives the biphase-mark serial data pulses and the first clock pulses for providing therefrom a train of de-serialized data pulses each having a rising edge corresponding with a rising edge of one of the first clock pulses.

Abstract: Apparatus, and an accompanying method, for transmitting a frame synchronization signal and a data signal simultaneously through a serial transmission medium (170). Specifically within a data transmitter (105), a frame synchronization signal, a clock signal and a data signal, are encoded to form a single bi-phase mark signal that is defined by a specific modulation protocol and the frame synchronization signal is incorporated into the bi-phase mark signal as a protocal violation. The bi-phase mark signal is then transmitted through a suitable serial transmission medium. A receiver (175), connected to the transmission medium, receives and amplifies an incoming bi-phase mark signal appearing on the medium, and, in turn, synthesizes the clock, frame synchronization, and data signals from this bi-phase mark signal.

Abstract: Before digital data impulses are transmitted from a transmitter to a receiver that includes a data acquisition signal generator, at least one synchronizing impulse (syn1, . . . ) is transmitted for synchronizing the transmitter with the receiver with regard to a sync frequency that is repeatedly updated to provide a current accepted sync frequency. The at least one synchronizing impulse and the data impulses are Manchester encoded which combines timing (synchronizing) and data signals. An impulse flank change occurring centrally in an impulse width is used as a synchronization point of time. Stepping pulses occurring between two consecutive synchronization points of time are counted and the resulting count is used to determine the sync frequency in response to the occurrence of a synchronizing impulse and at a synchronization point of time. A time shift or delay occurs between data impulses and synchronization points of time.

Abstract: An optical disc apparatus has a demodulation circuit performing an FSK demodulation by being provided with a binary signal which is obtained by binarizing a signal reproduced from an optical disc on which an FSK modulation signal is previously recorded. An edge interval of the binary signal is measured. An FSK modulation component is obtained from a difference between a measured edge interval value and a previously determined edge interval reference value. A demodulation value is obtained based on a moving average of the FSK modulation component. A moving average of the demodulation value is compared with a reference value so as to obtain a binary FSK demodulation signal. Additionally, the optical disc apparatus includes a decode circuit for decoding binary data from a biphase code signal which is reproduced from an optical disc and to be inverted at an end of each bit.

Abstract: An encoding system including an encoder that Manchester encodes a data value to produce a coded data value and produces a first invalid Manchester encoded sequence as a start of frame. Also produced is a second invalid Manchester encoded sequence as an end of frame. A transmission packet is produced including the start of frame followed by the coded data value followed by the end of frame. The start of frame is a sequence of "110110" and the end of frame is a sequence of "001000".

Abstract: The present invention relates to a transmission device and a transmission method which can efficiently perform transmission of audio signals with infrared ray and suppress the complication of data processing in modulation and demodulation processes to the minimum level. Audio signals reproduced by a digital audio instrument are transmitted to and recorded into a digital audio recorder through an audio signal transmission device by infrared ray. In the digital audio recorder, the recorded audio signals are immediately reproduced, transmitted and output to a digital audio instrument through an audio transmission device with infrared ray. In the transmitters, a transmission channel clock having the frequency of 5/4-times the data clock thereof from the audio signals, and modulated signals obtained by modulating the audio signals are output at the timing of the transmission channel clock.

Abstract: A data decoding circuit of the present invention can regenerate a bit synchronization signal from a data received by using a code such as a split-phase code and Manchester code in which a binary value can be detected through a transition of voltage at a central area of a bit cell and transform the received data into a serial binary data. The data decoding circuit includes an edge detection section for detecting a transition point in the received data; a pulse generating section for generating a phase comparing timing signal having a pulse width of substantially 1/(4.times.fs) when fs is a data transfer frequency and a received data regenerating signal having a pulse width of substantially 1(2.times.

Abstract: A data and clock recovery circuit includes a front end circuit for receiving a data signal encoded with a Manchester or other bi-phase level code having a sequence of bit frames, and for outputting a recovered data signal and a recovered clock signal in accordance with transitions in the data signal that overlap with a window signal. A window generation circuit generates the window signal in accordance with a delay control signal, and includes circuitry that delays and transforms the recovered clock signal into the window signal. A delay control circuit generates and adjusts the delay control signal. A phase comparison circuit compares the recovered clock signal with leading and lagging portions of the window signal, and generates signals that adjust the delay control signal when the recovered clock signal overlaps with either of the leading and lagging portions of the signal.

Abstract: A circuit for decoding an input signal includes a measurement circuit having an input to receive a timing clock signal that is asynchronous with clocking of the input signal, to measure duration of a plurality of pulses received on the input signal in relation to frequency of the timing clock signal and a decode circuit to decode the input signal into digital data. In one embodiment, the circuit may include a servo mechanism for generating the timing clock signal to have a frequency that varies in response to variations in frequency of clocking of data on the input signal. The servo mechanism may include a digitally controlled oscillator and a feedback circuit, to control the digital frequency of the digitally controlled oscillator in response to variation of clocking of data on the input signal. The invention permits use of all digital components for decoding digital audio data encoding using biphase-mark encoded data according to the SPDIF or AES/EBU standards.

Abstract: A double-balanced microwave biphase modulator circuit is provided with a first balun for transforming the unbalanced RF Input impedance to a balanced diode impedance and providing direct current ground return paths, and a second balun for transforming the balanced diode impedance to the unbalanced RF Output impedance and providing access for data input. The first balun consists of a transmission line attached from a coupled pair of transmission lines to ground. The second balun consists of three pairs of coupled transmission lines, in which the first two pairs of transmission lines are attached to a diode ring, to a data input filter, to a circuit ground, and to the third pair of transmission lines.

Abstract: An optical wireless communication method and apparatus configured to distinguish optical LAN data from optical noise is disclosed. The apparatus communicates using Manchester coded data via a connector connected to a personal computer. The Manchester coded data from the computer are converted to NRZ transmission data to be temporarily stored and read out. A frame of the read out data is appended with a head leader, and end data, at the head and end of the frame respectively to be convened to the DMI transmission optical data. The optical data inserted between the head leader and END data are receivable and can be distinguished from optical noise. The DMI received data removed from the head leader and end data are convened to data of the Manchester code in contrast with the transmission side to be delivered as the Manchester data via the connector. As the optical data with the head leader and end data are distinguishable from optical noise, high sensitive optical receivers are available.

Abstract: The Manchester coder/decoder of the invention includes the following modules. A synchronization signal generation module (11), gives the clocks' start signal. A module (12) for the synchronization and generation of clocks generates the transmission/coding and decoding clocks and a low frequency clock. A decoding module (13) includes a flip-flop driven by the decoding clock. The decoding is a simple sampling of the input signal of the Manchester coded data which is to be decoded during the reception phase. A coding module (14) carries out an "OR EXCLUSIVE" function between the input signal to be coded in Manchester code and the transmission clock.

Abstract: A binary phase shift keyed (BPSK) modulator (200) used for digital phase modulation is shown. Phase shift is achieved by electrically switching an RF input signal (201) through either a direct signal path (203) or through a half wave transmission signal path (205) to shift its phase by 180 degrees. Both the data signal (211) and its complement (213) are used to turn on one of PIN diodes (207, 209) while simultaneously turning off the other diode with reverse bias. This technique allows for obtaining maximum diode isolation. The BPSK modulator (200) has the advantages of very low insertion loss, dc coupling for low frequency modulation components and high performance with minimum parts.

Abstract: The OCDMA waveform of the present invention uses bi-phase PN modulation (BPSK PN chip modulation) in conjunction with MPSK or MQASK data modulation (QPSK data modulation is one preferred embodiment) to increase bandwidth efficiency. The number of orthogonal users that can be placed on a single carrier is equal to, at most, the length of the orthogonal binary sequence. The Radamacher-Walsh (RW) sequence chip rate must be 4.sup.n times the symbol rate (where n is a positive integer) since the symbol transitions must be synchronized to the RW period to guarantee orthogonality of the multiple users when data transitions are present. The symbol rate for QPSK modulation is one-half that for BPSK modulation. As a result, twice as many orthogonal functions are available for a given clock rate for QPSK as for BPSK modulation. That is, an OCDMA system with QPSK data can support twice as many users in a given bandwidth as an OCDMA system with BPSK data.

Abstract: A Manchester code signal is used as a communication signal to be superimposed onto an operating current. The amplitude value in the plus direction with respect to an average current value is made larger than that in the minus direction, and the time width of an "H" level in one bit time is made smaller than that of an "L" level so as to establish the average current value into a low level. Accordingly, it is possible to make the average current value at the time of not-communication equal to that at the time of communication, and it is also possible to establish the average current value to a low level.

Abstract: The present invention provides a system and method for using a single digzed component of an analog signal to be converted into a pair of digital signals used to re-establish the analog signal. A low level serial transceiver transforms a first analog signal into a first digital signal representing the complement of the first analog signal. The first digital signal is propagated through an electronic interface circuit such as a matrix switch or through some electronic circuit used to detect characteristics of the analog signal. In response to receiving the first digital signal, a logic circuit generates a second digital signal representing the analog signal, and also outputs the first digital signal. In response to receiving the first and second digital signals, a retimer generates a third digital signal comprising a series of pulses.

Abstract: A method of and an apparatus for phase synchronization of a bit rate clock signal generated in an RDS receiver with a digital RDS signal demodulated on the receiver side, in which both the bit rate clock signal and the RDS signal have the same bit rate. Upon turning on of the RDS receiver and/or switching over of the same to a transmitter receiving frequency different from that received so far, a control signal is generated which, upon occurrence of the next rising edge or, alternatively, of the next falling edge of the RDS signal, effects such a phase angle shift of the bit rate clock signal that the bit rate clock signal, starting from that occurrence, is in phase synchronism with the RDS signal.

Abstract: Biphase or FM encoding is combined with Flash modulation in infrared (IR) communication. By shrinking the coded pulse width in the modulation process, power dissipation is effectively reduced to the point where FM encoding can be advantageously adapted to IR communication in a synchronous communication system. Noise filtering is also described.

Abstract: A transmitter converts a change in a logical level of a signal to be transmitted, such as an alarm signal or a control signal, into a biphase signal. Upon receipt of the biphase signal, a receiver outputs a signal in which a previous value is maintained or only one of the logical levels occurs.

Abstract: An improved digital data modulator is provided for a digital transmitter. The digital data modulator comprises of a pair of digital data synthesizers which are controlled in a manner which produces complex conjugate modulated data signals of the input signals. Summing means are provided to sum the outputs of the digital data synthesizers in a manner which removes the imaginary components and simultaneously reduces the side load power without employing conventional filters.

Abstract: A digital adjustable phase modulator and method includes a first circuit path and a second circuit path for a signal. A fixed bias voltage is coupled to the first circuit path and to the second circuit path which respectively include first and second active variable reactance components such as varactor diodes. The first circuit path and the second circuit path further include chip capacitors to provide a DC block for first and second MMIC single pole double throw switches, and transmission lines for the signal have a length of one-fourth of a wavelength of the signal to provide an RF short. A control voltage is coupled to the first and second varactor diodes such that the capacitances across the first and second varactor diodes changes, resulting in a phase difference between the signal traversing the first circuit path relative to the signal traversing the second circuit path.

Abstract: The RF meter reading system includes a transmitter having an encoder. Meter data is encoded and modulated using a bi-phase modulating scheme. In order to uniquely identify the start of a data transmission, a super start field, which is an "illegal" bi-phase signal is used. The super start field is selected such that it cannot be recognized if transmissions from more than one transmitter are being received by the receiver.

Abstract: The invention doubles the bit rate for a given media bandwidth as compared to, for example, Manchester encoding. It is applicable to serial transmission or storage of digital data. An arbitrary NRZ data stream is first encoded by a pre-encoding method, such as Manchester, that combines clock and data to represent a single NRZ bit in one clock cycle. A toggle flip flop then re-encodes the pre-encoded waveform, thus generating a double toggle (DT) encoded waveform, which spreads the spectral energy over a larger bandwidth and encodes two NRZ data bits within one transmission clock cycle. In the case of Manchester pre-encoding, data is decoded by determining if there are transitions nearly synchronous with an edge of the recovered clock. For other pre-encoding methods, decoded data is determined by the length of the transition period and the edge polarity of the recovered clock at the leading edge of the transition within the DT encoded waveform.

Abstract: An optical code recognition unit (OCRU) for recognising a predetermined n-bit optical code sequence coded using the Manchester code format, has an n-way splitter (7) having an input and n parallel outputs (7a). A plurality of gates (9a, 9b, 9c, 9d) are associated with the splitter outputs (7a), respective pairs of splitter outputs leading to each of the gates ( 9a, 9b, 9c) via a respective optical combiner (8a, 8b, 8c), and any remaining single splitter output leading directly to its gate (9d). Each of the splitter outputs (7a) is subject to a different delay of m half bit periods, where m=0 to 2(n-1), the values of m being chosen such that, if a predetermined optical code sequence is applied to the splitter input, the `1`s in the outputs of each of the pairs of splitter outputs (7a) reach the associated AND gates (9a, 9b, 9c) and the `1` in any remaining single splitter output (7a) reaches its AND gate (9d) at predetermined times such that all the gates are turned on.

Abstract: A biphase modulator without matching elements includes a Lange coupler (5) including first, second, third, and fourth ports (1,2, 3, 4), where the first port (1) receives a RF input signal. FETs (6, 7) each have a source, gate, and drain (19, 17, 18 and 22, 20, 21). The drain (18) of the first FET (6) is coupled to the second port (2), the source (19) of the first FET (6) and the second FET (7) are coupled to electrical ground, and the drain (21) of the second FET (7) is coupled to the fourth port (4). The FETs, are switched at the desired modulation frequency by a control input (16) to the gates (17, 20), alternately providing a zero volt signal and a pinch-off voltage signal which produces a biphase modulated RF input signal at the third port (3) of the Lange coupler (5).