Abstract: Systems and methods for managing content in a flash memory. A locking data structure is used to control access to data structures and the locking data structure is implemented in flash memory. The locking data structure is updated by overwriting the data such that the associated data structure is identified as locked or unlocked.

Abstract: The present application relates to a system hosting a monotonic counter and a method of operating the system. The system comprises a non-volatile memory (110) for holding a save counter value and a volatile memory (120) for maintaining a current counter value. The system (100) is configured during a startup phase to retrieve the saved counter value of the monotonic counter from the non-volatile memory (110); to detect whether a previous shutdown of the system (100) was an uncontrolled shutdown; and to adjust the retrieved counter value in accordance with a step size (130) provided at the system (100) in case an previous uncontrolled shutdown is detected.

Abstract: A system and method of implementing a digit counter having a plurality of digits, ranging from a least significant digit (LSD) to a maximum positional digit (MDP), is described. In one embodiment, the system comprises switching a single digit for each increment from the LSD to the MPD. Further, after the MPD is switched, for the next increment, resetting the digits from the LSD to the MPD, and moving the LSD and the MPD by one digit, such that the original LSD becomes a higher precedence digit.

Abstract: A frequency gain display apparatus for an L/C band frequency up unit which is capable of generating a pulse for adjusting the gain of an L/C band frequency up unit used in a satellite system and a pulse for selecting a band width of a SAW (surface acoustic wave) filter and is capable of displaying a gain step of the same.

Abstract: The timer generates a selected number of control pulses per hour, at unpredictable (pseudo-random) intervals, for use with a time lapse video tape recorder used for time studies. The hour is divided into equal intervals to provide the number of samples required per hour, and one trigger pulse is generated randomly timed within each interval. A noise generator drives a counter whose outputs are loaded every Nth clock pulse into an N-stage shift register. The contents of the shift register are shifted out serially at the clock frequency.

Abstract: This invention concerns counters.More specifically, it relates to a non-volatile counting decade, comprising five flipflops, the outputs of which represent the decimal contents of the decade in the Johnson code. In this code, no flipflop changes its state more than twice in the course of a counting cycle from 0 to 10. The state of the counter is safeguarded on every incrementation, in separate safeguard circuits for each flipflop, formed of MNOS or floating-base transistors. However, any flipflop output state is safeguarded only if its state has changed after incrementation, this being detected by a logic circuit, which selects the safeguard signal for each flipflop.By means of an extremely simple combinative circuit, this invention thereby greatly reduces the number of writing cycles to be performed by the MNOS or floating-base transistors, which cannot withstand an excessive number of writing cycles.